1 /* 2 * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <string.h> 9 10 #include <arch_helpers.h> 11 #include <common/debug.h> 12 #include <drivers/arm/css/css_scp.h> 13 #include <drivers/arm/css/scmi.h> 14 #include <plat/arm/common/plat_arm.h> 15 #include <plat/arm/css/common/css_pm.h> 16 #include <plat/common/platform.h> 17 #include <platform_def.h> 18 19 /* 20 * This file implements the SCP helper functions using SCMI protocol. 21 */ 22 23 /* 24 * SCMI power state parameter bit field encoding for ARM CSS platforms. 25 * 26 * 31 20 19 16 15 12 11 8 7 4 3 0 27 * +-------------------------------------------------------------+ 28 * | SBZ | Max level | Level 3 | Level 2 | Level 1 | Level 0 | 29 * | | | state | state | state | state | 30 * +-------------------------------------------------------------+ 31 * 32 * `Max level` encodes the highest level that has a valid power state 33 * encoded in the power state. 34 */ 35 #define SCMI_PWR_STATE_MAX_PWR_LVL_SHIFT 16 36 #define SCMI_PWR_STATE_MAX_PWR_LVL_WIDTH 4 37 #define SCMI_PWR_STATE_MAX_PWR_LVL_MASK \ 38 ((1 << SCMI_PWR_STATE_MAX_PWR_LVL_WIDTH) - 1) 39 #define SCMI_SET_PWR_STATE_MAX_PWR_LVL(_power_state, _max_level) \ 40 (_power_state) |= ((_max_level) & SCMI_PWR_STATE_MAX_PWR_LVL_MASK)\ 41 << SCMI_PWR_STATE_MAX_PWR_LVL_SHIFT 42 #define SCMI_GET_PWR_STATE_MAX_PWR_LVL(_power_state) \ 43 (((_power_state) >> SCMI_PWR_STATE_MAX_PWR_LVL_SHIFT) \ 44 & SCMI_PWR_STATE_MAX_PWR_LVL_MASK) 45 46 #define SCMI_PWR_STATE_LVL_WIDTH 4 47 #define SCMI_PWR_STATE_LVL_MASK \ 48 ((1 << SCMI_PWR_STATE_LVL_WIDTH) - 1) 49 #define SCMI_SET_PWR_STATE_LVL(_power_state, _level, _level_state) \ 50 (_power_state) |= ((_level_state) & SCMI_PWR_STATE_LVL_MASK) \ 51 << (SCMI_PWR_STATE_LVL_WIDTH * (_level)) 52 #define SCMI_GET_PWR_STATE_LVL(_power_state, _level) \ 53 (((_power_state) >> (SCMI_PWR_STATE_LVL_WIDTH * (_level))) & \ 54 SCMI_PWR_STATE_LVL_MASK) 55 56 /* 57 * The SCMI power state enumeration for a power domain level 58 */ 59 typedef enum { 60 scmi_power_state_off = 0, 61 scmi_power_state_on = 1, 62 scmi_power_state_sleep = 2, 63 } scmi_power_state_t; 64 65 /* 66 * The global handles for invoking the SCMI driver APIs after the driver 67 * has been initialized. 68 */ 69 static void *scmi_handles[PLAT_ARM_SCMI_CHANNEL_COUNT]; 70 71 /* The global SCMI channels array */ 72 static scmi_channel_t scmi_channels[PLAT_ARM_SCMI_CHANNEL_COUNT]; 73 74 /* 75 * Channel ID for the default SCMI channel. 76 * The default channel is used to issue SYSTEM level SCMI requests and is 77 * initialized to the channel which has the boot cpu as its resource. 78 */ 79 static uint32_t default_scmi_channel_id; 80 81 /* 82 * TODO: Allow use of channel specific lock instead of using a single lock for 83 * all the channels. 84 */ 85 ARM_SCMI_INSTANTIATE_LOCK; 86 87 /* 88 * Function to obtain the SCMI Domain ID and SCMI Channel number from the linear 89 * core position. The SCMI Channel number is encoded in the upper 16 bits and 90 * the Domain ID is encoded in the lower 16 bits in each entry of the mapping 91 * array exported by the platform. 92 */ 93 static void css_scp_core_pos_to_scmi_channel(unsigned int core_pos, 94 unsigned int *scmi_domain_id, unsigned int *scmi_channel_id) 95 { 96 unsigned int composite_id; 97 98 composite_id = plat_css_core_pos_to_scmi_dmn_id_map[core_pos]; 99 100 *scmi_channel_id = GET_SCMI_CHANNEL_ID(composite_id); 101 *scmi_domain_id = GET_SCMI_DOMAIN_ID(composite_id); 102 } 103 104 /* 105 * Helper function to suspend a CPU power domain and its parent power domains 106 * if applicable. 107 */ 108 void css_scp_suspend(const struct psci_power_state *target_state) 109 { 110 int ret; 111 112 /* At least power domain level 0 should be specified to be suspended */ 113 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 114 ARM_LOCAL_STATE_OFF); 115 116 /* Check if power down at system power domain level is requested */ 117 if (css_system_pwr_state(target_state) == ARM_LOCAL_STATE_OFF) { 118 /* Issue SCMI command for SYSTEM_SUSPEND on all SCMI channels */ 119 ret = scmi_sys_pwr_state_set( 120 scmi_handles[default_scmi_channel_id], 121 SCMI_SYS_PWR_FORCEFUL_REQ, SCMI_SYS_PWR_SUSPEND); 122 if (ret != SCMI_E_SUCCESS) { 123 ERROR("SCMI system power domain suspend return 0x%x unexpected\n", 124 ret); 125 panic(); 126 } 127 return; 128 } 129 #if !HW_ASSISTED_COHERENCY 130 unsigned int lvl, channel_id, domain_id; 131 uint32_t scmi_pwr_state = 0; 132 /* 133 * If we reach here, then assert that power down at system power domain 134 * level is running. 135 */ 136 assert(css_system_pwr_state(target_state) == ARM_LOCAL_STATE_RUN); 137 138 /* For level 0, specify `scmi_power_state_sleep` as the power state */ 139 SCMI_SET_PWR_STATE_LVL(scmi_pwr_state, ARM_PWR_LVL0, 140 scmi_power_state_sleep); 141 142 for (lvl = ARM_PWR_LVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) { 143 if (target_state->pwr_domain_state[lvl] == ARM_LOCAL_STATE_RUN) 144 break; 145 146 assert(target_state->pwr_domain_state[lvl] == 147 ARM_LOCAL_STATE_OFF); 148 /* 149 * Specify `scmi_power_state_off` as power state for higher 150 * levels. 151 */ 152 SCMI_SET_PWR_STATE_LVL(scmi_pwr_state, lvl, 153 scmi_power_state_off); 154 } 155 156 SCMI_SET_PWR_STATE_MAX_PWR_LVL(scmi_pwr_state, lvl - 1); 157 158 css_scp_core_pos_to_scmi_channel(plat_my_core_pos(), 159 &domain_id, &channel_id); 160 ret = scmi_pwr_state_set(scmi_handles[channel_id], 161 domain_id, scmi_pwr_state); 162 163 if (ret != SCMI_E_SUCCESS) { 164 ERROR("SCMI set power state command return 0x%x unexpected\n", 165 ret); 166 panic(); 167 } 168 #endif 169 } 170 171 /* 172 * Helper function to turn off a CPU power domain and its parent power domains 173 * if applicable. 174 */ 175 void css_scp_off(const struct psci_power_state *target_state) 176 { 177 unsigned int lvl = 0, channel_id, domain_id; 178 int ret; 179 uint32_t scmi_pwr_state = 0; 180 181 /* At-least the CPU level should be specified to be OFF */ 182 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 183 ARM_LOCAL_STATE_OFF); 184 185 /* PSCI CPU OFF cannot be used to turn OFF system power domain */ 186 assert(css_system_pwr_state(target_state) == ARM_LOCAL_STATE_RUN); 187 188 for (; lvl <= PLAT_MAX_PWR_LVL; lvl++) { 189 if (target_state->pwr_domain_state[lvl] == ARM_LOCAL_STATE_RUN) 190 break; 191 192 assert(target_state->pwr_domain_state[lvl] == 193 ARM_LOCAL_STATE_OFF); 194 SCMI_SET_PWR_STATE_LVL(scmi_pwr_state, lvl, 195 scmi_power_state_off); 196 } 197 198 SCMI_SET_PWR_STATE_MAX_PWR_LVL(scmi_pwr_state, lvl - 1); 199 200 css_scp_core_pos_to_scmi_channel(plat_my_core_pos(), 201 &domain_id, &channel_id); 202 ret = scmi_pwr_state_set(scmi_handles[channel_id], 203 domain_id, scmi_pwr_state); 204 if (ret != SCMI_E_QUEUED && ret != SCMI_E_SUCCESS) { 205 ERROR("SCMI set power state command return 0x%x unexpected\n", 206 ret); 207 panic(); 208 } 209 } 210 211 /* 212 * Helper function to turn ON a CPU power domain and its parent power domains 213 * if applicable. 214 */ 215 void css_scp_on(u_register_t mpidr) 216 { 217 unsigned int lvl = 0, channel_id, core_pos, domain_id; 218 int ret; 219 uint32_t scmi_pwr_state = 0; 220 221 for (; lvl <= PLAT_MAX_PWR_LVL; lvl++) 222 SCMI_SET_PWR_STATE_LVL(scmi_pwr_state, lvl, 223 scmi_power_state_on); 224 225 SCMI_SET_PWR_STATE_MAX_PWR_LVL(scmi_pwr_state, lvl - 1); 226 227 core_pos = (unsigned int)plat_core_pos_by_mpidr(mpidr); 228 assert(core_pos < PLATFORM_CORE_COUNT); 229 230 css_scp_core_pos_to_scmi_channel(core_pos, &domain_id, 231 &channel_id); 232 ret = scmi_pwr_state_set(scmi_handles[channel_id], 233 domain_id, scmi_pwr_state); 234 if (ret != SCMI_E_QUEUED && ret != SCMI_E_SUCCESS) { 235 ERROR("SCMI set power state command return 0x%x unexpected\n", 236 ret); 237 panic(); 238 } 239 } 240 241 /* 242 * Helper function to get the power state of a power domain node as reported 243 * by the SCP. 244 */ 245 int css_scp_get_power_state(u_register_t mpidr, unsigned int power_level) 246 { 247 int ret; 248 uint32_t scmi_pwr_state = 0, lvl_state; 249 unsigned int channel_id, cpu_idx, domain_id; 250 251 /* We don't support get power state at the system power domain level */ 252 if ((power_level > PLAT_MAX_PWR_LVL) || 253 (power_level == CSS_SYSTEM_PWR_DMN_LVL)) { 254 WARN("Invalid power level %u specified for SCMI get power state\n", 255 power_level); 256 return PSCI_E_INVALID_PARAMS; 257 } 258 259 cpu_idx = (unsigned int)plat_core_pos_by_mpidr(mpidr); 260 assert(cpu_idx < PLATFORM_CORE_COUNT); 261 262 css_scp_core_pos_to_scmi_channel(cpu_idx, &domain_id, &channel_id); 263 ret = scmi_pwr_state_get(scmi_handles[channel_id], 264 domain_id, &scmi_pwr_state); 265 266 if (ret != SCMI_E_SUCCESS) { 267 WARN("SCMI get power state command return 0x%x unexpected\n", 268 ret); 269 return PSCI_E_INVALID_PARAMS; 270 } 271 272 /* 273 * Find the maximum power level described in the get power state 274 * command. If it is less than the requested power level, then assume 275 * the requested power level is ON. 276 */ 277 if (SCMI_GET_PWR_STATE_MAX_PWR_LVL(scmi_pwr_state) < power_level) 278 return HW_ON; 279 280 lvl_state = SCMI_GET_PWR_STATE_LVL(scmi_pwr_state, power_level); 281 if (lvl_state == scmi_power_state_on) 282 return HW_ON; 283 284 assert((lvl_state == scmi_power_state_off) || 285 (lvl_state == scmi_power_state_sleep)); 286 return HW_OFF; 287 } 288 289 void __dead2 css_scp_system_off(int state) 290 { 291 int ret; 292 293 /* 294 * Disable GIC CPU interface to prevent pending interrupt from waking 295 * up the AP from WFI. 296 */ 297 plat_arm_gic_cpuif_disable(); 298 299 /* 300 * Issue SCMI command. First issue a graceful 301 * request and if that fails force the request. 302 */ 303 ret = scmi_sys_pwr_state_set(scmi_handles[default_scmi_channel_id], 304 SCMI_SYS_PWR_FORCEFUL_REQ, 305 state); 306 307 if (ret != SCMI_E_SUCCESS) { 308 ERROR("SCMI system power state set 0x%x returns unexpected 0x%x\n", 309 state, ret); 310 panic(); 311 } 312 wfi(); 313 ERROR("CSS set power state: operation not handled.\n"); 314 panic(); 315 } 316 317 /* 318 * Helper function to shutdown the system via SCMI. 319 */ 320 void __dead2 css_scp_sys_shutdown(void) 321 { 322 css_scp_system_off(SCMI_SYS_PWR_SHUTDOWN); 323 } 324 325 /* 326 * Helper function to reset the system via SCMI. 327 */ 328 void __dead2 css_scp_sys_reboot(void) 329 { 330 css_scp_system_off(SCMI_SYS_PWR_COLD_RESET); 331 } 332 333 static int scmi_ap_core_init(scmi_channel_t *ch) 334 { 335 #if PROGRAMMABLE_RESET_ADDRESS 336 uint32_t version; 337 int ret; 338 339 ret = scmi_proto_version(ch, SCMI_AP_CORE_PROTO_ID, &version); 340 if (ret != SCMI_E_SUCCESS) { 341 WARN("SCMI AP core protocol version message failed\n"); 342 return -1; 343 } 344 345 if (!is_scmi_version_compatible(SCMI_AP_CORE_PROTO_VER, version)) { 346 WARN("SCMI AP core protocol version 0x%x incompatible with driver version 0x%x\n", 347 version, SCMI_AP_CORE_PROTO_VER); 348 return -1; 349 } 350 INFO("SCMI AP core protocol version 0x%x detected\n", version); 351 #endif 352 return 0; 353 } 354 355 void __init plat_arm_pwrc_setup(void) 356 { 357 unsigned int composite_id, idx; 358 359 for (idx = 0; idx < PLAT_ARM_SCMI_CHANNEL_COUNT; idx++) { 360 INFO("Initializing driver on Channel %d\n", idx); 361 362 scmi_channels[idx].info = plat_css_get_scmi_info(idx); 363 scmi_channels[idx].lock = ARM_SCMI_LOCK_GET_INSTANCE; 364 scmi_handles[idx] = scmi_init(&scmi_channels[idx]); 365 366 if (scmi_handles[idx] == NULL) { 367 ERROR("SCMI Initialization failed on channel %d\n", idx); 368 panic(); 369 } 370 371 if (scmi_ap_core_init(&scmi_channels[idx]) < 0) { 372 ERROR("SCMI AP core protocol initialization failed\n"); 373 panic(); 374 } 375 } 376 377 composite_id = plat_css_core_pos_to_scmi_dmn_id_map[plat_my_core_pos()]; 378 default_scmi_channel_id = GET_SCMI_CHANNEL_ID(composite_id); 379 } 380 381 /****************************************************************************** 382 * This function overrides the default definition for ARM platforms. Initialize 383 * the SCMI driver, query capability via SCMI and modify the PSCI capability 384 * based on that. 385 *****************************************************************************/ 386 const plat_psci_ops_t *css_scmi_override_pm_ops(plat_psci_ops_t *ops) 387 { 388 uint32_t msg_attr; 389 int ret; 390 void *scmi_handle = scmi_handles[default_scmi_channel_id]; 391 392 assert(scmi_handle); 393 394 /* Check that power domain POWER_STATE_SET message is supported */ 395 ret = scmi_proto_msg_attr(scmi_handle, SCMI_PWR_DMN_PROTO_ID, 396 SCMI_PWR_STATE_SET_MSG, &msg_attr); 397 if (ret != SCMI_E_SUCCESS) { 398 ERROR("Set power state command is not supported by SCMI\n"); 399 panic(); 400 } 401 402 /* 403 * Don't support PSCI NODE_HW_STATE call if SCMI doesn't support 404 * POWER_STATE_GET message. 405 */ 406 ret = scmi_proto_msg_attr(scmi_handle, SCMI_PWR_DMN_PROTO_ID, 407 SCMI_PWR_STATE_GET_MSG, &msg_attr); 408 if (ret != SCMI_E_SUCCESS) 409 ops->get_node_hw_state = NULL; 410 411 /* Check if the SCMI SYSTEM_POWER_STATE_SET message is supported */ 412 ret = scmi_proto_msg_attr(scmi_handle, SCMI_SYS_PWR_PROTO_ID, 413 SCMI_SYS_PWR_STATE_SET_MSG, &msg_attr); 414 if (ret != SCMI_E_SUCCESS) { 415 /* System power management operations are not supported */ 416 ops->system_off = NULL; 417 ops->system_reset = NULL; 418 ops->get_sys_suspend_power_state = NULL; 419 } else { 420 if (!(msg_attr & SCMI_SYS_PWR_SUSPEND_SUPPORTED)) { 421 /* 422 * System power management protocol is available, but 423 * it does not support SYSTEM SUSPEND. 424 */ 425 ops->get_sys_suspend_power_state = NULL; 426 } 427 if (!(msg_attr & SCMI_SYS_PWR_WARM_RESET_SUPPORTED)) { 428 /* 429 * WARM reset is not available. 430 */ 431 ops->system_reset2 = NULL; 432 } 433 } 434 435 return ops; 436 } 437 438 int css_system_reset2(int is_vendor, int reset_type, u_register_t cookie) 439 { 440 if (is_vendor || (reset_type != PSCI_RESET2_SYSTEM_WARM_RESET)) 441 return PSCI_E_INVALID_PARAMS; 442 443 css_scp_system_off(SCMI_SYS_PWR_WARM_RESET); 444 /* 445 * css_scp_system_off cannot return (it is a __dead function), 446 * but css_system_reset2 has to return some value, even in 447 * this case. 448 */ 449 return 0; 450 } 451 452 #if PROGRAMMABLE_RESET_ADDRESS 453 void plat_arm_program_trusted_mailbox(uintptr_t address) 454 { 455 int ret, i; 456 457 for (i = 0; i < PLAT_ARM_SCMI_CHANNEL_COUNT; i++) { 458 assert(scmi_handles[i]); 459 460 ret = scmi_ap_core_set_reset_addr(scmi_handles[i], address, 461 SCMI_AP_CORE_LOCK_ATTR); 462 if (ret != SCMI_E_SUCCESS) { 463 ERROR("CSS: Failed to program reset address: %d\n", ret); 464 panic(); 465 } 466 } 467 } 468 #endif 469