xref: /rk3399_ARM-atf/drivers/arm/css/scmi/vendor/scmi_sq.c (revision 4bd8c929b4bc6e1731c2892b38d4a8c43e8e89dc)
1b67d2029SMasahisa Kojima /*
2b67d2029SMasahisa Kojima  * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3b67d2029SMasahisa Kojima  *
4b67d2029SMasahisa Kojima  * SPDX-License-Identifier: BSD-3-Clause
5b67d2029SMasahisa Kojima  */
6b67d2029SMasahisa Kojima 
7b67d2029SMasahisa Kojima #include <assert.h>
8b67d2029SMasahisa Kojima 
9b67d2029SMasahisa Kojima #include <arch_helpers.h>
10b67d2029SMasahisa Kojima #include <common/debug.h>
11b67d2029SMasahisa Kojima #include <drivers/arm/css/scmi.h>
12b67d2029SMasahisa Kojima 
13b67d2029SMasahisa Kojima #include "scmi_private.h"
14b67d2029SMasahisa Kojima #include "scmi_sq.h"
15b67d2029SMasahisa Kojima 
16b67d2029SMasahisa Kojima #include <sq_common.h>
17b67d2029SMasahisa Kojima 
18*1b491eeaSElyes Haouas /* SCMI message ID to get the available DRAM region */
19b67d2029SMasahisa Kojima #define SCMI_VENDOR_EXT_MEMINFO_GET_MSG		0x3
20b67d2029SMasahisa Kojima 
21292bc551SMasahisa Kojima #define SCMI_VENDOR_EXT_MEMINFO_GET_MSG_LEN	4
22292bc551SMasahisa Kojima 
23b67d2029SMasahisa Kojima /*
24b67d2029SMasahisa Kojima  * API to get the available DRAM region
25b67d2029SMasahisa Kojima  */
scmi_get_draminfo(void * p,struct draminfo * info)26b67d2029SMasahisa Kojima int scmi_get_draminfo(void *p, struct draminfo *info)
27b67d2029SMasahisa Kojima {
28b67d2029SMasahisa Kojima 	mailbox_mem_t *mbx_mem;
29b67d2029SMasahisa Kojima 	int token = 0, ret;
30b67d2029SMasahisa Kojima 	scmi_channel_t *ch = (scmi_channel_t *)p;
31b67d2029SMasahisa Kojima 	struct dram_info_resp response;
32b67d2029SMasahisa Kojima 
33b67d2029SMasahisa Kojima 	validate_scmi_channel(ch);
34b67d2029SMasahisa Kojima 
35b67d2029SMasahisa Kojima 	scmi_get_channel(ch);
36b67d2029SMasahisa Kojima 
37b67d2029SMasahisa Kojima 	mbx_mem = (mailbox_mem_t *)(ch->info->scmi_mbx_mem);
38b67d2029SMasahisa Kojima 	mbx_mem->msg_header = SCMI_MSG_CREATE(SCMI_SYS_VENDOR_EXT_PROTO_ID,
39b67d2029SMasahisa Kojima 			SCMI_VENDOR_EXT_MEMINFO_GET_MSG, token);
40292bc551SMasahisa Kojima 	mbx_mem->len = SCMI_VENDOR_EXT_MEMINFO_GET_MSG_LEN;
41b67d2029SMasahisa Kojima 	mbx_mem->flags = SCMI_FLAG_RESP_POLL;
42b67d2029SMasahisa Kojima 
43b67d2029SMasahisa Kojima 	scmi_send_sync_command(ch);
44b67d2029SMasahisa Kojima 
45b67d2029SMasahisa Kojima 	/*
46b67d2029SMasahisa Kojima 	 * Ensure that any read to the SCPI payload area is done after reading
47b67d2029SMasahisa Kojima 	 * the MHU register. If these 2 reads were reordered then the CPU would
48b67d2029SMasahisa Kojima 	 * read invalid payload data
49b67d2029SMasahisa Kojima 	 */
50b67d2029SMasahisa Kojima 	dmbld();
51b67d2029SMasahisa Kojima 
52b67d2029SMasahisa Kojima 	/* Get the return values */
53b67d2029SMasahisa Kojima 	SCMI_PAYLOAD_RET_VAL1(mbx_mem->payload, ret);
54b67d2029SMasahisa Kojima 
55b67d2029SMasahisa Kojima 	memcpy(&response, (void *)mbx_mem->payload, sizeof(response));
56b67d2029SMasahisa Kojima 
57b67d2029SMasahisa Kojima 	scmi_put_channel(ch);
58b67d2029SMasahisa Kojima 
59b67d2029SMasahisa Kojima 	*info = response.info;
60b67d2029SMasahisa Kojima 
61b67d2029SMasahisa Kojima 	return ret;
62b67d2029SMasahisa Kojima }
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