1 /* 2 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <assert.h> 10 #include <cci.h> 11 #include <debug.h> 12 #include <mmio.h> 13 #include <stdint.h> 14 15 #define MAKE_CCI_PART_NUMBER(hi, lo) ((hi << 8) | lo) 16 #define CCI_PART_LO_MASK 0xff 17 #define CCI_PART_HI_MASK 0xf 18 19 /* CCI part number codes read from Peripheral ID registers 0 and 1 */ 20 #define CCI400_PART_NUM 0x420 21 #define CCI500_PART_NUM 0x422 22 #define CCI550_PART_NUM 0x423 23 24 #define CCI400_SLAVE_PORTS 5 25 #define CCI500_SLAVE_PORTS 7 26 #define CCI550_SLAVE_PORTS 7 27 28 static uintptr_t cci_base; 29 static const int *cci_slave_if_map; 30 31 #if ENABLE_ASSERTIONS 32 static unsigned int max_master_id; 33 static int cci_num_slave_ports; 34 35 static int validate_cci_map(const int *map) 36 { 37 unsigned int valid_cci_map = 0; 38 int slave_if_id; 39 int i; 40 41 /* Validate the map */ 42 for (i = 0; i <= max_master_id; i++) { 43 slave_if_id = map[i]; 44 45 if (slave_if_id < 0) 46 continue; 47 48 if (slave_if_id >= cci_num_slave_ports) { 49 ERROR("Slave interface ID is invalid\n"); 50 return 0; 51 } 52 53 if (valid_cci_map & (1 << slave_if_id)) { 54 ERROR("Multiple masters are assigned same slave interface ID\n"); 55 return 0; 56 } 57 valid_cci_map |= 1 << slave_if_id; 58 } 59 60 if (!valid_cci_map) { 61 ERROR("No master is assigned a valid slave interface\n"); 62 return 0; 63 } 64 65 return 1; 66 } 67 68 /* 69 * Read CCI part number from Peripheral ID registers 70 */ 71 static unsigned int read_cci_part_number(uintptr_t base) 72 { 73 unsigned int part_lo, part_hi; 74 75 part_lo = mmio_read_32(base + PERIPHERAL_ID0) & CCI_PART_LO_MASK; 76 part_hi = mmio_read_32(base + PERIPHERAL_ID1) & CCI_PART_HI_MASK; 77 78 return MAKE_CCI_PART_NUMBER(part_hi, part_lo); 79 } 80 81 /* 82 * Identify a CCI device, and return the number of slaves. Return -1 for an 83 * unidentified device. 84 */ 85 static int get_slave_ports(unsigned int part_num) 86 { 87 int num_slave_ports = -1; 88 89 switch (part_num) { 90 91 case CCI400_PART_NUM: 92 num_slave_ports = CCI400_SLAVE_PORTS; 93 break; 94 case CCI500_PART_NUM: 95 num_slave_ports = CCI500_SLAVE_PORTS; 96 break; 97 case CCI550_PART_NUM: 98 num_slave_ports = CCI550_SLAVE_PORTS; 99 break; 100 default: 101 /* Do nothing in default case */ 102 break; 103 } 104 105 return num_slave_ports; 106 } 107 #endif /* ENABLE_ASSERTIONS */ 108 109 void cci_init(uintptr_t base, const int *map, unsigned int num_cci_masters) 110 { 111 assert(map); 112 assert(base); 113 114 cci_base = base; 115 cci_slave_if_map = map; 116 117 #if ENABLE_ASSERTIONS 118 /* 119 * Master Id's are assigned from zero, So in an array of size n 120 * the max master id is (n - 1). 121 */ 122 max_master_id = num_cci_masters - 1; 123 cci_num_slave_ports = get_slave_ports(read_cci_part_number(base)); 124 #endif 125 assert(cci_num_slave_ports >= 0); 126 127 assert(validate_cci_map(map)); 128 } 129 130 void cci_enable_snoop_dvm_reqs(unsigned int master_id) 131 { 132 int slave_if_id = cci_slave_if_map[master_id]; 133 134 assert(master_id <= max_master_id); 135 assert((slave_if_id < cci_num_slave_ports) && (slave_if_id >= 0)); 136 assert(cci_base); 137 138 /* 139 * Enable Snoops and DVM messages, no need for Read/Modify/Write as 140 * rest of bits are write ignore 141 */ 142 mmio_write_32(cci_base + 143 SLAVE_IFACE_OFFSET(slave_if_id) + SNOOP_CTRL_REG, 144 DVM_EN_BIT | SNOOP_EN_BIT); 145 146 /* 147 * Wait for the completion of the write to the Snoop Control Register 148 * before testing the change_pending bit 149 */ 150 dsbish(); 151 152 /* Wait for the dust to settle down */ 153 while (mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT) 154 ; 155 } 156 157 void cci_disable_snoop_dvm_reqs(unsigned int master_id) 158 { 159 int slave_if_id = cci_slave_if_map[master_id]; 160 161 assert(master_id <= max_master_id); 162 assert((slave_if_id < cci_num_slave_ports) && (slave_if_id >= 0)); 163 assert(cci_base); 164 165 /* 166 * Disable Snoops and DVM messages, no need for Read/Modify/Write as 167 * rest of bits are write ignore. 168 */ 169 mmio_write_32(cci_base + 170 SLAVE_IFACE_OFFSET(slave_if_id) + SNOOP_CTRL_REG, 171 ~(DVM_EN_BIT | SNOOP_EN_BIT)); 172 173 /* 174 * Wait for the completion of the write to the Snoop Control Register 175 * before testing the change_pending bit 176 */ 177 dsbish(); 178 179 /* Wait for the dust to settle down */ 180 while (mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT) 181 ; 182 } 183 184