1*f0958d84SYann GautierTrusted Firmware-A for STM32MP1 2*f0958d84SYann Gautier=============================== 3*f0958d84SYann Gautier 4*f0958d84SYann GautierSTM32MP1 is a microprocessor designed by STMicroelectronics 5*f0958d84SYann Gautierbased on a dual Arm Cortex-A7. 6*f0958d84SYann GautierIt is an Armv7-A platform, using dedicated code from TF-A. 7*f0958d84SYann Gautier 8*f0958d84SYann Gautier 9*f0958d84SYann GautierDesign 10*f0958d84SYann Gautier------ 11*f0958d84SYann GautierThe STM32MP1 resets in the ROM code of the Cortex-A7. 12*f0958d84SYann GautierThe primary boot core (core 0) executes the boot sequence while 13*f0958d84SYann Gautiersecondary boot core (core 1) is kept in a holding pen loop. 14*f0958d84SYann GautierThe ROM code boot sequence loads the TF-A binary image from boot device 15*f0958d84SYann Gautierto embedded SRAM. 16*f0958d84SYann Gautier 17*f0958d84SYann GautierThe TF-A image must be properly formatted with a STM32 header structure 18*f0958d84SYann Gautierfor ROM code is able to load this image. 19*f0958d84SYann GautierTool stm32image can be used to prepend this header to the generated TF-A binary. 20*f0958d84SYann Gautier 21*f0958d84SYann GautierAt compilation step, BL2, BL32 and DTB file are linked together in a single 22*f0958d84SYann Gautierbinary. The stm32image tool is also generated and the header is added to TF-A 23*f0958d84SYann Gautierbinary. This binary file with header is named tf-a-stm32mp157c-ev1.stm32. 24*f0958d84SYann GautierIt can then be copied in the first partition of the boot device. 25*f0958d84SYann Gautier 26*f0958d84SYann Gautier 27*f0958d84SYann GautierMemory mapping 28*f0958d84SYann Gautier~~~~~~~~~~~~~~ 29*f0958d84SYann Gautier 30*f0958d84SYann Gautier:: 31*f0958d84SYann Gautier 32*f0958d84SYann Gautier 0x00000000 +-----------------+ 33*f0958d84SYann Gautier | | ROM 34*f0958d84SYann Gautier 0x00020000 +-----------------+ 35*f0958d84SYann Gautier | | 36*f0958d84SYann Gautier | ... | 37*f0958d84SYann Gautier | | 38*f0958d84SYann Gautier 0x2FFC0000 +-----------------+ \ 39*f0958d84SYann Gautier | | | 40*f0958d84SYann Gautier | ... | | 41*f0958d84SYann Gautier | | | 42*f0958d84SYann Gautier 0x2FFD8000 +-----------------+ | 43*f0958d84SYann Gautier | TF-A DTB | | Embedded SRAM 44*f0958d84SYann Gautier 0x2FFDC000 +-----------------+ | 45*f0958d84SYann Gautier | BL2 | | 46*f0958d84SYann Gautier 0x2FFEF000 +-----------------+ | 47*f0958d84SYann Gautier | BL32 | | 48*f0958d84SYann Gautier 0x30000000 +-----------------+ / 49*f0958d84SYann Gautier | | 50*f0958d84SYann Gautier | ... | 51*f0958d84SYann Gautier | | 52*f0958d84SYann Gautier 0x40000000 +-----------------+ 53*f0958d84SYann Gautier | | 54*f0958d84SYann Gautier | | Devices 55*f0958d84SYann Gautier | | 56*f0958d84SYann Gautier 0xC0000000 +-----------------+ \ 57*f0958d84SYann Gautier | | | 58*f0958d84SYann Gautier 0xC0100000 +-----------------+ | 59*f0958d84SYann Gautier | BL33 | | Non-secure RAM (DDR) 60*f0958d84SYann Gautier | ... | | 61*f0958d84SYann Gautier | | | 62*f0958d84SYann Gautier 0xFFFFFFFF +-----------------+ / 63*f0958d84SYann Gautier 64*f0958d84SYann Gautier 65*f0958d84SYann GautierBoot sequence 66*f0958d84SYann Gautier~~~~~~~~~~~~~ 67*f0958d84SYann Gautier 68*f0958d84SYann GautierROM code -> BL2 (compiled with BL2_AT_EL3) -> BL32 (SP_min) -> BL33 (U-Boot) 69*f0958d84SYann Gautier 70*f0958d84SYann Gautier 71*f0958d84SYann GautierBuild Instructions 72*f0958d84SYann Gautier------------------ 73*f0958d84SYann Gautier 74*f0958d84SYann GautierTo build: 75*f0958d84SYann Gautier 76*f0958d84SYann Gautier.. code:: bash 77*f0958d84SYann Gautier 78*f0958d84SYann Gautier make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 AARCH32_SP=sp_min 79*f0958d84SYann Gautier 80*f0958d84SYann GautierThe following build options are supported: 81*f0958d84SYann Gautier 82*f0958d84SYann Gautier- ``ENABLE_STACK_PROTECTOR``: To enable the stack protection. 83