1*ce7f8044SYann GautierSTM32 MPUs 2*ce7f8044SYann Gautier========== 3*ce7f8044SYann Gautier 4*ce7f8044SYann GautierSTM32 MPUs are microprocessors designed by STMicroelectronics 5*ce7f8044SYann Gautierbased on Arm Cortex-A. This page presents the common configuration of STM32 6*ce7f8044SYann GautierMPUs, more details and dedicated configuration can be found in each STM32 MPU 7*ce7f8044SYann Gautierpage (:ref:`STM32MP1`) 8*ce7f8044SYann Gautier 9*ce7f8044SYann GautierDesign 10*ce7f8044SYann Gautier------ 11*ce7f8044SYann GautierThe STM32 MPU resets in the ROM code of the Cortex-A. 12*ce7f8044SYann GautierThe primary boot core (core 0) executes the boot sequence while 13*ce7f8044SYann Gautiersecondary boot core (core 1) is kept in a holding pen loop. 14*ce7f8044SYann GautierThe ROM code boot sequence loads the TF-A binary image from boot device 15*ce7f8044SYann Gautierto embedded SRAM. 16*ce7f8044SYann Gautier 17*ce7f8044SYann GautierThe TF-A image must be properly formatted with a STM32 header structure 18*ce7f8044SYann Gautierfor ROM code is able to load this image. 19*ce7f8044SYann GautierTool stm32image can be used to prepend this header to the generated TF-A binary. 20*ce7f8044SYann Gautier 21*ce7f8044SYann GautierBoot 22*ce7f8044SYann Gautier~~~~ 23*ce7f8044SYann GautierOnly BL2 (with STM32 header) is loaded by ROM code. The other binaries are 24*ce7f8044SYann Gautierinside the FIP binary: BL31 (for Aarch64 platforms), BL32 (OP-TEE), U-Boot 25*ce7f8044SYann Gautierand their respective device tree blobs. 26*ce7f8044SYann Gautier 27*ce7f8044SYann GautierBoot sequence 28*ce7f8044SYann Gautier~~~~~~~~~~~~~ 29*ce7f8044SYann Gautier 30*ce7f8044SYann GautierROM code -> BL2 (compiled with RESET_TO_BL2) -> OP-TEE -> BL33 (U-Boot) 31*ce7f8044SYann Gautier 32*ce7f8044SYann GautierBuild Instructions 33*ce7f8044SYann Gautier------------------ 34*ce7f8044SYann GautierBoot media(s) supported by BL2 must be specified in the build command. 35*ce7f8044SYann GautierAvailable storage medias are: 36*ce7f8044SYann Gautier 37*ce7f8044SYann Gautier- ``STM32MP_SDMMC`` 38*ce7f8044SYann Gautier- ``STM32MP_EMMC`` 39*ce7f8044SYann Gautier- ``STM32MP_RAW_NAND`` 40*ce7f8044SYann Gautier- ``STM32MP_SPI_NAND`` 41*ce7f8044SYann Gautier- ``STM32MP_SPI_NOR`` 42*ce7f8044SYann Gautier 43*ce7f8044SYann GautierSerial boot devices: 44*ce7f8044SYann Gautier 45*ce7f8044SYann Gautier- ``STM32MP_UART_PROGRAMMER`` 46*ce7f8044SYann Gautier- ``STM32MP_USB_PROGRAMMER`` 47*ce7f8044SYann Gautier 48*ce7f8044SYann Gautier 49*ce7f8044SYann GautierOther configuration flags: 50*ce7f8044SYann Gautier 51*ce7f8044SYann Gautier- | ``DTB_FILE_NAME``: to precise board device-tree blob to be used. 52*ce7f8044SYann Gautier | Default: stm32mp157c-ev1.dtb 53*ce7f8044SYann Gautier- | ``DWL_BUFFER_BASE``: the 'serial boot' load address of FIP, 54*ce7f8044SYann Gautier | default location (end of the first 128MB) is used when absent 55*ce7f8044SYann Gautier- | ``STM32MP_EARLY_CONSOLE``: to enable early traces before clock driver is setup. 56*ce7f8044SYann Gautier | Default: 0 (disabled) 57*ce7f8044SYann Gautier- | ``STM32MP_RECONFIGURE_CONSOLE``: to re-configure crash console (especially after BL2). 58*ce7f8044SYann Gautier | Default: 0 (disabled) 59*ce7f8044SYann Gautier- | ``STM32MP_UART_BAUDRATE``: to select UART baud rate. 60*ce7f8044SYann Gautier | Default: 115200 61*ce7f8044SYann Gautier 62*ce7f8044SYann Gautier 63*ce7f8044SYann GautierPopulate SD-card 64*ce7f8044SYann Gautier---------------- 65*ce7f8044SYann Gautier 66*ce7f8044SYann GautierBoot with FIP 67*ce7f8044SYann Gautier~~~~~~~~~~~~~ 68*ce7f8044SYann GautierThe SD-card has to be formatted with GPT. 69*ce7f8044SYann GautierIt should contain at least those partitions: 70*ce7f8044SYann Gautier 71*ce7f8044SYann Gautier- fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary (BL2) 72*ce7f8044SYann Gautier- fip (GUID 19d5df83-11b0-457b-be2c-7559c13142a5): which contains the FIP binary 73*ce7f8044SYann Gautier 74*ce7f8044SYann GautierUsually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl. 75*ce7f8044SYann Gautier 76*ce7f8044SYann Gautier-------------- 77*ce7f8044SYann Gautier 78*ce7f8044SYann Gautier*Copyright (c) 2023, STMicroelectronics - All Rights Reserved* 79