xref: /rk3399_ARM-atf/docs/plat/st/stm32mp2.rst (revision 21b6260ec8d83fc9dbbfca22ef3addcf2018da9f)
1ee5076f9SYann GautierSTM32MP2
2ee5076f9SYann Gautier========
3ee5076f9SYann Gautier
4ee5076f9SYann GautierSTM32MP2 is a microprocessor designed by STMicroelectronics
5ee5076f9SYann Gautierbased on Arm Cortex-A35.
6ee5076f9SYann Gautier
7*21b6260eSYann GautierMore information can be found on `STM32MP2 Series`_ page.
8*21b6260eSYann Gautier
9ee5076f9SYann GautierFor TF-A common configuration of STM32 MPUs, please check
10ee5076f9SYann Gautier:ref:`STM32 MPUs` page.
11ee5076f9SYann Gautier
12ee5076f9SYann GautierSTM32MP2 Versions
13ee5076f9SYann Gautier-----------------
14ee5076f9SYann Gautier
15ee5076f9SYann GautierThe STM32MP25 series is available in 4 different lines which are pin-to-pin compatible:
16ee5076f9SYann Gautier
17ee5076f9SYann Gautier- STM32MP257: Dual Cortex-A35 cores, Cortex-M33 core - 3x Ethernet (2+1 switch) - 3x CAN FD – H264 - 3D GPU – AI / NN - LVDS
18ee5076f9SYann Gautier- STM32MP255: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - H264 - 3D GPU – AI / NN - LVDS
19ee5076f9SYann Gautier- STM32MP253: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - LVDS
20ee5076f9SYann Gautier- STM32MP251: Single Cortex-A35 core, Cortex-M33 core - 1x Ethernet
21ee5076f9SYann Gautier
22ee5076f9SYann GautierEach line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option:
23ee5076f9SYann Gautier
247b7d23cdSNicolas Le Bayon- A      Basic + Cortex-A35 @ 1.2GHz
257b7d23cdSNicolas Le Bayon- C      Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz
26ee5076f9SYann Gautier- D      Basic + Cortex-A35 @ 1.5GHz
27ee5076f9SYann Gautier- F      Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz
28ee5076f9SYann Gautier
29*21b6260eSYann GautierThe `STM32MP2 part number codification`_ page gives more information about part numbers.
30*21b6260eSYann Gautier
31ee5076f9SYann GautierMemory mapping
32ee5076f9SYann Gautier--------------
33ee5076f9SYann Gautier
34ee5076f9SYann Gautier::
35ee5076f9SYann Gautier
36ee5076f9SYann Gautier    0x00000000 +-----------------+
37ee5076f9SYann Gautier               |                 |
38ee5076f9SYann Gautier               |       ...       |
39ee5076f9SYann Gautier               |                 |
40ee5076f9SYann Gautier    0x0E000000 +-----------------+ \
41ee5076f9SYann Gautier               |       BL31      | |
42ee5076f9SYann Gautier               +-----------------+ |
43ee5076f9SYann Gautier               |       ...       | |
44ee5076f9SYann Gautier    0x0E012000 +-----------------+ |
45ee5076f9SYann Gautier               |     BL2 DTB     | | Embedded SRAM
46ee5076f9SYann Gautier    0x0E016000 +-----------------+ |
47ee5076f9SYann Gautier               |       BL2       | |
48ee5076f9SYann Gautier    0x0E040000 +-----------------+ /
49ee5076f9SYann Gautier               |                 |
50ee5076f9SYann Gautier               |       ...       |
51ee5076f9SYann Gautier               |                 |
52ee5076f9SYann Gautier    0x40000000 +-----------------+
53ee5076f9SYann Gautier               |                 |
54ee5076f9SYann Gautier               |                 |   Devices
55ee5076f9SYann Gautier               |                 |
56ee5076f9SYann Gautier    0x80000000 +-----------------+ \
57ee5076f9SYann Gautier               |                 | |
58ee5076f9SYann Gautier               |                 | | Non-secure RAM (DDR)
59ee5076f9SYann Gautier               |                 | |
60ee5076f9SYann Gautier    0xFFFFFFFF +-----------------+ /
61ee5076f9SYann Gautier
62ee5076f9SYann Gautier
63ee5076f9SYann GautierBuild Instructions
64ee5076f9SYann Gautier------------------
65ee5076f9SYann Gautier
66ee5076f9SYann GautierSTM32MP2x specific flags
67ee5076f9SYann Gautier~~~~~~~~~~~~~~~~~~~~~~~~
68ee5076f9SYann Gautier
69ee5076f9SYann GautierDedicated STM32MP2 build flags:
70ee5076f9SYann Gautier
71ee5076f9SYann Gautier- | ``STM32MP_DDR_FIP_IO_STORAGE``: to store DDR firmware in FIP.
72ee5076f9SYann Gautier  | Default: 1
73ee5076f9SYann Gautier- | ``STM32MP25``: to select STM32MP25 variant configuration.
74ee5076f9SYann Gautier  | Default: 1
75ee5076f9SYann Gautier
76ee5076f9SYann GautierTo compile the correct DDR driver, one flag must be set among:
77ee5076f9SYann Gautier
78ee5076f9SYann Gautier- | ``STM32MP_DDR3_TYPE``: to compile DDR3 driver and DT.
79ee5076f9SYann Gautier  | Default: 0
80ee5076f9SYann Gautier- | ``STM32MP_DDR4_TYPE``: to compile DDR4 driver and DT.
81ee5076f9SYann Gautier  | Default: 0
82ee5076f9SYann Gautier- | ``STM32MP_LPDDR4_TYPE``: to compile LpDDR4 driver and DT.
83ee5076f9SYann Gautier  | Default: 0
84ee5076f9SYann Gautier
85ee5076f9SYann Gautier
86ee5076f9SYann GautierBoot with FIP
87ee5076f9SYann Gautier~~~~~~~~~~~~~
88ee5076f9SYann GautierYou need to build BL2, BL31, BL32 (OP-TEE) and BL33 (U-Boot) before building FIP binary.
89ee5076f9SYann Gautier
90ee5076f9SYann GautierU-Boot
91ee5076f9SYann Gautier______
92ee5076f9SYann Gautier
93ee5076f9SYann Gautier.. code:: bash
94ee5076f9SYann Gautier
95ee5076f9SYann Gautier    cd <u-boot_directory>
96ee5076f9SYann Gautier    make stm32mp25_defconfig
97ee5076f9SYann Gautier    make DEVICE_TREE=stm32mp257f-ev1 all
98ee5076f9SYann Gautier
99ee5076f9SYann GautierOP-TEE
100ee5076f9SYann Gautier______
101ee5076f9SYann Gautier
102ee5076f9SYann Gautier.. code:: bash
103ee5076f9SYann Gautier
104ee5076f9SYann Gautier    cd <optee_directory>
105ee5076f9SYann Gautier    make CROSS_COMPILE64=aarch64-none-elf- CROSS_COMPILE32=arm-none-eabi-
106ee5076f9SYann Gautier        ARCH=arm PLATFORM=stm32mp2 \
107ee5076f9SYann Gautier        CFG_EMBED_DTB_SOURCE_FILE=stm32mp257f-ev1.dts
108ee5076f9SYann Gautier
109ee5076f9SYann GautierTF-A BL2 & BL31
110ee5076f9SYann Gautier_______________
111ee5076f9SYann GautierTo build TF-A BL2 with its STM32 header and BL31 for SD-card boot:
112ee5076f9SYann Gautier
113ee5076f9SYann Gautier.. code:: bash
114ee5076f9SYann Gautier
115ee5076f9SYann Gautier    make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \
116ee5076f9SYann Gautier        STM32MP_DDR4_TYPE=1 SPD=opteed \
117ee5076f9SYann Gautier        DTB_FILE_NAME=stm32mp257f-ev1.dtb STM32MP_SDMMC=1
118ee5076f9SYann Gautier
119ee5076f9SYann GautierFor other boot devices, you have to replace STM32MP_SDMMC in the previous command
120ee5076f9SYann Gautierwith the desired device flag.
121ee5076f9SYann Gautier
122ee5076f9SYann Gautier
123ee5076f9SYann GautierFIP
124ee5076f9SYann Gautier___
125ee5076f9SYann Gautier
126ee5076f9SYann Gautier.. code:: bash
127ee5076f9SYann Gautier
128ee5076f9SYann Gautier    make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \
129ee5076f9SYann Gautier        STM32MP_DDR4_TYPE=1 SPD=opteed \
130ee5076f9SYann Gautier        DTB_FILE_NAME=stm32mp257f-ev1.dtb \
131ee5076f9SYann Gautier        BL33=<u-boot_directory>/u-boot-nodtb.bin \
132ee5076f9SYann Gautier        BL33_CFG=<u-boot_directory>/u-boot.dtb \
133ee5076f9SYann Gautier        BL32=<optee_directory>/tee-header_v2.bin \
134ee5076f9SYann Gautier        BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin
135ee5076f9SYann Gautier        fip
136ee5076f9SYann Gautier
137*21b6260eSYann Gautier.. _STM32MP2 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html
138*21b6260eSYann Gautier.. _STM32MP2 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP25_microprocessor#Part_number_codification
139*21b6260eSYann Gautier
1407b7d23cdSNicolas Le Bayon*Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved*
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