1*6f625747SDouglas RaillardARM Trusted Firmware for Socionext UniPhier SoCs 2*6f625747SDouglas Raillard================================================ 3*6f625747SDouglas Raillard 4*6f625747SDouglas RaillardSocionext UniPhier ARMv8-A SoCs use ARM Trusted Firmware as the secure world 5*6f625747SDouglas Raillardfirmware, supporting BL1, BL2, and BL31. 6*6f625747SDouglas Raillard 7*6f625747SDouglas RaillardUniPhier SoC family implements its internal boot ROM, so BL1 is used as pseudo 8*6f625747SDouglas RaillardROM (i.e. runs in RAM). The internal boot ROM loads 64KB `1`_ image from a 9*6f625747SDouglas Raillardnon-volatile storage to the on-chip SRAM. Unfortunately, BL1 does not fit in 10*6f625747SDouglas Raillardthe 64KB limit if `Trusted Board Boot`_ (TBB) is enabled. To solve this problem, 11*6f625747SDouglas RaillardSocionext provides a first stage loader called `UniPhier BL`_. This loader runs 12*6f625747SDouglas Raillardin the on-chip SRAM, initializes the DRAM, expands BL1 there, and hands the 13*6f625747SDouglas Raillardcontrol over to it. Therefore, all images of ARM Trusted Firmware run in DRAM. 14*6f625747SDouglas Raillard 15*6f625747SDouglas RaillardThe UniPhier platform works with/without TBB. See below for the build process 16*6f625747SDouglas Raillardof each case. The image authentication for the UniPhier platform fully 17*6f625747SDouglas Raillardcomplies with the Trusted Board Boot Requirements (TBBR) specification. 18*6f625747SDouglas Raillard 19*6f625747SDouglas RaillardThe UniPhier BL does not implement the authentication functionality, that is, 20*6f625747SDouglas Raillardit can not verify the BL1 image by itself. Instead, the UniPhier BL assures 21*6f625747SDouglas Raillardthe BL1 validity in a different way; BL1 is GZIP-compressed and appended to 22*6f625747SDouglas Raillardthe UniPhier BL. The concatenation of the UniPhier BL and the compressed BL1 23*6f625747SDouglas Raillardfits in the 64KB limit. The concatenated image is loaded by the boot ROM 24*6f625747SDouglas Raillard(and verified if the chip fuses are blown). 25*6f625747SDouglas Raillard 26*6f625747SDouglas Raillard:: 27*6f625747SDouglas Raillard 28*6f625747SDouglas Raillard to the lowest common denominator. 29*6f625747SDouglas Raillard 30*6f625747SDouglas RaillardBoot Flow 31*6f625747SDouglas Raillard--------- 32*6f625747SDouglas Raillard 33*6f625747SDouglas Raillard#. The Boot ROM 34*6f625747SDouglas Raillard 35*6f625747SDouglas RaillardThis is hard-wired ROM, so never corrupted. It loads the UniPhier BL (with 36*6f625747SDouglas Raillardcompressed-BL1 appended) into the on-chip SRAM. If the SoC fuses are blown, 37*6f625747SDouglas Raillardthe image is verified by the SoC's own method. 38*6f625747SDouglas Raillard 39*6f625747SDouglas Raillard#. UniPhier BL 40*6f625747SDouglas Raillard 41*6f625747SDouglas RaillardThis runs in the on-chip SRAM. After the minimum SoC initialization and DRAM 42*6f625747SDouglas Raillardsetup, it decompresses the appended BL1 image into the DRAM, then jumps to 43*6f625747SDouglas Raillardthe BL1 entry. 44*6f625747SDouglas Raillard 45*6f625747SDouglas Raillard#. BL1 46*6f625747SDouglas Raillard 47*6f625747SDouglas RaillardThis runs in the DRAM. It extracts BL2 from FIP (Firmware Image Package). 48*6f625747SDouglas RaillardIf TBB is enabled, the BL2 is authenticated by the standard mechanism of ARM 49*6f625747SDouglas RaillardTrusted Firmware. 50*6f625747SDouglas Raillard 51*6f625747SDouglas Raillard#. BL2, BL31, and more 52*6f625747SDouglas Raillard 53*6f625747SDouglas RaillardThey all run in the DRAM, and are authenticated by the standard mechanism if 54*6f625747SDouglas RaillardTBB is enabled. See `Firmware Design`_ for details. 55*6f625747SDouglas Raillard 56*6f625747SDouglas RaillardBasic Build 57*6f625747SDouglas Raillard----------- 58*6f625747SDouglas Raillard 59*6f625747SDouglas RaillardBL1 must be compressed for the reason above. The UniPhier's platform makefile 60*6f625747SDouglas Raillardprovides a build target ``bl1_gzip`` for this. 61*6f625747SDouglas Raillard 62*6f625747SDouglas RaillardFor a non-secure boot loader (aka BL33), U-Boot is well supported for UniPhier 63*6f625747SDouglas RaillardSoCs. The U-Boot image (``u-boot.bin``) must be built in advance. For the build 64*6f625747SDouglas Raillardprocedure of U-Boot, refer to the document in the `U-Boot`_ project. 65*6f625747SDouglas Raillard 66*6f625747SDouglas RaillardTo build minimum functionality for UniPhier (without TBB): 67*6f625747SDouglas Raillard 68*6f625747SDouglas Raillard:: 69*6f625747SDouglas Raillard 70*6f625747SDouglas Raillard make CROSS_COMPILE=<gcc-prefix> PLAT=uniphier BL33=<path-to-BL33> bl1_gzip fip 71*6f625747SDouglas Raillard 72*6f625747SDouglas RaillardOutput images: 73*6f625747SDouglas Raillard 74*6f625747SDouglas Raillard- ``bl1.bin.gzip`` 75*6f625747SDouglas Raillard- ``fip.bin`` 76*6f625747SDouglas Raillard 77*6f625747SDouglas RaillardOptional features 78*6f625747SDouglas Raillard----------------- 79*6f625747SDouglas Raillard 80*6f625747SDouglas Raillard- Trusted Board Boot 81*6f625747SDouglas Raillard 82*6f625747SDouglas Raillard`mbed TLS`_ is needed as the cryptographic and image parser modules. 83*6f625747SDouglas RaillardRefer to the `User Guide`_ for the appropriate version of mbed TLS. 84*6f625747SDouglas Raillard 85*6f625747SDouglas RaillardTo enable TBB, add the following options to the build command: 86*6f625747SDouglas Raillard 87*6f625747SDouglas Raillard:: 88*6f625747SDouglas Raillard 89*6f625747SDouglas Raillard TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=<path-to-mbedtls> 90*6f625747SDouglas Raillard 91*6f625747SDouglas Raillard- System Control Processor (SCP) 92*6f625747SDouglas Raillard 93*6f625747SDouglas RaillardIf desired, FIP can include an SCP BL2 image. If BL2 finds an SCP BL2 image 94*6f625747SDouglas Raillardin FIP, BL2 loads it into DRAM and kicks the SCP. Most of UniPhier boards 95*6f625747SDouglas Raillardstill work without SCP, but SCP provides better power management support. 96*6f625747SDouglas Raillard 97*6f625747SDouglas RaillardTo include SCP\_BL2, add the following option to the build command: 98*6f625747SDouglas Raillard 99*6f625747SDouglas Raillard:: 100*6f625747SDouglas Raillard 101*6f625747SDouglas Raillard SCP_BL2=<path-to-SCP> 102*6f625747SDouglas Raillard 103*6f625747SDouglas Raillard- BL32 (Secure Payload) 104*6f625747SDouglas Raillard 105*6f625747SDouglas RaillardTo enable BL32, add the following option to the build command: 106*6f625747SDouglas Raillard 107*6f625747SDouglas Raillard:: 108*6f625747SDouglas Raillard 109*6f625747SDouglas Raillard SPD=<spd> BL32=<path-to-BL32> 110*6f625747SDouglas Raillard 111*6f625747SDouglas RaillardIf you use TSP for BL32, ``BL32=<path-to-BL32>`` is not required. Just add the 112*6f625747SDouglas Raillardfollowing: 113*6f625747SDouglas Raillard 114*6f625747SDouglas Raillard:: 115*6f625747SDouglas Raillard 116*6f625747SDouglas Raillard SPD=tspd 117*6f625747SDouglas Raillard 118*6f625747SDouglas Raillard.. _1: Some%20SoCs%20can%20load%2080KB,%20but%20the%20software%20implementation%20must%20be%20aligned 119*6f625747SDouglas Raillard.. _Trusted Board Boot: ../trusted-board-boot.rst 120*6f625747SDouglas Raillard.. _UniPhier BL: https://github.com/uniphier/uniphier-bl 121*6f625747SDouglas Raillard.. _Firmware Design: ../firmware-design.rst 122*6f625747SDouglas Raillard.. _U-Boot: https://www.denx.de/wiki/U-Boot 123*6f625747SDouglas Raillard.. _mbed TLS: https://tls.mbed.org/ 124*6f625747SDouglas Raillard.. _User Guide: ../user-guide.rst 125