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1*e0dea671SAndre PrzywaraRaspberry Pi 4
2*e0dea671SAndre Przywara==============
3*e0dea671SAndre Przywara
4*e0dea671SAndre PrzywaraThe `Raspberry Pi 4`_ is an inexpensive single-board computer that contains four
5*e0dea671SAndre PrzywaraArm Cortex-A72 cores. Also in contrast to previous Raspberry Pi versions this
6*e0dea671SAndre Przywaramodel has a GICv2 interrupt controller.
7*e0dea671SAndre Przywara
8*e0dea671SAndre PrzywaraThis port is a minimal port to support loading non-secure EL2 payloads such
9*e0dea671SAndre Przywaraas a 64-bit Linux kernel. Other payloads such as U-Boot or EDK-II should work
10*e0dea671SAndre Przywaraas well, but have not been tested at this point.
11*e0dea671SAndre Przywara
12*e0dea671SAndre Przywara**IMPORTANT NOTE**: This port isn't secure. All of the memory used is DRAM,
13*e0dea671SAndre Przywarawhich is available from both the Non-secure and Secure worlds. The SoC does
14*e0dea671SAndre Przywaranot seem to feature a secure memory controller of any kind, so portions of
15*e0dea671SAndre PrzywaraDRAM can't be protected properly from the Non-secure world.
16*e0dea671SAndre Przywara
17*e0dea671SAndre PrzywaraBuild Instructions
18*e0dea671SAndre Przywara------------------
19*e0dea671SAndre Przywara
20*e0dea671SAndre PrzywaraThere are no real configuration options at this point, so there is only
21*e0dea671SAndre Przywaraone universal binary (bl31.bin), which can be built with:
22*e0dea671SAndre Przywara
23*e0dea671SAndre Przywara.. code:: shell
24*e0dea671SAndre Przywara
25*e0dea671SAndre Przywara    CROSS_COMPILE=aarch64-linux-gnu- make PLAT=rpi4 DEBUG=1
26*e0dea671SAndre Przywara
27*e0dea671SAndre PrzywaraCopy the generated build/rpi4/debug/bl31.bin to the SD card, either
28*e0dea671SAndre Przywararenaming it to ``armstub8.bin`` or adding an entry starting with ``armstub=``,
29*e0dea671SAndre Przywarathen followed by the respective file name to ``config.txt``.
30*e0dea671SAndre PrzywaraYou should have AArch64 code in the file loaded as the "kernel", as BL31
31*e0dea671SAndre Przywarawill drop into AArch64/EL2 to the respective load address.
32*e0dea671SAndre Przywaraarm64 Linux kernels are known to work this way.
33*e0dea671SAndre Przywara
34*e0dea671SAndre PrzywaraOther options that should be set in ``config.txt`` to properly boot 64-bit
35*e0dea671SAndre Przywarakernels are:
36*e0dea671SAndre Przywara
37*e0dea671SAndre Przywara::
38*e0dea671SAndre Przywara
39*e0dea671SAndre Przywara    enable_uart=1
40*e0dea671SAndre Przywara    arm_64bit=1
41*e0dea671SAndre Przywara    enable_gic=1
42*e0dea671SAndre Przywara
43*e0dea671SAndre PrzywaraThe BL31 code will patch the provided device tree blob in memory to advertise
44*e0dea671SAndre PrzywaraPSCI support, also will add a reserved-memory node to the DT to tell the
45*e0dea671SAndre Przywaranon-secure payload to not touch the resident TF-A code.
46*e0dea671SAndre Przywara
47*e0dea671SAndre PrzywaraIf you connect a serial cable between the Mini UART and your computer, and
48*e0dea671SAndre Przywaraconnect to it (for example, with ``screen /dev/ttyUSB0 115200``) you should
49*e0dea671SAndre Przywarasee some text from BL31, followed by the output of the EL2 payload.
50*e0dea671SAndre PrzywaraThe command line provided is read from the ``cmdline.txt`` file on the SD card.
51*e0dea671SAndre Przywara
52*e0dea671SAndre PrzywaraTF-A port design
53*e0dea671SAndre Przywara----------------
54*e0dea671SAndre Przywara
55*e0dea671SAndre PrzywaraIn contrast to the existing Raspberry Pi 3 port this one here is a BL31-only
56*e0dea671SAndre Przywaraport, also it deviates quite a lot from the RPi3 port in many other ways.
57*e0dea671SAndre PrzywaraThere is not so much difference between the two models, so eventually those
58*e0dea671SAndre Przywaratwo could be (more) unified in the future.
59*e0dea671SAndre Przywara
60*e0dea671SAndre PrzywaraAs with the previous models, the GPU and its firmware are the first entity to
61*e0dea671SAndre Przywararun after the SoC gets its power. The on-chip Boot ROM loads the next stage
62*e0dea671SAndre Przywara(bootcode.bin) from flash (EEPROM), which is again GPU code.
63*e0dea671SAndre PrzywaraThis part knows how to access the MMC controller and how to parse a FAT
64*e0dea671SAndre Przywarafilesystem, so it will load further compononents and configuration files
65*e0dea671SAndre Przywarafrom the first FAT partition on the SD card.
66*e0dea671SAndre Przywara
67*e0dea671SAndre PrzywaraTo accommodate this existing way of configuring and setting up the board,
68*e0dea671SAndre Przywarawe use as much of this workflow as possible.
69*e0dea671SAndre PrzywaraIf bootcode.bin finds a file called ``armstub8.bin`` on the SD card or it gets
70*e0dea671SAndre Przywarapointed to such code by finding a ``armstub=`` key in ``config.txt``, it will
71*e0dea671SAndre Przywaraload this file to the beginning of DRAM (address 0) and execute it in
72*e0dea671SAndre PrzywaraAArch64 EL3.
73*e0dea671SAndre PrzywaraBut before doing that, it will also load a "kernel" and the device tree into
74*e0dea671SAndre Przywaramemory. The load addresses have a default, but can also be changed by
75*e0dea671SAndre Przywarasetting them in ``config.txt``. If the GPU firmware finds a magic value in the
76*e0dea671SAndre Przywaraarmstub image file, it will put those two load addresses in memory locations
77*e0dea671SAndre Przywaranear the beginning of memory, where TF-A code picks them up.
78*e0dea671SAndre Przywara
79*e0dea671SAndre PrzywaraTo keep things simple, we will just use the kernel load address as the BL33
80*e0dea671SAndre Przywaraentry point, also put the DTB address in the x0 register, as requested by
81*e0dea671SAndre Przywarathe arm64 Linux kernel boot protocol. This does not necessarily mean that
82*e0dea671SAndre Przywarathe EL2 payload needs to be a Linux kernel, a bootloader or any other kernel
83*e0dea671SAndre Przywarawould work as well, as long as it can cope with having the DT address in
84*e0dea671SAndre Przywararegister x0. If the payload has other means of finding the device tree, it
85*e0dea671SAndre Przywaracould ignore this address as well.
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