1NXP SoCs - Overview 2===================== 3.. section-numbering:: 4 :suffix: . 5 6The QorIQ family of ARM based SoCs that are supported on TF-A are: 7 81. LX2160ARDB: 9 Platform Name: 10 11 a. lx2160ardb (Board details can be fetched from the link: `lx2160ardb`_) 12 13 14Table of supported boot-modes by each platform & platform that needs FIP-DDR: 15----------------------------------------------------------------------------- 16 17+---+-----------------+-------+--------+-------+-------+-------+-------------+--------------+-----------------+ 18| | BOOT_MODE-->| sd | qspi | nor | nand | emmc | flexspi_nor | flexspi_nand | fip_ddr needed | 19| | | | | | | | | | | 20| | PLAT | | | | | | | | | 21+===+=================+=======+========+=======+=======+=======+=============+==============+=================+ 22| 1.| lx2160ardb | yes | | | | yes | yes | | yes | 23+---+-----------------+-------+--------+-------+-------+-------+-------------+--------------+-----------------+ 24 25Boot Sequence 26------------- 27:: 28 29+ Secure World | Normal World 30+ EL0 | 31+ | 32+ EL1 BL32(Tee OS) | kernel 33+ ^ | | ^ 34+ | | | | 35+ EL2 | | | BL33(u-boot) 36+ | | | ^ 37+ | v | / 38+ EL3 BootROM --> BL2 --> BL31 ---------------/ 39+ 40 41Boot Sequence with FIP-DDR 42-------------------------- 43:: 44 45+ Secure World | Normal World 46+ EL0 | 47+ | 48+ EL1 fip-ddr BL32(Tee OS) | kernel 49+ ^ | ^ | | ^ 50+ | | | | | | 51+ EL2 | | | | | BL33(u-boot) 52+ | | | | | ^ 53+ | v | v | / 54+ EL3 BootROM --> BL2 -----> BL31 ---------------/ 55+ 56 57 58How to build 59============= 60 61Code Locations 62-------------- 63 64- OP-TEE: 65 `link <https://source.codeaurora.org/external/qoriq/qoriq-components/optee_os>`__ 66 67- U-Boot: 68 `link <https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot>`__ 69 70- RCW: 71 `link <https://source.codeaurora.org/external/qoriq/qoriq-components/rcw>`__ 72 73- ddr-phy-binary: Required by platforms that need fip-ddr. 74 `link <https:://github.com/NXP/ddr-phy-binary>`__ 75 76- cst: Required for TBBR. 77 `link <https:://source.codeaurora.org/external/qoriq/qoriq-components/cst>`__ 78 79Build Procedure 80--------------- 81 82- Fetch all the above repositories into local host. 83 84- Prepare AARCH64 toolchain and set the environment variable "CROSS_COMPILE". 85 86 .. code:: shell 87 88 export CROSS_COMPILE=.../bin/aarch64-linux-gnu- 89 90- Build RCW. Refer README from the respective cloned folder for more details. 91 92- Build u-boot and OPTee firstly, and get binary images: u-boot.bin and tee.bin. 93 For u-boot you can use the <platform>_tfa_defconfig for build. 94 95- Copy/clone the repo "ddr-phy-binary" to the tfa directory for platform needing ddr-fip. 96 97- Below are the steps to build TF-A images for the supported platforms. 98 99Compilation steps without BL32 100~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 101 102BUILD BL2: 103 104-To compile 105 .. code:: shell 106 107 make PLAT=$PLAT \ 108 BOOT_MODE=<platform_supported_boot_mode> \ 109 RCW=$RCW_BIN \ 110 pbl 111 112BUILD FIP: 113 114 .. code:: shell 115 116 make PLAT=$PLAT \ 117 BOOT_MODE=<platform_supported_boot_mode> \ 118 RCW=$RCW_BIN \ 119 BL33=$UBOOT_SECURE_BIN \ 120 pbl \ 121 fip 122 123Compilation steps with BL32 124~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 125 126BUILD BL2: 127 128-To compile 129 .. code:: shell 130 131 make PLAT=$PLAT \ 132 BOOT_MODE=<platform_supported_boot_mode> \ 133 RCW=$RCW_BIN \ 134 BL32=$TEE_BIN SPD=opteed\ 135 pbl 136 137BUILD FIP: 138 139 .. code:: shell 140 141 make PLAT=$PLAT \ 142 BOOT_MODE=<platform_supported_boot_mode> \ 143 RCW=$RCW_BIN \ 144 BL32=$TEE_BIN SPD=opteed\ 145 BL33=$UBOOT_SECURE_BIN \ 146 pbl \ 147 fip 148 149 150BUILD fip-ddr (Mandatory for certain platforms, refer table above): 151~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 152 153-To compile additional fip-ddr for selected platforms(Refer above table if the platform needs fip-ddr). 154 .. code:: shell 155 156 make PLAT=<platform_name> fip-ddr 157 158 159Deploy ATF Images 160================= 161 162Note: The size in the standard uboot commands for copy to nor, qspi, nand or sd 163should be modified based on the binary size of the image to be copied. 164 165- Deploy ATF images on flexspi-Nor flash Alt Bank from U-Boot prompt. 166 -- Commands to flash images for bl2_xxx.pbl and fip.bin. 167 168 .. code:: shell 169 170 tftp 82000000 $path/bl2_flexspi_nor.pbl; 171 i2c mw 66 50 20;sf probe 0:0; sf erase 0 +$filesize; sf write 0x82000000 0x0 $filesize; 172 173 tftp 82000000 $path/fip.bin; 174 i2c mw 66 50 20;sf probe 0:0; sf erase 0x100000 +$filesize; sf write 0x82000000 0x100000 $filesize; 175 176 -- Next step is valid for platform where FIP-DDR is needed. 177 178 .. code:: shell 179 180 tftp 82000000 $path/ddr_fip.bin; 181 i2c mw 66 50 20;sf probe 0:0; sf erase 0x800000 +$filesize; sf write 0x82000000 0x800000 $filesize; 182 183 -- Then reset to alternate bank to boot up ATF. 184 185 .. code:: shell 186 187 qixisreset altbank; 188 189- Deploy ATF images on SD/eMMC from U-Boot prompt. 190 -- file_size_in_block_sizeof_512 = (Size_of_bytes_tftp / 512) 191 192 .. code:: shell 193 194 mmc dev <idx>; (idx = 1 for eMMC; idx = 0 for SD) 195 196 tftp 82000000 $path/bl2_<sd>_or_<emmc>.pbl; 197 mmc write 82000000 8 <file_size_in_block_sizeof_512>; 198 199 tftp 82000000 $path/fip.bin; 200 mmc write 82000000 0x800 <file_size_in_block_sizeof_512>; 201 202 -- Next step is valid for platform that needs FIP-DDR. 203 204 .. code:: shell 205 206 tftp 82000000 $path/ddr_fip.bin; 207 mmc write 82000000 0x4000 <file_size_in_block_sizeof_512>; 208 209 -- Then reset to sd/emmc to boot up ATF from sd/emmc as boot-source. 210 211 .. code:: shell 212 213 qixisreset <sd or emmc>; 214 215Trusted Board Boot: 216=================== 217 218For TBBR, the binary name changes: 219 220+-------------+--------------------------+---------+-------------------+ 221| Boot Type | BL2 | FIP | FIP-DDR | 222+=============+==========================+=========+===================+ 223| Normal Boot | bl2_<boot_mode>.pbl | fip.bin | ddr_fip.bin | 224+-------------+--------------------------+---------+-------------------+ 225| TBBR Boot | bl2_<boot_mode>_sec.pbl | fip.bin | ddr_fip_sec.bin | 226+-------------+--------------------------+---------+-------------------+ 227 228Refer `nxp-ls-tbbr.rst`_ for detailed user steps. 229 230 231.. _lx2160ardb: https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-communication-process/layerscape-lx2160a-multicore-communications-processor:LX2160A 232.. _nxp-ls-tbbr.rst: ./nxp-ls-tbbr.rst 233