1*cdb8c52fSCarlo CaioneAmlogic Meson S905X2 (G12A) 2*cdb8c52fSCarlo Caione========================== 3*cdb8c52fSCarlo Caione 4*cdb8c52fSCarlo CaioneThe Amlogic Meson S905X2 is a SoC with a quad core Arm Cortex-A53 running at 5*cdb8c52fSCarlo Caione~1.8GHz. It also contains a Cortex-M3 used as SCP. 6*cdb8c52fSCarlo Caione 7*cdb8c52fSCarlo CaioneThis port is a minimal implementation of BL31 capable of booting mainline U-Boot 8*cdb8c52fSCarlo Caioneand Linux: 9*cdb8c52fSCarlo Caione 10*cdb8c52fSCarlo Caione- SCPI support. 11*cdb8c52fSCarlo Caione- Basic PSCI support (CPU_ON, CPU_OFF, SYSTEM_RESET, SYSTEM_OFF). Note that CPU0 12*cdb8c52fSCarlo Caione can't be turned off, so there is a workaround to hide this from the caller. 13*cdb8c52fSCarlo Caione- GICv2 driver set up. 14*cdb8c52fSCarlo Caione- Basic SIP services (read efuse data, enable/disable JTAG). 15*cdb8c52fSCarlo Caione 16*cdb8c52fSCarlo CaioneIn order to build it: 17*cdb8c52fSCarlo Caione 18*cdb8c52fSCarlo Caione.. code:: shell 19*cdb8c52fSCarlo Caione 20*cdb8c52fSCarlo Caione CROSS_COMPILE=aarch64-linux-gnu- make DEBUG=1 PLAT=g12a 21*cdb8c52fSCarlo Caione 22*cdb8c52fSCarlo CaioneThis port has been tested on a SEI510 board. After building it, follow the 23*cdb8c52fSCarlo Caioneinstructions in the `gxlimg repository` or `U-Boot repository`_, replacing the 24*cdb8c52fSCarlo Caionementioned **bl31.img** by the one built from this port. 25*cdb8c52fSCarlo Caione 26*cdb8c52fSCarlo Caione.. _gxlimg repository: https://github.com/repk/gxlimg/blob/master/README.g12a 27*cdb8c52fSCarlo Caione.. _U-Boot repository: https://github.com/u-boot/u-boot/blob/master/board/amlogic/sei510/README 28