1*a2847172SGrzegorz JaszczykMarvell IOB address decoding bindings 2*a2847172SGrzegorz Jaszczyk===================================== 3*a2847172SGrzegorz Jaszczyk 4*a2847172SGrzegorz JaszczykIO bridge configration driver (3rd stage address translation) for Marvell Armada 8K and 8K+ SoCs. 5*a2847172SGrzegorz Jaszczyk 6*a2847172SGrzegorz JaszczykThe IOB includes a description of the address decoding configuration. 7*a2847172SGrzegorz Jaszczyk 8*a2847172SGrzegorz JaszczykIOB supports up to n (in CP110 n=24) windows for external memory transaction. 9*a2847172SGrzegorz JaszczykWhen a transaction passes through the IOB, its address is compared to each of 10*a2847172SGrzegorz Jaszczykthe enabled windows. If there is a hit and it passes the security checks, it is 11*a2847172SGrzegorz Jaszczykadvanced to the target port. 12*a2847172SGrzegorz Jaszczyk 13*a2847172SGrzegorz JaszczykMandatory functions 14*a2847172SGrzegorz Jaszczyk------------------- 15*a2847172SGrzegorz Jaszczyk 16*a2847172SGrzegorz Jaszczyk- marvell_get_iob_memory_map 17*a2847172SGrzegorz Jaszczyk Returns the IOB windows configuration and the number of windows 18*a2847172SGrzegorz Jaszczyk 19*a2847172SGrzegorz JaszczykMandatory structures 20*a2847172SGrzegorz Jaszczyk-------------------- 21*a2847172SGrzegorz Jaszczyk 22*a2847172SGrzegorz Jaszczyk- iob_memory_map 23*a2847172SGrzegorz Jaszczyk Array that includes the configuration of the windows. Every window/entry is 24*a2847172SGrzegorz Jaszczyk a struct which has 3 parameters: 25*a2847172SGrzegorz Jaszczyk 26*a2847172SGrzegorz Jaszczyk - Base address of the window 27*a2847172SGrzegorz Jaszczyk - Size of the window 28*a2847172SGrzegorz Jaszczyk - Target-ID of the window 29*a2847172SGrzegorz Jaszczyk 30*a2847172SGrzegorz JaszczykTarget ID options 31*a2847172SGrzegorz Jaszczyk----------------- 32*a2847172SGrzegorz Jaszczyk 33*a2847172SGrzegorz Jaszczyk- **0x0** = Internal configuration space 34*a2847172SGrzegorz Jaszczyk- **0x1** = MCI0 35*a2847172SGrzegorz Jaszczyk- **0x2** = PEX1_X1 36*a2847172SGrzegorz Jaszczyk- **0x3** = PEX2_X1 37*a2847172SGrzegorz Jaszczyk- **0x4** = PEX0_X4 38*a2847172SGrzegorz Jaszczyk- **0x5** = NAND flash 39*a2847172SGrzegorz Jaszczyk- **0x6** = RUNIT (NOR/SPI/BootRoom) 40*a2847172SGrzegorz Jaszczyk- **0x7** = MCI1 41*a2847172SGrzegorz Jaszczyk 42*a2847172SGrzegorz JaszczykExample 43*a2847172SGrzegorz Jaszczyk------- 44*a2847172SGrzegorz Jaszczyk 45*a2847172SGrzegorz Jaszczyk.. code:: c 46*a2847172SGrzegorz Jaszczyk 47*a2847172SGrzegorz Jaszczyk struct addr_map_win iob_memory_map[] = { 48*a2847172SGrzegorz Jaszczyk {0x00000000f7000000, 0x0000000001000000, PEX1_TID}, /* PEX1_X1 window */ 49*a2847172SGrzegorz Jaszczyk {0x00000000f8000000, 0x0000000001000000, PEX2_TID}, /* PEX2_X1 window */ 50*a2847172SGrzegorz Jaszczyk {0x00000000f6000000, 0x0000000001000000, PEX0_TID}, /* PEX0_X4 window */ 51*a2847172SGrzegorz Jaszczyk {0x00000000f9000000, 0x0000000001000000, NAND_TID} /* NAND window */ 52*a2847172SGrzegorz Jaszczyk }; 53