1a2847172SGrzegorz JaszczykMarvell IOB address decoding bindings 2a2847172SGrzegorz Jaszczyk===================================== 3a2847172SGrzegorz Jaszczyk 4*47147013SDavid HorstmannIO bridge configuration driver (3rd stage address translation) for Marvell Armada 8K and 8K+ SoCs. 5a2847172SGrzegorz Jaszczyk 6a2847172SGrzegorz JaszczykThe IOB includes a description of the address decoding configuration. 7a2847172SGrzegorz Jaszczyk 8a2847172SGrzegorz JaszczykIOB supports up to n (in CP110 n=24) windows for external memory transaction. 9a2847172SGrzegorz JaszczykWhen a transaction passes through the IOB, its address is compared to each of 10a2847172SGrzegorz Jaszczykthe enabled windows. If there is a hit and it passes the security checks, it is 11a2847172SGrzegorz Jaszczykadvanced to the target port. 12a2847172SGrzegorz Jaszczyk 13a2847172SGrzegorz JaszczykMandatory functions 14a2847172SGrzegorz Jaszczyk------------------- 15a2847172SGrzegorz Jaszczyk 16a2847172SGrzegorz Jaszczyk- marvell_get_iob_memory_map 17a2847172SGrzegorz Jaszczyk Returns the IOB windows configuration and the number of windows 18a2847172SGrzegorz Jaszczyk 19a2847172SGrzegorz JaszczykMandatory structures 20a2847172SGrzegorz Jaszczyk-------------------- 21a2847172SGrzegorz Jaszczyk 22a2847172SGrzegorz Jaszczyk- iob_memory_map 23a2847172SGrzegorz Jaszczyk Array that includes the configuration of the windows. Every window/entry is 24a2847172SGrzegorz Jaszczyk a struct which has 3 parameters: 25a2847172SGrzegorz Jaszczyk 26a2847172SGrzegorz Jaszczyk - Base address of the window 27a2847172SGrzegorz Jaszczyk - Size of the window 28a2847172SGrzegorz Jaszczyk - Target-ID of the window 29a2847172SGrzegorz Jaszczyk 30a2847172SGrzegorz JaszczykTarget ID options 31a2847172SGrzegorz Jaszczyk----------------- 32a2847172SGrzegorz Jaszczyk 33a2847172SGrzegorz Jaszczyk- **0x0** = Internal configuration space 34a2847172SGrzegorz Jaszczyk- **0x1** = MCI0 35a2847172SGrzegorz Jaszczyk- **0x2** = PEX1_X1 36a2847172SGrzegorz Jaszczyk- **0x3** = PEX2_X1 37a2847172SGrzegorz Jaszczyk- **0x4** = PEX0_X4 38a2847172SGrzegorz Jaszczyk- **0x5** = NAND flash 39a2847172SGrzegorz Jaszczyk- **0x6** = RUNIT (NOR/SPI/BootRoom) 40a2847172SGrzegorz Jaszczyk- **0x7** = MCI1 41a2847172SGrzegorz Jaszczyk 42a2847172SGrzegorz JaszczykExample 43a2847172SGrzegorz Jaszczyk------- 44a2847172SGrzegorz Jaszczyk 45a2847172SGrzegorz Jaszczyk.. code:: c 46a2847172SGrzegorz Jaszczyk 47a2847172SGrzegorz Jaszczyk struct addr_map_win iob_memory_map[] = { 48a2847172SGrzegorz Jaszczyk {0x00000000f7000000, 0x0000000001000000, PEX1_TID}, /* PEX1_X1 window */ 49a2847172SGrzegorz Jaszczyk {0x00000000f8000000, 0x0000000001000000, PEX2_TID}, /* PEX2_X1 window */ 50a2847172SGrzegorz Jaszczyk {0x00000000f6000000, 0x0000000001000000, PEX0_TID}, /* PEX0_X4 window */ 51a2847172SGrzegorz Jaszczyk {0x00000000f9000000, 0x0000000001000000, NAND_TID} /* NAND window */ 52a2847172SGrzegorz Jaszczyk }; 53