1a2847172SGrzegorz JaszczykTF-A Build Instructions for Marvell Platforms 2a2847172SGrzegorz Jaszczyk============================================= 3a2847172SGrzegorz Jaszczyk 4a2847172SGrzegorz JaszczykThis section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms. 5a2847172SGrzegorz Jaszczyk 6a2847172SGrzegorz JaszczykBuild Instructions 7a2847172SGrzegorz Jaszczyk------------------ 8a2847172SGrzegorz Jaszczyk(1) Set the cross compiler 9a2847172SGrzegorz Jaszczyk 10a2847172SGrzegorz Jaszczyk .. code:: shell 11a2847172SGrzegorz Jaszczyk 12a2847172SGrzegorz Jaszczyk > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu- 13a2847172SGrzegorz Jaszczyk 14a2847172SGrzegorz Jaszczyk(2) Set path for FIP images: 15a2847172SGrzegorz Jaszczyk 16a2847172SGrzegorz JaszczykSet U-Boot image path (relatively to TF-A root or absolute path) 17a2847172SGrzegorz Jaszczyk 18a2847172SGrzegorz Jaszczyk .. code:: shell 19a2847172SGrzegorz Jaszczyk 20a2847172SGrzegorz Jaszczyk > export BL33=path/to/u-boot.bin 21a2847172SGrzegorz Jaszczyk 22a2847172SGrzegorz JaszczykFor example: if U-Boot project (and its images) is located at ``~/project/u-boot``, 23a2847172SGrzegorz JaszczykBL33 should be ``~/project/u-boot/u-boot.bin`` 24a2847172SGrzegorz Jaszczyk 25a2847172SGrzegorz Jaszczyk .. note:: 26a2847172SGrzegorz Jaszczyk 27a2847172SGrzegorz Jaszczyk *u-boot.bin* should be used and not *u-boot-spl.bin* 28a2847172SGrzegorz Jaszczyk 29eed02440SKonstantin PorotchkinSet MSS/SCP image path (mandatory only for A7K/8K/CN913x) 30a2847172SGrzegorz Jaszczyk 31a2847172SGrzegorz Jaszczyk .. code:: shell 32a2847172SGrzegorz Jaszczyk 33a2847172SGrzegorz Jaszczyk > export SCP_BL2=path/to/mrvl_scp_bl2*.img 34a2847172SGrzegorz Jaszczyk 35a2847172SGrzegorz Jaszczyk(3) Armada-37x0 build requires WTP tools installation. 36a2847172SGrzegorz Jaszczyk 37a2847172SGrzegorz JaszczykSee below in the section "Tools and external components installation". 38a2847172SGrzegorz JaszczykInstall ARM 32-bit cross compiler, which is required for building WTMI image for CM3 39a2847172SGrzegorz Jaszczyk 40a2847172SGrzegorz Jaszczyk .. code:: shell 41a2847172SGrzegorz Jaszczyk 42a2847172SGrzegorz Jaszczyk > sudo apt-get install gcc-arm-linux-gnueabi 43a2847172SGrzegorz Jaszczyk 44a2847172SGrzegorz Jaszczyk(4) Clean previous build residuals (if any) 45a2847172SGrzegorz Jaszczyk 46a2847172SGrzegorz Jaszczyk .. code:: shell 47a2847172SGrzegorz Jaszczyk 48a2847172SGrzegorz Jaszczyk > make distclean 49a2847172SGrzegorz Jaszczyk 50a2847172SGrzegorz Jaszczyk(5) Build TF-A 51a2847172SGrzegorz Jaszczyk 52a2847172SGrzegorz JaszczykThere are several build options: 53a2847172SGrzegorz Jaszczyk 5424e6e10bSPali Rohár- PLAT 5524e6e10bSPali Rohár 5624e6e10bSPali Rohár Supported Marvell platforms are: 5724e6e10bSPali Rohár 5824e6e10bSPali Rohár - a3700 - A3720 DB, EspressoBin and Turris MOX 5924e6e10bSPali Rohár - a70x0 6024e6e10bSPali Rohár - a70x0_amc - AMC board 6124e6e10bSPali Rohár - a80x0 6224e6e10bSPali Rohár - a80x0_mcbin - MacchiatoBin 6324e6e10bSPali Rohár - a80x0_puzzle - IEI Puzzle-M801 6424e6e10bSPali Rohár - t9130 - CN913x 6524e6e10bSPali Rohár 66a2847172SGrzegorz Jaszczyk- DEBUG 67a2847172SGrzegorz Jaszczyk 68a2847172SGrzegorz Jaszczyk Default is without debug information (=0). in order to enable it use ``DEBUG=1``. 69a2847172SGrzegorz Jaszczyk Must be disabled when building UART recovery images due to current console driver 70a2847172SGrzegorz Jaszczyk implementation that is not compatible with Xmodem protocol used for boot image download. 71a2847172SGrzegorz Jaszczyk 72a2847172SGrzegorz Jaszczyk- LOG_LEVEL 73a2847172SGrzegorz Jaszczyk 74a2847172SGrzegorz Jaszczyk Defines the level of logging which will be purged to the default output port. 75a2847172SGrzegorz Jaszczyk 76f20cb7e5SPali Rohár - 0 - LOG_LEVEL_NONE 77f20cb7e5SPali Rohár - 10 - LOG_LEVEL_ERROR 78f20cb7e5SPali Rohár - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0) 79f20cb7e5SPali Rohár - 30 - LOG_LEVEL_WARNING 80f20cb7e5SPali Rohár - 40 - LOG_LEVEL_INFO (default for DEBUG=1) 81f20cb7e5SPali Rohár - 50 - LOG_LEVEL_VERBOSE 82a2847172SGrzegorz Jaszczyk 83a2847172SGrzegorz Jaszczyk- USE_COHERENT_MEM 84a2847172SGrzegorz Jaszczyk 85a2847172SGrzegorz Jaszczyk This flag determines whether to include the coherent memory region in the 86f20cb7e5SPali Rohár BL memory map or not. Enabled by default. 87a2847172SGrzegorz Jaszczyk 88a2847172SGrzegorz Jaszczyk- LLC_ENABLE 89a2847172SGrzegorz Jaszczyk 90a2847172SGrzegorz Jaszczyk Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``). 91a2847172SGrzegorz Jaszczyk 925a40d70fSKonstantin Porotchkin- LLC_SRAM 935a40d70fSKonstantin Porotchkin 940a977b9bSKonstantin Porotchkin Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used 950a977b9bSKonstantin Porotchkin by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows 960a977b9bSKonstantin Porotchkin for SRAM address range at BL31 execution stage with window target set to DRAM-0. 970a977b9bSKonstantin Porotchkin When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM. 980a977b9bSKonstantin Porotchkin There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n. 990a977b9bSKonstantin Porotchkin Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y. 1005a40d70fSKonstantin Porotchkin 101d9243f26SMarek Behún- CM3_SYSTEM_RESET 102d9243f26SMarek Behún 103d9243f26SMarek Behún For Armada37x0 only, when ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will 104d9243f26SMarek Behún be used for system reset. 105d9243f26SMarek Behún TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the 106d9243f26SMarek Behún Cortex-M3 secure coprocessor. 107d9243f26SMarek Behún The firmware running in the coprocessor must either implement this functionality or 108d9243f26SMarek Behún ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell 109d9243f26SMarek Behún repository). If this option is enabled but the firmware does not support this command, 110d9243f26SMarek Behún an error message will be printed prior trying to reboot via the usual way. 111d9243f26SMarek Behún 112d9243f26SMarek Behún This option is needed on Turris MOX as a workaround to a HW bug which causes reset to 113d9243f26SMarek Behún sometime hang the board. 114d9243f26SMarek Behún 115a2847172SGrzegorz Jaszczyk- MARVELL_SECURE_BOOT 116a2847172SGrzegorz Jaszczyk 117a2847172SGrzegorz Jaszczyk Build trusted(=1)/non trusted(=0) image, default is non trusted. 118a2847172SGrzegorz Jaszczyk 119a2847172SGrzegorz Jaszczyk- BLE_PATH 120a2847172SGrzegorz Jaszczyk 121eed02440SKonstantin Porotchkin Points to BLE (Binary ROM extension) sources folder. 122eed02440SKonstantin Porotchkin Only required for A7K/8K/CN913x builds. 123a2847172SGrzegorz Jaszczyk The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``. 124a2847172SGrzegorz Jaszczyk 125a2847172SGrzegorz Jaszczyk- MV_DDR_PATH 126a2847172SGrzegorz Jaszczyk 127eed02440SKonstantin Porotchkin For A7K/8K/CN913x, use this parameter to point to mv_ddr driver sources to allow BLE build. For A37x0, 128a2847172SGrzegorz Jaszczyk it is used for ddr_tool build. 129a2847172SGrzegorz Jaszczyk 130a2847172SGrzegorz Jaszczyk Usage example: MV_DDR_PATH=path/to/mv_ddr 131a2847172SGrzegorz Jaszczyk 132eed02440SKonstantin Porotchkin The parameter is optional for A7K/8K/CN913x, when this parameter is not set, the mv_ddr 133a2847172SGrzegorz Jaszczyk sources are expected to be located at: drivers/marvell/mv_ddr. However, the parameter 134a2847172SGrzegorz Jaszczyk is necessary for A37x0. 135a2847172SGrzegorz Jaszczyk 136a2847172SGrzegorz Jaszczyk For the mv_ddr source location, check the section "Tools and external components installation" 137a2847172SGrzegorz Jaszczyk 138eed02440SKonstantin Porotchkin- CP_NUM 139eed02440SKonstantin Porotchkin 140eed02440SKonstantin Porotchkin Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted, 141eed02440SKonstantin Porotchkin the build uses the default number of CPs, which is a number of embedded CPs inside the 142eed02440SKonstantin Porotchkin package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC 143eed02440SKonstantin Porotchkin family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid 144eed02440SKonstantin Porotchkin values with CP_NUM are in a range of 1 to 3. 145eed02440SKonstantin Porotchkin 146a2847172SGrzegorz Jaszczyk- DDR_TOPOLOGY 147a2847172SGrzegorz Jaszczyk 148a2847172SGrzegorz Jaszczyk For Armada37x0 only, the DDR topology map index/name, default is 0. 149a2847172SGrzegorz Jaszczyk 150a2847172SGrzegorz Jaszczyk Supported Options: 1519c3fffdcSPali Rohár - 0 - DDR3 1CS 512MB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5) 1529c3fffdcSPali Rohár - 1 - DDR4 1CS 512MB (DB-88F3720-DDR4-Modular) 1539c3fffdcSPali Rohár - 2 - DDR3 2CS 1GB (EspressoBin V3-V5) 1549c3fffdcSPali Rohár - 3 - DDR4 2CS 4GB (DB-88F3720-DDR4-Modular) 1559c3fffdcSPali Rohár - 4 - DDR3 1CS 1GB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5) 1569c3fffdcSPali Rohár - 5 - DDR4 1CS 1GB (EspressoBin V7, EspressoBin-Ultra) 1579c3fffdcSPali Rohár - 6 - DDR4 2CS 2GB (EspressoBin V7) 1589c3fffdcSPali Rohár - 7 - DDR3 2CS 2GB (EspressoBin V3-V5) 1599c3fffdcSPali Rohár - CUST - CUSTOMER BOARD (Customer board settings) 160a2847172SGrzegorz Jaszczyk 161a2847172SGrzegorz Jaszczyk- CLOCKSPRESET 162a2847172SGrzegorz Jaszczyk 163a2847172SGrzegorz Jaszczyk For Armada37x0 only, the clock tree configuration preset including CPU and DDR frequency, 164a2847172SGrzegorz Jaszczyk default is CPU_800_DDR_800. 165a2847172SGrzegorz Jaszczyk 166a2847172SGrzegorz Jaszczyk - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz 167a2847172SGrzegorz Jaszczyk - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz 168a2847172SGrzegorz Jaszczyk - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz 169a2847172SGrzegorz Jaszczyk - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz 170a2847172SGrzegorz Jaszczyk 17123abf07cSPali Rohár Look at Armada37x0 chip package marking on board to identify correct CPU frequency. 17223abf07cSPali Rohár The last line on package marking (next line after the 88F37x0 line) should contain: 17323abf07cSPali Rohár 17423abf07cSPali Rohár - C080 or I080 - chip with 800 MHz CPU - use ``CLOCKSPRESET=CPU_800_DDR_800`` 17523abf07cSPali Rohár - C100 or I100 - chip with 1000 MHz CPU - use ``CLOCKSPRESET=CPU_1000_DDR_800`` 17623abf07cSPali Rohár - C120 - chip with 1200 MHz CPU - use ``CLOCKSPRESET=CPU_1200_DDR_750`` 17723abf07cSPali Rohár 178a2847172SGrzegorz Jaszczyk- BOOTDEV 179a2847172SGrzegorz Jaszczyk 180a2847172SGrzegorz Jaszczyk For Armada37x0 only, the flash boot device, default is ``SPINOR``. 181a2847172SGrzegorz Jaszczyk 182a2847172SGrzegorz Jaszczyk Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``: 183a2847172SGrzegorz Jaszczyk 184a2847172SGrzegorz Jaszczyk - SPINOR - SPI NOR flash boot 185a2847172SGrzegorz Jaszczyk - SPINAND - SPI NAND flash boot 186a2847172SGrzegorz Jaszczyk - EMMCNORM - eMMC Download Mode 187a2847172SGrzegorz Jaszczyk 188a2847172SGrzegorz Jaszczyk Download boot loader or program code from eMMC flash into CM3 or CA53 189a2847172SGrzegorz Jaszczyk Requires full initialization and command sequence 190a2847172SGrzegorz Jaszczyk 191a2847172SGrzegorz Jaszczyk - SATA - SATA device boot 192a2847172SGrzegorz Jaszczyk 193a2847172SGrzegorz Jaszczyk- PARTNUM 194a2847172SGrzegorz Jaszczyk 195a2847172SGrzegorz Jaszczyk For Armada37x0 only, the boot partition number, default is 0. 196a2847172SGrzegorz Jaszczyk 197a2847172SGrzegorz Jaszczyk To boot from eMMC, the value should be aligned with the parameter in 198a2847172SGrzegorz Jaszczyk U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is 199a2847172SGrzegorz Jaszczyk 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot 200a2847172SGrzegorz Jaszczyk build instructions. 201a2847172SGrzegorz Jaszczyk 202a2847172SGrzegorz Jaszczyk- WTMI_IMG 203a2847172SGrzegorz Jaszczyk 204a2847172SGrzegorz Jaszczyk For Armada37x0 only, the path of the WTMI image can point to an image which 205a2847172SGrzegorz Jaszczyk does nothing, an image which supports EFUSE or a customized CM3 firmware 206a2847172SGrzegorz Jaszczyk binary. The default image is wtmi.bin that built from sources in WTP 207a2847172SGrzegorz Jaszczyk folder, which is the next option. If the default image is OK, then this 208a2847172SGrzegorz Jaszczyk option should be skipped. 209a2847172SGrzegorz Jaszczyk 210a2847172SGrzegorz Jaszczyk- WTP 211a2847172SGrzegorz Jaszczyk 212a2847172SGrzegorz Jaszczyk For Armada37x0 only, use this parameter to point to wtptools source code 213a2847172SGrzegorz Jaszczyk directory, which can be found as a3700_utils.zip in the release. Usage 214a2847172SGrzegorz Jaszczyk example: ``WTP=/path/to/a3700_utils`` 215a2847172SGrzegorz Jaszczyk 216f20cb7e5SPali Rohár- CRYPTOPP_PATH 217f20cb7e5SPali Rohár 218f20cb7e5SPali Rohár For Armada37x0 only, use this parameter tp point to Crypto++ source code 219f20cb7e5SPali Rohár directory, which is required for building WTP image tool. 220f20cb7e5SPali Rohár 221f20cb7e5SPali Rohár 222a2847172SGrzegorz JaszczykFor example, in order to build the image in debug mode with log level up to 'notice' level run 223a2847172SGrzegorz Jaszczyk 224a2847172SGrzegorz Jaszczyk.. code:: shell 225a2847172SGrzegorz Jaszczyk 226f20cb7e5SPali Rohár > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash 227a2847172SGrzegorz Jaszczyk 228a2847172SGrzegorz JaszczykAnd if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level, 229a2847172SGrzegorz Jaszczykthe image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS, 230a2847172SGrzegorz Jaszczykthe image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command 231a2847172SGrzegorz Jaszczykline is as following 232a2847172SGrzegorz Jaszczyk 233a2847172SGrzegorz Jaszczyk.. code:: shell 234a2847172SGrzegorz Jaszczyk 235a2847172SGrzegorz Jaszczyk > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \ 236f20cb7e5SPali Rohár MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \ 237f20cb7e5SPali Rohár MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \ 238f20cb7e5SPali Rohár CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \ 239f20cb7e5SPali Rohár all fip mrvl_bootimage mrvl_flash 240f20cb7e5SPali Rohár 241f20cb7e5SPali RohárTo build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command: 242f20cb7e5SPali Rohár 243f20cb7e5SPali Rohár.. code:: shell 244f20cb7e5SPali Rohár 245d9243f26SMarek Behún > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \ 246d9243f26SMarek Behún CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage 247a2847172SGrzegorz Jaszczyk 248*ff46a41dSPali RohárHere is full example how to build production release of Marvell firmware image (concatenated 249*ff46a41dSPali Rohárbinary of Marvell secure firmware, TF-A and U-Boot) for EspressoBin board (PLAT=a3700) with 250*ff46a41dSPali Rohár1GHz CPU (CLOCKSPRESET=CPU_1000_DDR_800) and 1GB DDR4 RAM (DDR_TOPOLOGY=5): 251d0b367b7SLuka Kovacic 252d0b367b7SLuka Kovacic.. code:: shell 253d0b367b7SLuka Kovacic 254*ff46a41dSPali Rohár > git clone https://review.trustedfirmware.org/TF-A/trusted-firmware-a 255*ff46a41dSPali Rohár > git clone https://gitlab.denx.de/u-boot/u-boot.git 256*ff46a41dSPali Rohár > git clone https://github.com/weidai11/cryptopp.git 257*ff46a41dSPali Rohár > git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git -b master 258*ff46a41dSPali Rohár > git clone https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git -b master 259*ff46a41dSPali Rohár > make -C u-boot CROSS_COMPILE=aarch64-linux-gnu- mvebu_espressobin-88f3720_defconfig u-boot.bin 260*ff46a41dSPali Rohár > make -C trusted-firmware-a CROSS_COMPILE=aarch64-linux-gnu- CROSS_CM3=arm-linux-gnueabi- \ 261*ff46a41dSPali Rohár USE_COHERENT_MEM=0 PLAT=a3700 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 \ 262*ff46a41dSPali Rohár MV_DDR_PATH=$PWD/mv-ddr-marvell/ WTP=$PWD/A3700-utils-marvell/ CRYPTOPP_PATH=$PWD/cryptopp/ \ 263*ff46a41dSPali Rohár BL33=$PWD/u-boot/u-boot.bin mrvl_flash 264*ff46a41dSPali Rohár 265*ff46a41dSPali RohárProduced Marvell firmware flash image: ``trusted-firmware-a/build/a3700/release/flash-image.bin`` 266d0b367b7SLuka Kovacic 267a2847172SGrzegorz JaszczykSpecial Build Flags 268a2847172SGrzegorz Jaszczyk-------------------- 269a2847172SGrzegorz Jaszczyk 270a2847172SGrzegorz Jaszczyk- PLAT_RECOVERY_IMAGE_ENABLE 271a2847172SGrzegorz Jaszczyk When set this option to enable secondary recovery function when build atf. 272a2847172SGrzegorz Jaszczyk In order to build UART recovery image this operation should be disabled for 273eed02440SKonstantin Porotchkin A7K/8K/CN913x because of hardware limitation (boot from secondary image 274a2847172SGrzegorz Jaszczyk can interrupt UART recovery process). This MACRO definition is set in 275a2847172SGrzegorz Jaszczyk ``plat/marvell/armada/a8k/common/include/platform_def.h`` file. 276a2847172SGrzegorz Jaszczyk 27757adbf37SAlex Leibovich- DDR32 27857adbf37SAlex Leibovich In order to work in 32bit DDR, instead of the default 64bit ECC DDR, 27957adbf37SAlex Leibovich this flag should be set to 1. 28057adbf37SAlex Leibovich 281a2847172SGrzegorz JaszczykFor more information about build options, please refer to the 282a2847172SGrzegorz Jaszczyk:ref:`Build Options` document. 283a2847172SGrzegorz Jaszczyk 284a2847172SGrzegorz Jaszczyk 285a2847172SGrzegorz JaszczykBuild output 286a2847172SGrzegorz Jaszczyk------------ 287f20cb7e5SPali RohárMarvell's TF-A compilation generates 8 files: 288a2847172SGrzegorz Jaszczyk 289f60f1e84SPali Rohár - ble.bin - BLe image (not available for Armada37x0) 290a2847172SGrzegorz Jaszczyk - bl1.bin - BL1 image 291a2847172SGrzegorz Jaszczyk - bl2.bin - BL2 image 292a2847172SGrzegorz Jaszczyk - bl31.bin - BL31 image 293a2847172SGrzegorz Jaszczyk - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images) 294a2847172SGrzegorz Jaszczyk - boot-image.bin - TF-A image (contains BL1 and FIP images) 295f60f1e84SPali Rohár - flash-image.bin - Flashable Marvell firmware image. For Armada37x0 it 296f60f1e84SPali Rohár contains TIM, WTMI and boot-image.bin images. For other platforms it contains 297f60f1e84SPali Rohár BLe and boot-image.bin images. Should be placed on the boot flash/device. 298f20cb7e5SPali Rohár - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images 299f20cb7e5SPali Rohár for booting via UART. Could be loaded via Marvell's WtpDownload tool from 300f20cb7e5SPali Rohár A3700-utils-marvell repository. 301f20cb7e5SPali Rohár 302f20cb7e5SPali RohárAdditional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file and target 303f20cb7e5SPali Rohár``mrvl_flash`` produce final ``flash-image.bin`` and ``uart-images.tgz.bin`` files. 304a2847172SGrzegorz Jaszczyk 305a2847172SGrzegorz Jaszczyk 306a2847172SGrzegorz JaszczykTools and external components installation 307a2847172SGrzegorz Jaszczyk------------------------------------------ 308a2847172SGrzegorz Jaszczyk 309a2847172SGrzegorz JaszczykArmada37x0 Builds require installation of 3 components 310a2847172SGrzegorz Jaszczyk~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 311a2847172SGrzegorz Jaszczyk 312a2847172SGrzegorz Jaszczyk(1) ARM cross compiler capable of building images for the service CPU (CM3). 313a2847172SGrzegorz Jaszczyk This component is usually included in the Linux host packages. 314a2847172SGrzegorz Jaszczyk On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed 315a2847172SGrzegorz Jaszczyk using the following command 316a2847172SGrzegorz Jaszczyk 317a2847172SGrzegorz Jaszczyk .. code:: shell 318a2847172SGrzegorz Jaszczyk 319a2847172SGrzegorz Jaszczyk > sudo apt-get install gcc-arm-linux-gnueabi 320a2847172SGrzegorz Jaszczyk 321a2847172SGrzegorz Jaszczyk Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be 322a2847172SGrzegorz Jaszczyk overwritten using the environment variable ``CROSS_CM3``. 323a2847172SGrzegorz Jaszczyk Example for BASH shell 324a2847172SGrzegorz Jaszczyk 325a2847172SGrzegorz Jaszczyk .. code:: shell 326a2847172SGrzegorz Jaszczyk 327a2847172SGrzegorz Jaszczyk > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi 328a2847172SGrzegorz Jaszczyk 329a2847172SGrzegorz Jaszczyk(2) DDR initialization library sources (mv_ddr) available at the following repository 330583079aeSPali Rohár (use the "mv-ddr-devel" branch): 331a2847172SGrzegorz Jaszczyk 332a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 333a2847172SGrzegorz Jaszczyk 334583079aeSPali Rohár(3) Armada3700 tools available at the following repository 335583079aeSPali Rohár (use the "A3700_utils-armada-18.12-fixed" branch): 336a2847172SGrzegorz Jaszczyk 337a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git 338a2847172SGrzegorz Jaszczyk 339f20cb7e5SPali Rohár(4) Crypto++ library available at the following repository: 340f20cb7e5SPali Rohár 341f20cb7e5SPali Rohár https://github.com/weidai11/cryptopp.git 342f20cb7e5SPali Rohár 343a2847172SGrzegorz JaszczykArmada70x0 and Armada80x0 Builds require installation of an additional component 344a2847172SGrzegorz Jaszczyk~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 345a2847172SGrzegorz Jaszczyk 346a2847172SGrzegorz Jaszczyk(1) DDR initialization library sources (mv_ddr) available at the following repository 347583079aeSPali Rohár (use the "mv-ddr-devel" branch): 348a2847172SGrzegorz Jaszczyk 349a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 350