1a2847172SGrzegorz JaszczykTF-A Build Instructions for Marvell Platforms 2a2847172SGrzegorz Jaszczyk============================================= 3a2847172SGrzegorz Jaszczyk 4a2847172SGrzegorz JaszczykThis section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms. 5a2847172SGrzegorz Jaszczyk 6a2847172SGrzegorz JaszczykBuild Instructions 7a2847172SGrzegorz Jaszczyk------------------ 8a2847172SGrzegorz Jaszczyk(1) Set the cross compiler 9a2847172SGrzegorz Jaszczyk 10a2847172SGrzegorz Jaszczyk .. code:: shell 11a2847172SGrzegorz Jaszczyk 12a2847172SGrzegorz Jaszczyk > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu- 13a2847172SGrzegorz Jaszczyk 14a2847172SGrzegorz Jaszczyk(2) Set path for FIP images: 15a2847172SGrzegorz Jaszczyk 16a2847172SGrzegorz JaszczykSet U-Boot image path (relatively to TF-A root or absolute path) 17a2847172SGrzegorz Jaszczyk 18a2847172SGrzegorz Jaszczyk .. code:: shell 19a2847172SGrzegorz Jaszczyk 20a2847172SGrzegorz Jaszczyk > export BL33=path/to/u-boot.bin 21a2847172SGrzegorz Jaszczyk 22a2847172SGrzegorz JaszczykFor example: if U-Boot project (and its images) is located at ``~/project/u-boot``, 23a2847172SGrzegorz JaszczykBL33 should be ``~/project/u-boot/u-boot.bin`` 24a2847172SGrzegorz Jaszczyk 25a2847172SGrzegorz Jaszczyk .. note:: 26a2847172SGrzegorz Jaszczyk 27a2847172SGrzegorz Jaszczyk *u-boot.bin* should be used and not *u-boot-spl.bin* 28a2847172SGrzegorz Jaszczyk 29eed02440SKonstantin PorotchkinSet MSS/SCP image path (mandatory only for A7K/8K/CN913x) 30a2847172SGrzegorz Jaszczyk 31a2847172SGrzegorz Jaszczyk .. code:: shell 32a2847172SGrzegorz Jaszczyk 33a2847172SGrzegorz Jaszczyk > export SCP_BL2=path/to/mrvl_scp_bl2*.img 34a2847172SGrzegorz Jaszczyk 35a2847172SGrzegorz Jaszczyk(3) Armada-37x0 build requires WTP tools installation. 36a2847172SGrzegorz Jaszczyk 37a2847172SGrzegorz JaszczykSee below in the section "Tools and external components installation". 38a2847172SGrzegorz JaszczykInstall ARM 32-bit cross compiler, which is required for building WTMI image for CM3 39a2847172SGrzegorz Jaszczyk 40a2847172SGrzegorz Jaszczyk .. code:: shell 41a2847172SGrzegorz Jaszczyk 42a2847172SGrzegorz Jaszczyk > sudo apt-get install gcc-arm-linux-gnueabi 43a2847172SGrzegorz Jaszczyk 44a2847172SGrzegorz Jaszczyk(4) Clean previous build residuals (if any) 45a2847172SGrzegorz Jaszczyk 46a2847172SGrzegorz Jaszczyk .. code:: shell 47a2847172SGrzegorz Jaszczyk 48a2847172SGrzegorz Jaszczyk > make distclean 49a2847172SGrzegorz Jaszczyk 50a2847172SGrzegorz Jaszczyk(5) Build TF-A 51a2847172SGrzegorz Jaszczyk 52a2847172SGrzegorz JaszczykThere are several build options: 53a2847172SGrzegorz Jaszczyk 54a2847172SGrzegorz Jaszczyk- DEBUG 55a2847172SGrzegorz Jaszczyk 56a2847172SGrzegorz Jaszczyk Default is without debug information (=0). in order to enable it use ``DEBUG=1``. 57a2847172SGrzegorz Jaszczyk Must be disabled when building UART recovery images due to current console driver 58a2847172SGrzegorz Jaszczyk implementation that is not compatible with Xmodem protocol used for boot image download. 59a2847172SGrzegorz Jaszczyk 60a2847172SGrzegorz Jaszczyk- LOG_LEVEL 61a2847172SGrzegorz Jaszczyk 62a2847172SGrzegorz Jaszczyk Defines the level of logging which will be purged to the default output port. 63a2847172SGrzegorz Jaszczyk 64f20cb7e5SPali Rohár - 0 - LOG_LEVEL_NONE 65f20cb7e5SPali Rohár - 10 - LOG_LEVEL_ERROR 66f20cb7e5SPali Rohár - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0) 67f20cb7e5SPali Rohár - 30 - LOG_LEVEL_WARNING 68f20cb7e5SPali Rohár - 40 - LOG_LEVEL_INFO (default for DEBUG=1) 69f20cb7e5SPali Rohár - 50 - LOG_LEVEL_VERBOSE 70a2847172SGrzegorz Jaszczyk 71a2847172SGrzegorz Jaszczyk- USE_COHERENT_MEM 72a2847172SGrzegorz Jaszczyk 73a2847172SGrzegorz Jaszczyk This flag determines whether to include the coherent memory region in the 74f20cb7e5SPali Rohár BL memory map or not. Enabled by default. 75a2847172SGrzegorz Jaszczyk 76a2847172SGrzegorz Jaszczyk- LLC_ENABLE 77a2847172SGrzegorz Jaszczyk 78a2847172SGrzegorz Jaszczyk Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``). 79a2847172SGrzegorz Jaszczyk 805a40d70fSKonstantin Porotchkin- LLC_SRAM 815a40d70fSKonstantin Porotchkin 820a977b9bSKonstantin Porotchkin Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used 830a977b9bSKonstantin Porotchkin by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows 840a977b9bSKonstantin Porotchkin for SRAM address range at BL31 execution stage with window target set to DRAM-0. 850a977b9bSKonstantin Porotchkin When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM. 860a977b9bSKonstantin Porotchkin There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n. 870a977b9bSKonstantin Porotchkin Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y. 885a40d70fSKonstantin Porotchkin 89*d9243f26SMarek Behún- CM3_SYSTEM_RESET 90*d9243f26SMarek Behún 91*d9243f26SMarek Behún For Armada37x0 only, when ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will 92*d9243f26SMarek Behún be used for system reset. 93*d9243f26SMarek Behún TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the 94*d9243f26SMarek Behún Cortex-M3 secure coprocessor. 95*d9243f26SMarek Behún The firmware running in the coprocessor must either implement this functionality or 96*d9243f26SMarek Behún ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell 97*d9243f26SMarek Behún repository). If this option is enabled but the firmware does not support this command, 98*d9243f26SMarek Behún an error message will be printed prior trying to reboot via the usual way. 99*d9243f26SMarek Behún 100*d9243f26SMarek Behún This option is needed on Turris MOX as a workaround to a HW bug which causes reset to 101*d9243f26SMarek Behún sometime hang the board. 102*d9243f26SMarek Behún 103a2847172SGrzegorz Jaszczyk- MARVELL_SECURE_BOOT 104a2847172SGrzegorz Jaszczyk 105a2847172SGrzegorz Jaszczyk Build trusted(=1)/non trusted(=0) image, default is non trusted. 106a2847172SGrzegorz Jaszczyk 107a2847172SGrzegorz Jaszczyk- BLE_PATH 108a2847172SGrzegorz Jaszczyk 109eed02440SKonstantin Porotchkin Points to BLE (Binary ROM extension) sources folder. 110eed02440SKonstantin Porotchkin Only required for A7K/8K/CN913x builds. 111a2847172SGrzegorz Jaszczyk The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``. 112a2847172SGrzegorz Jaszczyk 113a2847172SGrzegorz Jaszczyk- MV_DDR_PATH 114a2847172SGrzegorz Jaszczyk 115eed02440SKonstantin Porotchkin For A7K/8K/CN913x, use this parameter to point to mv_ddr driver sources to allow BLE build. For A37x0, 116a2847172SGrzegorz Jaszczyk it is used for ddr_tool build. 117a2847172SGrzegorz Jaszczyk 118a2847172SGrzegorz Jaszczyk Usage example: MV_DDR_PATH=path/to/mv_ddr 119a2847172SGrzegorz Jaszczyk 120eed02440SKonstantin Porotchkin The parameter is optional for A7K/8K/CN913x, when this parameter is not set, the mv_ddr 121a2847172SGrzegorz Jaszczyk sources are expected to be located at: drivers/marvell/mv_ddr. However, the parameter 122a2847172SGrzegorz Jaszczyk is necessary for A37x0. 123a2847172SGrzegorz Jaszczyk 124a2847172SGrzegorz Jaszczyk For the mv_ddr source location, check the section "Tools and external components installation" 125a2847172SGrzegorz Jaszczyk 126eed02440SKonstantin Porotchkin- CP_NUM 127eed02440SKonstantin Porotchkin 128eed02440SKonstantin Porotchkin Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted, 129eed02440SKonstantin Porotchkin the build uses the default number of CPs, which is a number of embedded CPs inside the 130eed02440SKonstantin Porotchkin package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC 131eed02440SKonstantin Porotchkin family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid 132eed02440SKonstantin Porotchkin values with CP_NUM are in a range of 1 to 3. 133eed02440SKonstantin Porotchkin 134a2847172SGrzegorz Jaszczyk- DDR_TOPOLOGY 135a2847172SGrzegorz Jaszczyk 136a2847172SGrzegorz Jaszczyk For Armada37x0 only, the DDR topology map index/name, default is 0. 137a2847172SGrzegorz Jaszczyk 138a2847172SGrzegorz Jaszczyk Supported Options: 139f20cb7e5SPali Rohár - 0 - DDR3 1CS: DB-88F3720-DDR3-Modular (512MB); EspressoBIN (512MB) 140f20cb7e5SPali Rohár - 1 - DDR4 1CS: DB-88F3720-DDR4-Modular (512MB) 141f20cb7e5SPali Rohár - 2 - DDR3 2CS: EspressoBIN V3-V5 (1GB 2CS) 142f20cb7e5SPali Rohár - 3 - DDR4 2CS: DB-88F3720-DDR4-Modular (4GB) 143f20cb7e5SPali Rohár - 4 - DDR3 1CS: DB-88F3720-DDR3-Modular (1GB); EspressoBIN V3-V5 (1GB 1CS) 144f20cb7e5SPali Rohár - 5 - DDR4 1CS: EspressoBin V7 (1GB) 145f20cb7e5SPali Rohár - 6 - DDR4 2CS: EspressoBin V7 (2GB) 146f20cb7e5SPali Rohár - 7 - DDR3 2CS: EspressoBin V3-V5 (2GB) 147f20cb7e5SPali Rohár - CUST - CUSTOMER: Customer board, DDR3 1CS 512MB 148a2847172SGrzegorz Jaszczyk 149a2847172SGrzegorz Jaszczyk- CLOCKSPRESET 150a2847172SGrzegorz Jaszczyk 151a2847172SGrzegorz Jaszczyk For Armada37x0 only, the clock tree configuration preset including CPU and DDR frequency, 152a2847172SGrzegorz Jaszczyk default is CPU_800_DDR_800. 153a2847172SGrzegorz Jaszczyk 154a2847172SGrzegorz Jaszczyk - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz 155a2847172SGrzegorz Jaszczyk - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz 156a2847172SGrzegorz Jaszczyk - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz 157a2847172SGrzegorz Jaszczyk - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz 158a2847172SGrzegorz Jaszczyk 159a2847172SGrzegorz Jaszczyk- BOOTDEV 160a2847172SGrzegorz Jaszczyk 161a2847172SGrzegorz Jaszczyk For Armada37x0 only, the flash boot device, default is ``SPINOR``. 162a2847172SGrzegorz Jaszczyk 163a2847172SGrzegorz Jaszczyk Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``: 164a2847172SGrzegorz Jaszczyk 165a2847172SGrzegorz Jaszczyk - SPINOR - SPI NOR flash boot 166a2847172SGrzegorz Jaszczyk - SPINAND - SPI NAND flash boot 167a2847172SGrzegorz Jaszczyk - EMMCNORM - eMMC Download Mode 168a2847172SGrzegorz Jaszczyk 169a2847172SGrzegorz Jaszczyk Download boot loader or program code from eMMC flash into CM3 or CA53 170a2847172SGrzegorz Jaszczyk Requires full initialization and command sequence 171a2847172SGrzegorz Jaszczyk 172a2847172SGrzegorz Jaszczyk - SATA - SATA device boot 173a2847172SGrzegorz Jaszczyk 174a2847172SGrzegorz Jaszczyk- PARTNUM 175a2847172SGrzegorz Jaszczyk 176a2847172SGrzegorz Jaszczyk For Armada37x0 only, the boot partition number, default is 0. 177a2847172SGrzegorz Jaszczyk 178a2847172SGrzegorz Jaszczyk To boot from eMMC, the value should be aligned with the parameter in 179a2847172SGrzegorz Jaszczyk U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is 180a2847172SGrzegorz Jaszczyk 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot 181a2847172SGrzegorz Jaszczyk build instructions. 182a2847172SGrzegorz Jaszczyk 183a2847172SGrzegorz Jaszczyk- WTMI_IMG 184a2847172SGrzegorz Jaszczyk 185a2847172SGrzegorz Jaszczyk For Armada37x0 only, the path of the WTMI image can point to an image which 186a2847172SGrzegorz Jaszczyk does nothing, an image which supports EFUSE or a customized CM3 firmware 187a2847172SGrzegorz Jaszczyk binary. The default image is wtmi.bin that built from sources in WTP 188a2847172SGrzegorz Jaszczyk folder, which is the next option. If the default image is OK, then this 189a2847172SGrzegorz Jaszczyk option should be skipped. 190a2847172SGrzegorz Jaszczyk 191a2847172SGrzegorz Jaszczyk- WTP 192a2847172SGrzegorz Jaszczyk 193a2847172SGrzegorz Jaszczyk For Armada37x0 only, use this parameter to point to wtptools source code 194a2847172SGrzegorz Jaszczyk directory, which can be found as a3700_utils.zip in the release. Usage 195a2847172SGrzegorz Jaszczyk example: ``WTP=/path/to/a3700_utils`` 196a2847172SGrzegorz Jaszczyk 197f20cb7e5SPali Rohár- CRYPTOPP_PATH 198f20cb7e5SPali Rohár 199f20cb7e5SPali Rohár For Armada37x0 only, use this parameter tp point to Crypto++ source code 200f20cb7e5SPali Rohár directory, which is required for building WTP image tool. 201f20cb7e5SPali Rohár 202f20cb7e5SPali Rohár 203a2847172SGrzegorz JaszczykFor example, in order to build the image in debug mode with log level up to 'notice' level run 204a2847172SGrzegorz Jaszczyk 205a2847172SGrzegorz Jaszczyk.. code:: shell 206a2847172SGrzegorz Jaszczyk 207f20cb7e5SPali Rohár > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash 208a2847172SGrzegorz Jaszczyk 209a2847172SGrzegorz JaszczykAnd if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level, 210a2847172SGrzegorz Jaszczykthe image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS, 211a2847172SGrzegorz Jaszczykthe image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command 212a2847172SGrzegorz Jaszczykline is as following 213a2847172SGrzegorz Jaszczyk 214a2847172SGrzegorz Jaszczyk.. code:: shell 215a2847172SGrzegorz Jaszczyk 216a2847172SGrzegorz Jaszczyk > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \ 217f20cb7e5SPali Rohár MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \ 218f20cb7e5SPali Rohár MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \ 219f20cb7e5SPali Rohár CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \ 220f20cb7e5SPali Rohár all fip mrvl_bootimage mrvl_flash 221f20cb7e5SPali Rohár 222f20cb7e5SPali RohárTo build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command: 223f20cb7e5SPali Rohár 224f20cb7e5SPali Rohár.. code:: shell 225f20cb7e5SPali Rohár 226*d9243f26SMarek Behún > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \ 227*d9243f26SMarek Behún CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage 228a2847172SGrzegorz Jaszczyk 229a2847172SGrzegorz JaszczykSupported MARVELL_PLATFORM are: 230a2847172SGrzegorz Jaszczyk - a3700 (for both A3720 DB and EspressoBin) 231a2847172SGrzegorz Jaszczyk - a70x0 232a2847172SGrzegorz Jaszczyk - a70x0_amc (for AMC board) 233a2847172SGrzegorz Jaszczyk - a80x0 234eed02440SKonstantin Porotchkin - a80x0_mcbin (for MacchiatoBin) 235eed02440SKonstantin Porotchkin - t9130 (OcteonTX2 CN913x) 236a2847172SGrzegorz Jaszczyk 237a2847172SGrzegorz JaszczykSpecial Build Flags 238a2847172SGrzegorz Jaszczyk-------------------- 239a2847172SGrzegorz Jaszczyk 240a2847172SGrzegorz Jaszczyk- PLAT_RECOVERY_IMAGE_ENABLE 241a2847172SGrzegorz Jaszczyk When set this option to enable secondary recovery function when build atf. 242a2847172SGrzegorz Jaszczyk In order to build UART recovery image this operation should be disabled for 243eed02440SKonstantin Porotchkin A7K/8K/CN913x because of hardware limitation (boot from secondary image 244a2847172SGrzegorz Jaszczyk can interrupt UART recovery process). This MACRO definition is set in 245a2847172SGrzegorz Jaszczyk ``plat/marvell/armada/a8k/common/include/platform_def.h`` file. 246a2847172SGrzegorz Jaszczyk 24757adbf37SAlex Leibovich- DDR32 24857adbf37SAlex Leibovich In order to work in 32bit DDR, instead of the default 64bit ECC DDR, 24957adbf37SAlex Leibovich this flag should be set to 1. 25057adbf37SAlex Leibovich 251a2847172SGrzegorz JaszczykFor more information about build options, please refer to the 252a2847172SGrzegorz Jaszczyk:ref:`Build Options` document. 253a2847172SGrzegorz Jaszczyk 254a2847172SGrzegorz Jaszczyk 255a2847172SGrzegorz JaszczykBuild output 256a2847172SGrzegorz Jaszczyk------------ 257f20cb7e5SPali RohárMarvell's TF-A compilation generates 8 files: 258a2847172SGrzegorz Jaszczyk 259a2847172SGrzegorz Jaszczyk - ble.bin - BLe image 260a2847172SGrzegorz Jaszczyk - bl1.bin - BL1 image 261a2847172SGrzegorz Jaszczyk - bl2.bin - BL2 image 262a2847172SGrzegorz Jaszczyk - bl31.bin - BL31 image 263a2847172SGrzegorz Jaszczyk - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images) 264a2847172SGrzegorz Jaszczyk - boot-image.bin - TF-A image (contains BL1 and FIP images) 265a2847172SGrzegorz Jaszczyk - flash-image.bin - Image which contains boot-image.bin and SPL image. 266a2847172SGrzegorz Jaszczyk Should be placed on the boot flash/device. 267f20cb7e5SPali Rohár - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images 268f20cb7e5SPali Rohár for booting via UART. Could be loaded via Marvell's WtpDownload tool from 269f20cb7e5SPali Rohár A3700-utils-marvell repository. 270f20cb7e5SPali Rohár 271f20cb7e5SPali RohárAdditional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file and target 272f20cb7e5SPali Rohár``mrvl_flash`` produce final ``flash-image.bin`` and ``uart-images.tgz.bin`` files. 273a2847172SGrzegorz Jaszczyk 274a2847172SGrzegorz Jaszczyk 275a2847172SGrzegorz JaszczykTools and external components installation 276a2847172SGrzegorz Jaszczyk------------------------------------------ 277a2847172SGrzegorz Jaszczyk 278a2847172SGrzegorz JaszczykArmada37x0 Builds require installation of 3 components 279a2847172SGrzegorz Jaszczyk~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 280a2847172SGrzegorz Jaszczyk 281a2847172SGrzegorz Jaszczyk(1) ARM cross compiler capable of building images for the service CPU (CM3). 282a2847172SGrzegorz Jaszczyk This component is usually included in the Linux host packages. 283a2847172SGrzegorz Jaszczyk On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed 284a2847172SGrzegorz Jaszczyk using the following command 285a2847172SGrzegorz Jaszczyk 286a2847172SGrzegorz Jaszczyk .. code:: shell 287a2847172SGrzegorz Jaszczyk 288a2847172SGrzegorz Jaszczyk > sudo apt-get install gcc-arm-linux-gnueabi 289a2847172SGrzegorz Jaszczyk 290a2847172SGrzegorz Jaszczyk Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be 291a2847172SGrzegorz Jaszczyk overwritten using the environment variable ``CROSS_CM3``. 292a2847172SGrzegorz Jaszczyk Example for BASH shell 293a2847172SGrzegorz Jaszczyk 294a2847172SGrzegorz Jaszczyk .. code:: shell 295a2847172SGrzegorz Jaszczyk 296a2847172SGrzegorz Jaszczyk > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi 297a2847172SGrzegorz Jaszczyk 298a2847172SGrzegorz Jaszczyk(2) DDR initialization library sources (mv_ddr) available at the following repository 299583079aeSPali Rohár (use the "mv-ddr-devel" branch): 300a2847172SGrzegorz Jaszczyk 301a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 302a2847172SGrzegorz Jaszczyk 303583079aeSPali Rohár(3) Armada3700 tools available at the following repository 304583079aeSPali Rohár (use the "A3700_utils-armada-18.12-fixed" branch): 305a2847172SGrzegorz Jaszczyk 306a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git 307a2847172SGrzegorz Jaszczyk 308f20cb7e5SPali Rohár(4) Crypto++ library available at the following repository: 309f20cb7e5SPali Rohár 310f20cb7e5SPali Rohár https://github.com/weidai11/cryptopp.git 311f20cb7e5SPali Rohár 312a2847172SGrzegorz JaszczykArmada70x0 and Armada80x0 Builds require installation of an additional component 313a2847172SGrzegorz Jaszczyk~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 314a2847172SGrzegorz Jaszczyk 315a2847172SGrzegorz Jaszczyk(1) DDR initialization library sources (mv_ddr) available at the following repository 316583079aeSPali Rohár (use the "mv-ddr-devel" branch): 317a2847172SGrzegorz Jaszczyk 318a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 319