xref: /rk3399_ARM-atf/docs/plat/marvell/armada/build.rst (revision d01139f3b59a1bc6542e74f52ff3fb26eea23c69)
1a2847172SGrzegorz JaszczykTF-A Build Instructions for Marvell Platforms
2a2847172SGrzegorz Jaszczyk=============================================
3a2847172SGrzegorz Jaszczyk
4a2847172SGrzegorz JaszczykThis section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms.
5a2847172SGrzegorz Jaszczyk
6a2847172SGrzegorz JaszczykBuild Instructions
7a2847172SGrzegorz Jaszczyk------------------
8a2847172SGrzegorz Jaszczyk(1) Set the cross compiler
9a2847172SGrzegorz Jaszczyk
10a2847172SGrzegorz Jaszczyk    .. code:: shell
11a2847172SGrzegorz Jaszczyk
12a2847172SGrzegorz Jaszczyk        > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu-
13a2847172SGrzegorz Jaszczyk
14a2847172SGrzegorz Jaszczyk(2) Set path for FIP images:
15a2847172SGrzegorz Jaszczyk
16a2847172SGrzegorz JaszczykSet U-Boot image path (relatively to TF-A root or absolute path)
17a2847172SGrzegorz Jaszczyk
18a2847172SGrzegorz Jaszczyk    .. code:: shell
19a2847172SGrzegorz Jaszczyk
20a2847172SGrzegorz Jaszczyk        > export BL33=path/to/u-boot.bin
21a2847172SGrzegorz Jaszczyk
22a2847172SGrzegorz JaszczykFor example: if U-Boot project (and its images) is located at ``~/project/u-boot``,
23a2847172SGrzegorz JaszczykBL33 should be ``~/project/u-boot/u-boot.bin``
24a2847172SGrzegorz Jaszczyk
25a2847172SGrzegorz Jaszczyk    .. note::
26a2847172SGrzegorz Jaszczyk
27a2847172SGrzegorz Jaszczyk       *u-boot.bin* should be used and not *u-boot-spl.bin*
28a2847172SGrzegorz Jaszczyk
29718dbcacSKonstantin PorotchkinSet MSS/SCP image path (mandatory only for A7K/8K/CN913x when MSS_SUPPORT=1)
30a2847172SGrzegorz Jaszczyk
31a2847172SGrzegorz Jaszczyk    .. code:: shell
32a2847172SGrzegorz Jaszczyk
33a2847172SGrzegorz Jaszczyk        > export SCP_BL2=path/to/mrvl_scp_bl2*.img
34a2847172SGrzegorz Jaszczyk
35a2847172SGrzegorz Jaszczyk(3) Armada-37x0 build requires WTP tools installation.
36a2847172SGrzegorz Jaszczyk
37a2847172SGrzegorz JaszczykSee below in the section "Tools and external components installation".
38a2847172SGrzegorz JaszczykInstall ARM 32-bit cross compiler, which is required for building WTMI image for CM3
39a2847172SGrzegorz Jaszczyk
40a2847172SGrzegorz Jaszczyk    .. code:: shell
41a2847172SGrzegorz Jaszczyk
42a2847172SGrzegorz Jaszczyk        > sudo apt-get install gcc-arm-linux-gnueabi
43a2847172SGrzegorz Jaszczyk
44a2847172SGrzegorz Jaszczyk(4) Clean previous build residuals (if any)
45a2847172SGrzegorz Jaszczyk
46a2847172SGrzegorz Jaszczyk    .. code:: shell
47a2847172SGrzegorz Jaszczyk
48a2847172SGrzegorz Jaszczyk        > make distclean
49a2847172SGrzegorz Jaszczyk
50a2847172SGrzegorz Jaszczyk(5) Build TF-A
51a2847172SGrzegorz Jaszczyk
52a2847172SGrzegorz JaszczykThere are several build options:
53a2847172SGrzegorz Jaszczyk
5424e6e10bSPali Rohár- PLAT
5524e6e10bSPali Rohár
5624e6e10bSPali Rohár        Supported Marvell platforms are:
5724e6e10bSPali Rohár
5824e6e10bSPali Rohár            - a3700        - A3720 DB, EspressoBin and Turris MOX
5924e6e10bSPali Rohár            - a70x0
6024e6e10bSPali Rohár            - a70x0_amc    - AMC board
6124e6e10bSPali Rohár            - a80x0
6224e6e10bSPali Rohár            - a80x0_mcbin  - MacchiatoBin
6324e6e10bSPali Rohár            - a80x0_puzzle - IEI Puzzle-M801
6424e6e10bSPali Rohár            - t9130        - CN913x
65*d01139f3SMarcin Wojtas            - t9130_cex7_eval - CN913x CEx7 Evaluation Board
6624e6e10bSPali Rohár
67a2847172SGrzegorz Jaszczyk- DEBUG
68a2847172SGrzegorz Jaszczyk
69a2847172SGrzegorz Jaszczyk        Default is without debug information (=0). in order to enable it use ``DEBUG=1``.
70a2847172SGrzegorz Jaszczyk        Must be disabled when building UART recovery images due to current console driver
71a2847172SGrzegorz Jaszczyk        implementation that is not compatible with Xmodem protocol used for boot image download.
72a2847172SGrzegorz Jaszczyk
73a2847172SGrzegorz Jaszczyk- LOG_LEVEL
74a2847172SGrzegorz Jaszczyk
75a2847172SGrzegorz Jaszczyk        Defines the level of logging which will be purged to the default output port.
76a2847172SGrzegorz Jaszczyk
77f20cb7e5SPali Rohár            -  0 - LOG_LEVEL_NONE
78f20cb7e5SPali Rohár            - 10 - LOG_LEVEL_ERROR
79f20cb7e5SPali Rohár            - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0)
80f20cb7e5SPali Rohár            - 30 - LOG_LEVEL_WARNING
81f20cb7e5SPali Rohár            - 40 - LOG_LEVEL_INFO (default for DEBUG=1)
82f20cb7e5SPali Rohár            - 50 - LOG_LEVEL_VERBOSE
83a2847172SGrzegorz Jaszczyk
84a2847172SGrzegorz Jaszczyk- USE_COHERENT_MEM
85a2847172SGrzegorz Jaszczyk
86a2847172SGrzegorz Jaszczyk        This flag determines whether to include the coherent memory region in the
87f20cb7e5SPali Rohár        BL memory map or not. Enabled by default.
88a2847172SGrzegorz Jaszczyk
89a2847172SGrzegorz Jaszczyk- LLC_ENABLE
90a2847172SGrzegorz Jaszczyk
91a2847172SGrzegorz Jaszczyk        Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``).
92a2847172SGrzegorz Jaszczyk
935a40d70fSKonstantin Porotchkin- LLC_SRAM
945a40d70fSKonstantin Porotchkin
950a977b9bSKonstantin Porotchkin        Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used
960a977b9bSKonstantin Porotchkin        by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows
970a977b9bSKonstantin Porotchkin        for SRAM address range at BL31 execution stage with window target set to DRAM-0.
980a977b9bSKonstantin Porotchkin        When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM.
990a977b9bSKonstantin Porotchkin        There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n.
1000a977b9bSKonstantin Porotchkin        Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y.
1015a40d70fSKonstantin Porotchkin
102a2847172SGrzegorz Jaszczyk- MARVELL_SECURE_BOOT
103a2847172SGrzegorz Jaszczyk
104a2847172SGrzegorz Jaszczyk        Build trusted(=1)/non trusted(=0) image, default is non trusted.
10592024f81SPali Rohár        This parameter is used only for ``mrvl_flash`` and ``mrvl_uart`` targets.
106a2847172SGrzegorz Jaszczyk
107a2847172SGrzegorz Jaszczyk- MV_DDR_PATH
108a2847172SGrzegorz Jaszczyk
109528dafc3SPali Rohár        This parameter is required for ``mrvl_flash`` and ``mrvl_uart`` targets.
1102baf5038SPali Rohár        For A7K/8K/CN913x it is used for BLE build and for Armada37x0 it used
1112baf5038SPali Rohár        for ddr_tool build.
112528dafc3SPali Rohár
1132baf5038SPali Rohár        Specify path to the full checkout of Marvell mv-ddr-marvell git
1142baf5038SPali Rohár        repository. Checkout must contain also .git subdirectory because
1152baf5038SPali Rohár        mv-ddr build process calls git commands.
116a2847172SGrzegorz Jaszczyk
1172baf5038SPali Rohár        Do not remove any parts of git checkout becuase build process and other
1182baf5038SPali Rohár        applications need them for correct building and version determination.
119494be3eeSPali Rohár
12092024f81SPali Rohár
12192024f81SPali RohárCN913x specific build options:
12292024f81SPali Rohár
123eed02440SKonstantin Porotchkin- CP_NUM
124eed02440SKonstantin Porotchkin
125eed02440SKonstantin Porotchkin        Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted,
126eed02440SKonstantin Porotchkin        the build uses the default number of CPs, which is a number of embedded CPs inside the
127eed02440SKonstantin Porotchkin        package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC
128eed02440SKonstantin Porotchkin        family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid
129eed02440SKonstantin Porotchkin        values with CP_NUM are in a range of 1 to 3.
130eed02440SKonstantin Porotchkin
13192024f81SPali Rohár
13292024f81SPali RohárA7K/8K/CN913x specific build options:
13392024f81SPali Rohár
13492024f81SPali Rohár- BLE_PATH
13592024f81SPali Rohár
13692024f81SPali Rohár        Points to BLE (Binary ROM extension) sources folder.
13792024f81SPali Rohár        The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``
13892024f81SPali Rohár        which uses TF-A in-tree BLE implementation.
13992024f81SPali Rohár
14092024f81SPali Rohár
14192024f81SPali RohárArmada37x0 specific build options:
14292024f81SPali Rohár
14392024f81SPali Rohár- CM3_SYSTEM_RESET
14492024f81SPali Rohár
14592024f81SPali Rohár        When ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will be used for system reset.
14692024f81SPali Rohár
14792024f81SPali Rohár        TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the
14892024f81SPali Rohár        Cortex-M3 secure coprocessor.
14992024f81SPali Rohár        The firmware running in the coprocessor must either implement this functionality or
15092024f81SPali Rohár        ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell
15192024f81SPali Rohár        repository). If this option is enabled but the firmware does not support this command,
15292024f81SPali Rohár        an error message will be printed prior trying to reboot via the usual way.
15392024f81SPali Rohár
15492024f81SPali Rohár        This option is needed on Turris MOX as a workaround to a HW bug which causes reset to
15592024f81SPali Rohár        sometime hang the board.
15692024f81SPali Rohár
15792024f81SPali Rohár- A3720_DB_PM_WAKEUP_SRC
15892024f81SPali Rohár
15992024f81SPali Rohár        For Armada 3720 Development Board only, when ``A3720_DB_PM_WAKEUP_SRC=1``,
16092024f81SPali Rohár        TF-A will setup PM wake up src configuration. This option is disabled by default.
16192024f81SPali Rohár
16292024f81SPali Rohár
16392024f81SPali RohárArmada37x0 specific build options for ``mrvl_flash`` and ``mrvl_uart`` targets:
16492024f81SPali Rohár
165a2847172SGrzegorz Jaszczyk- DDR_TOPOLOGY
166a2847172SGrzegorz Jaszczyk
16792024f81SPali Rohár        The DDR topology map index/name, default is 0.
168a2847172SGrzegorz Jaszczyk
169a2847172SGrzegorz Jaszczyk        Supported Options:
1709c3fffdcSPali Rohár            -    0 - DDR3 1CS 512MB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5)
1719c3fffdcSPali Rohár            -    1 - DDR4 1CS 512MB (DB-88F3720-DDR4-Modular)
1729c3fffdcSPali Rohár            -    2 - DDR3 2CS   1GB (EspressoBin V3-V5)
1739c3fffdcSPali Rohár            -    3 - DDR4 2CS   4GB (DB-88F3720-DDR4-Modular)
1749c3fffdcSPali Rohár            -    4 - DDR3 1CS   1GB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5)
1759c3fffdcSPali Rohár            -    5 - DDR4 1CS   1GB (EspressoBin V7, EspressoBin-Ultra)
1769c3fffdcSPali Rohár            -    6 - DDR4 2CS   2GB (EspressoBin V7)
1779c3fffdcSPali Rohár            -    7 - DDR3 2CS   2GB (EspressoBin V3-V5)
1789c3fffdcSPali Rohár            - CUST - CUSTOMER BOARD (Customer board settings)
179a2847172SGrzegorz Jaszczyk
180a2847172SGrzegorz Jaszczyk- CLOCKSPRESET
181a2847172SGrzegorz Jaszczyk
18292024f81SPali Rohár        The clock tree configuration preset including CPU and DDR frequency,
183a2847172SGrzegorz Jaszczyk        default is CPU_800_DDR_800.
184a2847172SGrzegorz Jaszczyk
185a2847172SGrzegorz Jaszczyk            - CPU_600_DDR_600  - CPU at 600 MHz, DDR at 600 MHz
186a2847172SGrzegorz Jaszczyk            - CPU_800_DDR_800  - CPU at 800 MHz, DDR at 800 MHz
187a2847172SGrzegorz Jaszczyk            - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz
188a2847172SGrzegorz Jaszczyk            - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz
189a2847172SGrzegorz Jaszczyk
19023abf07cSPali Rohár        Look at Armada37x0 chip package marking on board to identify correct CPU frequency.
19123abf07cSPali Rohár        The last line on package marking (next line after the 88F37x0 line) should contain:
19223abf07cSPali Rohár
19323abf07cSPali Rohár            - C080 or I080 - chip with  800 MHz CPU - use ``CLOCKSPRESET=CPU_800_DDR_800``
19423abf07cSPali Rohár            - C100 or I100 - chip with 1000 MHz CPU - use ``CLOCKSPRESET=CPU_1000_DDR_800``
19523abf07cSPali Rohár            - C120         - chip with 1200 MHz CPU - use ``CLOCKSPRESET=CPU_1200_DDR_750``
19623abf07cSPali Rohár
197a2847172SGrzegorz Jaszczyk- BOOTDEV
198a2847172SGrzegorz Jaszczyk
19992024f81SPali Rohár        The flash boot device, default is ``SPINOR``.
200a2847172SGrzegorz Jaszczyk
201a2847172SGrzegorz Jaszczyk        Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``:
202a2847172SGrzegorz Jaszczyk
203a2847172SGrzegorz Jaszczyk            - SPINOR - SPI NOR flash boot
204a2847172SGrzegorz Jaszczyk            - SPINAND - SPI NAND flash boot
205a2847172SGrzegorz Jaszczyk            - EMMCNORM - eMMC Download Mode
206a2847172SGrzegorz Jaszczyk
207a2847172SGrzegorz Jaszczyk                Download boot loader or program code from eMMC flash into CM3 or CA53
208a2847172SGrzegorz Jaszczyk                Requires full initialization and command sequence
209a2847172SGrzegorz Jaszczyk
210a2847172SGrzegorz Jaszczyk            - SATA - SATA device boot
211a2847172SGrzegorz Jaszczyk
21233af2937SPali Rohár                Image needs to be stored at disk LBA 0 or at disk partition with
21333af2937SPali Rohár                MBR type 0x4d (ASCII 'M' as in Marvell) or at disk partition with
21433af2937SPali Rohár                GPT name ``MARVELL BOOT PARTITION``.
21533af2937SPali Rohár
216a2847172SGrzegorz Jaszczyk- PARTNUM
217a2847172SGrzegorz Jaszczyk
21892024f81SPali Rohár        The boot partition number, default is 0.
219a2847172SGrzegorz Jaszczyk
220a2847172SGrzegorz Jaszczyk        To boot from eMMC, the value should be aligned with the parameter in
221a2847172SGrzegorz Jaszczyk        U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is
222a2847172SGrzegorz Jaszczyk        1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot
223a2847172SGrzegorz Jaszczyk        build instructions.
224a2847172SGrzegorz Jaszczyk
225a2847172SGrzegorz Jaszczyk- WTMI_IMG
226a2847172SGrzegorz Jaszczyk
22792024f81SPali Rohár        The path of the binary can point to an image which
228a2847172SGrzegorz Jaszczyk        does nothing, an image which supports EFUSE or a customized CM3 firmware
229711a6bb7SPali Rohár        binary. The default image is ``fuse.bin`` that built from sources in WTP
230a2847172SGrzegorz Jaszczyk        folder, which is the next option. If the default image is OK, then this
231a2847172SGrzegorz Jaszczyk        option should be skipped.
232a2847172SGrzegorz Jaszczyk
233711a6bb7SPali Rohár        Please note that this is not a full WTMI image, just a main loop without
234711a6bb7SPali Rohár        hardware initialization code. Final WTMI image is built from this WTMI_IMG
235711a6bb7SPali Rohár        binary and sys-init code from the WTP directory which sets DDR and CPU
236711a6bb7SPali Rohár        clocks according to DDR_TOPOLOGY and CLOCKSPRESET options.
237711a6bb7SPali Rohár
2384fe571b8SPali Rohár        CZ.NIC as part of Turris project released free and open source WTMI
2394fe571b8SPali Rohár        application firmware ``wtmi_app.bin`` for all Armada 3720 devices.
2404fe571b8SPali Rohár        This firmware includes additional features like access to Hardware
2414fe571b8SPali Rohár        Random Number Generator of Armada 3720 SoC which original Marvell's
2424fe571b8SPali Rohár        ``fuse.bin`` image does not have.
2434fe571b8SPali Rohár
2444fe571b8SPali Rohár        CZ.NIC's Armada 3720 Secure Firmware is available at website:
2454fe571b8SPali Rohár
2464fe571b8SPali Rohár            https://gitlab.nic.cz/turris/mox-boot-builder/
2474fe571b8SPali Rohár
248a2847172SGrzegorz Jaszczyk- WTP
249a2847172SGrzegorz Jaszczyk
2502baf5038SPali Rohár        Specify path to the full checkout of Marvell A3700-utils-marvell git
2512baf5038SPali Rohár        repository. Checkout must contain also .git subdirectory because WTP
2522baf5038SPali Rohár        build process calls git commands.
2532baf5038SPali Rohár
2542baf5038SPali Rohár        WTP build process uses also Marvell mv-ddr-marvell git repository
2552baf5038SPali Rohár        specified in MV_DDR_PATH option.
2562baf5038SPali Rohár
2572baf5038SPali Rohár        Do not remove any parts of git checkout becuase build process and other
2582baf5038SPali Rohár        applications need them for correct building and version determination.
259494be3eeSPali Rohár
260f20cb7e5SPali Rohár- CRYPTOPP_PATH
261f20cb7e5SPali Rohár
26292024f81SPali Rohár        Use this parameter to point to Crypto++ source code
2638708a884SPali Rohár        directory. If this option is specified then Crypto++ source code in
2648708a884SPali Rohár        CRYPTOPP_PATH directory will be automatically compiled. Crypto++ library
2658708a884SPali Rohár        is required for building WTP image tool. Either CRYPTOPP_PATH or
2668708a884SPali Rohár        CRYPTOPP_LIBDIR with CRYPTOPP_INCDIR needs to be specified for Armada37x0.
2678708a884SPali Rohár
2688708a884SPali Rohár- CRYPTOPP_LIBDIR
2698708a884SPali Rohár
27092024f81SPali Rohár        Use this parameter to point to the directory with
2718708a884SPali Rohár        compiled Crypto++ library. By default it points to the CRYPTOPP_PATH.
2728708a884SPali Rohár
2738708a884SPali Rohár- CRYPTOPP_INCDIR
2748708a884SPali Rohár
27592024f81SPali Rohár        Use this parameter to point to the directory with
2768708a884SPali Rohár        header files of Crypto++ library. By default it points to the CRYPTOPP_PATH.
277f20cb7e5SPali Rohár
278f20cb7e5SPali Rohár
279a2847172SGrzegorz JaszczykFor example, in order to build the image in debug mode with log level up to 'notice' level run
280a2847172SGrzegorz Jaszczyk
281a2847172SGrzegorz Jaszczyk.. code:: shell
282a2847172SGrzegorz Jaszczyk
283f20cb7e5SPali Rohár    > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash
284a2847172SGrzegorz Jaszczyk
285a2847172SGrzegorz JaszczykAnd if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level,
286a2847172SGrzegorz Jaszczykthe image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS,
287a2847172SGrzegorz Jaszczykthe image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command
288a2847172SGrzegorz Jaszczykline is as following
289a2847172SGrzegorz Jaszczyk
290a2847172SGrzegorz Jaszczyk.. code:: shell
291a2847172SGrzegorz Jaszczyk
292a2847172SGrzegorz Jaszczyk    > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \
293f20cb7e5SPali Rohár        MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \
294f20cb7e5SPali Rohár        MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \
295f20cb7e5SPali Rohár        CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \
2968b920973SPali Rohár        all fip mrvl_bootimage mrvl_flash mrvl_uart
297f20cb7e5SPali Rohár
298f20cb7e5SPali RohárTo build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command:
299f20cb7e5SPali Rohár
300f20cb7e5SPali Rohár.. code:: shell
301f20cb7e5SPali Rohár
302d9243f26SMarek Behún    > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \
303d9243f26SMarek Behún        CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage
304a2847172SGrzegorz Jaszczyk
305ff46a41dSPali RohárHere is full example how to build production release of Marvell firmware image (concatenated
3064fe571b8SPali Rohárbinary of Marvell's A3720 sys-init, CZ.NIC's Armada 3720 Secure Firmware, TF-A and U-Boot) for
3074fe571b8SPali RohárEspressoBin board (PLAT=a3700) with 1GHz CPU (CLOCKSPRESET=CPU_1000_DDR_800) and
3084fe571b8SPali Rohár1GB DDR4 RAM (DDR_TOPOLOGY=5):
309d0b367b7SLuka Kovacic
310d0b367b7SLuka Kovacic.. code:: shell
311d0b367b7SLuka Kovacic
3124fe571b8SPali Rohár    > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
3134fe571b8SPali Rohár    > git clone https://source.denx.de/u-boot/u-boot.git
314ff46a41dSPali Rohár    > git clone https://github.com/weidai11/cryptopp.git
3154fe571b8SPali Rohár    > git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
3164fe571b8SPali Rohár    > git clone https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
3174fe571b8SPali Rohár    > git clone https://gitlab.nic.cz/turris/mox-boot-builder.git
318ff46a41dSPali Rohár    > make -C u-boot CROSS_COMPILE=aarch64-linux-gnu- mvebu_espressobin-88f3720_defconfig u-boot.bin
3194fe571b8SPali Rohár    > make -C mox-boot-builder CROSS_CM3=arm-linux-gnueabi- wtmi_app.bin
320ff46a41dSPali Rohár    > make -C trusted-firmware-a CROSS_COMPILE=aarch64-linux-gnu- CROSS_CM3=arm-linux-gnueabi- \
321ff46a41dSPali Rohár        USE_COHERENT_MEM=0 PLAT=a3700 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 \
3224fe571b8SPali Rohár        MV_DDR_PATH=$PWD/mv-ddr-marvell/ WTP=$PWD/A3700-utils-marvell/ \
3234fe571b8SPali Rohár        CRYPTOPP_PATH=$PWD/cryptopp/ BL33=$PWD/u-boot/u-boot.bin \
3244fe571b8SPali Rohár        WTMI_IMG=$PWD/mox-boot-builder/wtmi_app.bin FIP_ALIGN=0x100 mrvl_flash
325d0b367b7SLuka Kovacic
326ff46a41dSPali RohárProduced Marvell firmware flash image: ``trusted-firmware-a/build/a3700/release/flash-image.bin``
327a2847172SGrzegorz Jaszczyk
328a2847172SGrzegorz JaszczykSpecial Build Flags
329a2847172SGrzegorz Jaszczyk--------------------
330a2847172SGrzegorz Jaszczyk
331a2847172SGrzegorz Jaszczyk- PLAT_RECOVERY_IMAGE_ENABLE
332a2847172SGrzegorz Jaszczyk    When set this option to enable secondary recovery function when build atf.
333a2847172SGrzegorz Jaszczyk    In order to build UART recovery image this operation should be disabled for
334eed02440SKonstantin Porotchkin    A7K/8K/CN913x because of hardware limitation (boot from secondary image
335a2847172SGrzegorz Jaszczyk    can interrupt UART recovery process). This MACRO definition is set in
336a2847172SGrzegorz Jaszczyk    ``plat/marvell/armada/a8k/common/include/platform_def.h`` file.
337a2847172SGrzegorz Jaszczyk
33857adbf37SAlex Leibovich- DDR32
33957adbf37SAlex Leibovich    In order to work in 32bit DDR, instead of the default 64bit ECC DDR,
34057adbf37SAlex Leibovich    this flag should be set to 1.
34157adbf37SAlex Leibovich
342a2847172SGrzegorz JaszczykFor more information about build options, please refer to the
343a2847172SGrzegorz Jaszczyk:ref:`Build Options` document.
344a2847172SGrzegorz Jaszczyk
345a2847172SGrzegorz Jaszczyk
346a2847172SGrzegorz JaszczykBuild output
347a2847172SGrzegorz Jaszczyk------------
348f20cb7e5SPali RohárMarvell's TF-A compilation generates 8 files:
349a2847172SGrzegorz Jaszczyk
350f60f1e84SPali Rohár    - ble.bin		- BLe image (not available for Armada37x0)
351a2847172SGrzegorz Jaszczyk    - bl1.bin		- BL1 image
352a2847172SGrzegorz Jaszczyk    - bl2.bin		- BL2 image
353a2847172SGrzegorz Jaszczyk    - bl31.bin		- BL31 image
354a2847172SGrzegorz Jaszczyk    - fip.bin		- FIP image (contains BL2, BL31 & BL33 (U-Boot) images)
355a2847172SGrzegorz Jaszczyk    - boot-image.bin	- TF-A image (contains BL1 and FIP images)
356f60f1e84SPali Rohár    - flash-image.bin	- Flashable Marvell firmware image. For Armada37x0 it
357f60f1e84SPali Rohár      contains TIM, WTMI and boot-image.bin images. For other platforms it contains
358f60f1e84SPali Rohár      BLe and boot-image.bin images. Should be placed on the boot flash/device.
359f20cb7e5SPali Rohár    - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images
360f20cb7e5SPali Rohár      for booting via UART. Could be loaded via Marvell's WtpDownload tool from
361f20cb7e5SPali Rohár      A3700-utils-marvell repository.
362f20cb7e5SPali Rohár
3638b920973SPali RohárAdditional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file. Target
3648b920973SPali Rohár``mrvl_flash`` produce final ``flash-image.bin`` file and target ``mrvl_uart``
3658b920973SPali Rohárproduce ``uart-images.tgz.bin`` file.
366a2847172SGrzegorz Jaszczyk
367a2847172SGrzegorz Jaszczyk
368a2847172SGrzegorz JaszczykTools and external components installation
369a2847172SGrzegorz Jaszczyk------------------------------------------
370a2847172SGrzegorz Jaszczyk
37192024f81SPali RohárArmada37x0 Builds require installation of additional components
37292024f81SPali Rohár~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
373a2847172SGrzegorz Jaszczyk
374a2847172SGrzegorz Jaszczyk(1) ARM cross compiler capable of building images for the service CPU (CM3).
375a2847172SGrzegorz Jaszczyk    This component is usually included in the Linux host packages.
376a2847172SGrzegorz Jaszczyk    On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed
377a2847172SGrzegorz Jaszczyk    using the following command
378a2847172SGrzegorz Jaszczyk
379a2847172SGrzegorz Jaszczyk    .. code:: shell
380a2847172SGrzegorz Jaszczyk
381a2847172SGrzegorz Jaszczyk        > sudo apt-get install gcc-arm-linux-gnueabi
382a2847172SGrzegorz Jaszczyk
383a2847172SGrzegorz Jaszczyk    Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be
384a2847172SGrzegorz Jaszczyk    overwritten using the environment variable ``CROSS_CM3``.
385a2847172SGrzegorz Jaszczyk    Example for BASH shell
386a2847172SGrzegorz Jaszczyk
387a2847172SGrzegorz Jaszczyk    .. code:: shell
388a2847172SGrzegorz Jaszczyk
389a2847172SGrzegorz Jaszczyk        > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi
390a2847172SGrzegorz Jaszczyk
391a2847172SGrzegorz Jaszczyk(2) DDR initialization library sources (mv_ddr) available at the following repository
3921cea0213SPali Rohár    (use the "master" branch):
393a2847172SGrzegorz Jaszczyk
394a2847172SGrzegorz Jaszczyk    https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
395a2847172SGrzegorz Jaszczyk
396583079aeSPali Rohár(3) Armada3700 tools available at the following repository
3971cea0213SPali Rohár    (use the "master" branch):
398a2847172SGrzegorz Jaszczyk
399a2847172SGrzegorz Jaszczyk    https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
400a2847172SGrzegorz Jaszczyk
401f20cb7e5SPali Rohár(4) Crypto++ library available at the following repository:
402f20cb7e5SPali Rohár
403f20cb7e5SPali Rohár    https://github.com/weidai11/cryptopp.git
404f20cb7e5SPali Rohár
40592024f81SPali Rohár(5) Optional CZ.NIC's Armada 3720 Secure Firmware:
40692024f81SPali Rohár
40792024f81SPali Rohár    https://gitlab.nic.cz/turris/mox-boot-builder.git
40892024f81SPali Rohár
409a2847172SGrzegorz JaszczykArmada70x0 and Armada80x0 Builds require installation of an additional component
410a2847172SGrzegorz Jaszczyk~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
411a2847172SGrzegorz Jaszczyk
412a2847172SGrzegorz Jaszczyk(1) DDR initialization library sources (mv_ddr) available at the following repository
4131cea0213SPali Rohár    (use the "master" branch):
414a2847172SGrzegorz Jaszczyk
415a2847172SGrzegorz Jaszczyk    https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
416