1Description 2=========== 3 4Stratix 10 SoCFPGA is a FPGA with integrated quad-core 64-bit Arm Cortex A53 processor. 5 6Upon boot, Boot ROM loads bl2 into OCRAM. Bl2 subsequently initializes 7the hardware, then loads bl31 and bl33 (UEFI) into DDR and boots to bl33. 8 9:: 10 11 Boot ROM --> Trusted Firmware-A --> UEFI 12 13How to build 14============ 15 16Code Locations 17-------------- 18 19- Trusted Firmware-A: 20 `link <https://github.com/ARM-software/arm-trusted-firmware>`__ 21 22- UEFI (to be updated with new upstreamed UEFI): 23 `link <https://github.com/altera-opensource/uefi-socfpga>`__ 24 25Build Procedure 26--------------- 27 28- Fetch all the above 2 repositories into local host. 29 Make all the repositories in the same ${BUILD\_PATH}. 30 31- Prepare the AARCH64 toolchain. 32 33- Build UEFI using Stratix 10 platform as configuration 34 This will be updated to use an updated UEFI using the latest EDK2 source 35 36.. code:: bash 37 38 make CROSS_COMPILE=aarch64-linux-gnu- device=s10 39 40- Build atf providing the previously generated UEFI as the BL33 image 41 42.. code:: bash 43 44 make CROSS_COMPILE=aarch64-linux-gnu- bl2 fip PLAT=stratix10 45 BL33=PEI.ROM 46 47Install Procedure 48----------------- 49 50- dd fip.bin to a A2 partition on the MMC drive to be booted in Stratix 10 51 board. 52 53- Generate a SOF containing bl2 54 55.. code:: bash 56 aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses 0xffe00000 bl2.bin bl2.hex 57 quartus_cpf --bootloader bl2.hex <quartus_generated_sof> <output_sof_with_bl2> 58 59- Configure SOF to board 60 61.. code:: bash 62 nios2-configure-sof <output_sof_with_bl2> 63 64Boot trace 65========== 66 67:: 68 INFO: DDR: DRAM calibration success. 69 INFO: ECC is disabled. 70 INFO: Init HPS NOC's DDR Scheduler. 71 NOTICE: BL2: v2.0(debug):v2.0-809-g7f8474a-dirty 72 NOTICE: BL2: Built : 17:38:19, Feb 18 2019 73 INFO: BL2: Doing platform setup 74 INFO: BL2: Loading image id 3 75 INFO: Loading image id=3 at address 0xffe1c000 76 INFO: Image id=3 loaded: 0xffe1c000 - 0xffe24034 77 INFO: BL2: Loading image id 5 78 INFO: Loading image id=5 at address 0x50000 79 INFO: Image id=5 loaded: 0x50000 - 0x550000 80 NOTICE: BL2: Booting BL31 81 INFO: Entry point address = 0xffe1c000 82 INFO: SPSR = 0x3cd 83 NOTICE: BL31: v2.0(debug):v2.0-810-g788c436-dirty 84 NOTICE: BL31: Built : 15:17:16, Feb 20 2019 85 INFO: ARM GICv2 driver initialized 86 INFO: BL31: Initializing runtime services 87 WARNING: BL31: cortex_a53: CPU workaround for 855873 was missing! 88 INFO: BL31: Preparing for EL3 exit to normal world 89 INFO: Entry point address = 0x50000 90 INFO: SPSR = 0x3c9 91 UEFI firmware (version 1.0 built at 11:26:18 on Nov 7 2018) 92