16ec0c65bSUsama ArifTC Total Compute Platform 26ec0c65bSUsama Arif========================== 36ec0c65bSUsama Arif 46ec0c65bSUsama ArifSome of the features of TC platform referenced in TF-A include: 56ec0c65bSUsama Arif 66ec0c65bSUsama Arif- A `System Control Processor <https://github.com/ARM-software/SCP-firmware>`_ 76ec0c65bSUsama Arif to abstract power and system management tasks away from application 86ec0c65bSUsama Arif processors. The RAM firmware for SCP is included in the TF-A FIP and is 96ec0c65bSUsama Arif loaded by AP BL2 from FIP in flash to SRAM for copying by SCP (SCP has access 106ec0c65bSUsama Arif to AP SRAM). 116ec0c65bSUsama Arif- GICv4 126ec0c65bSUsama Arif- Trusted Board Boot 136ec0c65bSUsama Arif- SCMI 146ec0c65bSUsama Arif- MHUv2 156ec0c65bSUsama Arif 16eebd2c3fSRupinderjit SinghCurrently, the main difference between TC0 (TARGET_PLATFORM=0), TC1 17eebd2c3fSRupinderjit Singh(TARGET_PLATFORM=1), TC2 (TARGET_PLATFORM=2) platforms w.r.t to TF-A 18eebd2c3fSRupinderjit Singhis the CPUs supported as below: 19eebd2c3fSRupinderjit Singh 20fa07049eSDaniel Boulby- TC0 has support for Cortex A510, Cortex A710 and Cortex X2. (Note TC0 is now deprecated) 21*6a2b11c2SManish V Badarkhe- TC1 has support for Cortex A510, Cortex A715 and Cortex X3. (Note TC1 is now deprecated) 22dea3d71eSGovindraj Raja- TC2 has support for Cortex A520, Cortex A720 and Cortex x4. 236ec0c65bSUsama Arif 246ec0c65bSUsama ArifBoot Sequence 256ec0c65bSUsama Arif------------- 266ec0c65bSUsama Arif 276ec0c65bSUsama ArifThe execution begins from SCP_BL1. SCP_BL1 powers up the AP which starts 286ec0c65bSUsama Arifexecuting AP_BL1 and then executes AP_BL2 which loads the SCP_BL2 from 296ec0c65bSUsama ArifFIP to SRAM. The SCP has access to AP SRAM. The address and size of SCP_BL2 306ec0c65bSUsama Arifis communicated to SCP using SDS. SCP copies SCP_BL2 from SRAM to its own 316ec0c65bSUsama ArifRAM and starts executing it. The AP then continues executing the rest of TF-A 326ec0c65bSUsama Arifstages including BL31 runtime stage and hands off executing to 336ec0c65bSUsama ArifNon-secure world (u-boot). 346ec0c65bSUsama Arif 356ec0c65bSUsama ArifBuild Procedure (TF-A only) 366ec0c65bSUsama Arif~~~~~~~~~~~~~~~~~~~~~~~~~~~ 376ec0c65bSUsama Arif 38eebd2c3fSRupinderjit Singh- Obtain `Arm toolchain`_ and set the CROSS_COMPILE environment variable to 39eebd2c3fSRupinderjit Singh point to the toolchain folder. 406ec0c65bSUsama Arif 416ec0c65bSUsama Arif- Build TF-A: 426ec0c65bSUsama Arif 436ec0c65bSUsama Arif .. code:: shell 446ec0c65bSUsama Arif 456ec0c65bSUsama Arif make PLAT=tc BL33=<path_to_uboot.bin> \ 46eebd2c3fSRupinderjit Singh SCP_BL2=<path_to_scp_ramfw.bin> TARGET_PLATFORM={0,1,2} all fip 476ec0c65bSUsama Arif 486ec0c65bSUsama Arif Enable TBBR by adding the following options to the make command: 496ec0c65bSUsama Arif 506ec0c65bSUsama Arif .. code:: shell 516ec0c65bSUsama Arif 526ec0c65bSUsama Arif MBEDTLS_DIR=<path_to_mbedtls_directory> \ 536ec0c65bSUsama Arif TRUSTED_BOARD_BOOT=1 \ 546ec0c65bSUsama Arif GENERATE_COT=1 \ 556ec0c65bSUsama Arif ARM_ROTPK_LOCATION=devel_rsa \ 566ec0c65bSUsama Arif ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem 576ec0c65bSUsama Arif 58eebd2c3fSRupinderjit Singh-------------- 59eebd2c3fSRupinderjit Singh 6031b39455SGovindraj Raja*Copyright (c) 2020-2023, Arm Limited. All rights reserved.* 61eebd2c3fSRupinderjit Singh 62eebd2c3fSRupinderjit Singh.. _Arm Toolchain: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/downloads 63