1*74ac1efcSAhmed AzeemRD-Aspen (Zena CSS) Platform 2*74ac1efcSAhmed Azeem============================ 3*74ac1efcSAhmed Azeem 4*74ac1efcSAhmed AzeemThe RD-Aspen platform, as referenced in TF-A, includes the following features: 5*74ac1efcSAhmed Azeem 6*74ac1efcSAhmed Azeem* Primary Compute with four processor clusters, each containing: 7*74ac1efcSAhmed Azeem 8*74ac1efcSAhmed Azeem * Four Cortex-A720AE cores (Armv9.2-A application processor, 64-bit mode) 9*74ac1efcSAhmed Azeem * A DynamIQ Shared Unit (DSU-120AE) 10*74ac1efcSAhmed Azeem 11*74ac1efcSAhmed Azeem* A GIC-720AE, which is GICv4-compatible and supports GICv3 mode as well. 12*74ac1efcSAhmed Azeem 13*74ac1efcSAhmed AzeemFurther information on RD-Aspen is available at `Zena CSS`_ 14*74ac1efcSAhmed Azeem 15*74ac1efcSAhmed AzeemBoot Sequence 16*74ac1efcSAhmed Azeem------------- 17*74ac1efcSAhmed Azeem 18*74ac1efcSAhmed AzeemThe boot process begins with the Runtime Security Engine (RSE), which loads the 19*74ac1efcSAhmed AzeemApplication Processor (AP) BL2 image into the Trusted SRAM at a fixed address. 20*74ac1efcSAhmed AzeemOnce loaded, the RSE signals the System Control Processor firmware (SCP-firmware) 21*74ac1efcSAhmed Azeemrunning on Safety Island Cluster 0 (SI CL0) to initiate the AP power-up sequence. 22*74ac1efcSAhmed Azeem 23*74ac1efcSAhmed AzeemThe SCP-firmware then sets the reset vector base address (RVBAR) for the AP, ensuring 24*74ac1efcSAhmed Azeemit starts executing BL2 from the designated address. Following this, the SCP-firmware 25*74ac1efcSAhmed Azeempowers on AP Cluster 0, allowing the AP to run AP BL2. 26*74ac1efcSAhmed Azeem 27*74ac1efcSAhmed AzeemThe following tasks are executed for each AP BL stage: 28*74ac1efcSAhmed Azeem 29*74ac1efcSAhmed Azeem1. AP BL2: 30*74ac1efcSAhmed Azeem 31*74ac1efcSAhmed Azeem * Performs the actions described in the `Trusted Board Boot (TBB)`_ document. 32*74ac1efcSAhmed Azeem * Copies the FW_CONFIG from Secure Flash to Trusted SRAM. 33*74ac1efcSAhmed Azeem * Completes its dynamic configuration from the FW_CONFIG loaded. 34*74ac1efcSAhmed Azeem This includes: 35*74ac1efcSAhmed Azeem 36*74ac1efcSAhmed Azeem * Parsing the configuration data. 37*74ac1efcSAhmed Azeem * Setting up the required system parameters. 38*74ac1efcSAhmed Azeem 39*74ac1efcSAhmed Azeem * Reads and loads AP BL31 image into the Trusted SRAM. 40*74ac1efcSAhmed Azeem * Copies AP BL33 and Device tree blob from Secure Flash to Normal DRAM. 41*74ac1efcSAhmed Azeem * Transfers the execution to AP BL31. 42*74ac1efcSAhmed Azeem 43*74ac1efcSAhmed Azeem2. AP BL31: 44*74ac1efcSAhmed Azeem 45*74ac1efcSAhmed Azeem * Initializes Trusted Firmware-A Services. 46*74ac1efcSAhmed Azeem * Transfers the execution to AP BL33. 47*74ac1efcSAhmed Azeem 48*74ac1efcSAhmed AzeemBuild Procedure (TF-A only) 49*74ac1efcSAhmed Azeem--------------------------- 50*74ac1efcSAhmed Azeem 51*74ac1efcSAhmed Azeem- Ensure all `Prerequisites`_ are met, and the ``CROSS_COMPILE`` environment 52*74ac1efcSAhmed Azeem variable is properly set. 53*74ac1efcSAhmed Azeem 54*74ac1efcSAhmed Azeem- Build TF-A: 55*74ac1efcSAhmed Azeem 56*74ac1efcSAhmed Azeem .. code:: shell 57*74ac1efcSAhmed Azeem 58*74ac1efcSAhmed Azeem make \ 59*74ac1efcSAhmed Azeem PLAT=rdaspen \ 60*74ac1efcSAhmed Azeem MBEDTLS_DIR=<mbedtls_dir> \ 61*74ac1efcSAhmed Azeem CREATE_KEYS=1 \ 62*74ac1efcSAhmed Azeem GENERATE_COT=1 \ 63*74ac1efcSAhmed Azeem TRUSTED_BOARD_BOOT=1 \ 64*74ac1efcSAhmed Azeem COT=tbbr \ 65*74ac1efcSAhmed Azeem ARM_ROTPK_LOCATION=devel_rsa \ 66*74ac1efcSAhmed Azeem ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem \ 67*74ac1efcSAhmed Azeem BL33=<PATH-TO-BL33-BINARY> \ 68*74ac1efcSAhmed Azeem 69*74ac1efcSAhmed Azeem-------------- 70*74ac1efcSAhmed Azeem 71*74ac1efcSAhmed Azeem*Copyright (c) 2025, Arm Limited. All rights reserved.* 72*74ac1efcSAhmed Azeem 73*74ac1efcSAhmed Azeem.. _Prerequisites: https://trustedfirmware-a.readthedocs.io/en/latest/getting_started/prerequisites.html 74*74ac1efcSAhmed Azeem.. _Trusted Board Boot (TBB): https://trustedfirmware-a.readthedocs.io/en/latest/design/trusted-board-boot.html 75*74ac1efcSAhmed Azeem.. _Zena CSS: https://www.arm.com/products/automotive/compute-subsystems/zena 76