xref: /rk3399_ARM-atf/docs/plat/arm/arm-build-options.rst (revision a1e6467b0ef4c14c02f72bda921c8d3931ea6f96)
143f35ef5SPaul BeesleyArm Development Platform Build Options
243f35ef5SPaul Beesley======================================
343f35ef5SPaul Beesley
443f35ef5SPaul BeesleyArm Platform Build Options
543f35ef5SPaul Beesley--------------------------
643f35ef5SPaul Beesley
743f35ef5SPaul Beesley-  ``ARM_BL31_IN_DRAM``: Boolean option to select loading of BL31 in TZC secured
843f35ef5SPaul Beesley   DRAM. By default, BL31 is in the secure SRAM. Set this flag to 1 to load
943f35ef5SPaul Beesley   BL31 in TZC secured DRAM. If TSP is present, then setting this option also
1043f35ef5SPaul Beesley   sets the TSP location to DRAM and ignores the ``ARM_TSP_RAM_LOCATION`` build
1143f35ef5SPaul Beesley   flag.
1243f35ef5SPaul Beesley
1343f35ef5SPaul Beesley-  ``ARM_CONFIG_CNTACR``: boolean option to unlock access to the ``CNTBase<N>``
1443f35ef5SPaul Beesley   frame registers by setting the ``CNTCTLBase.CNTACR<N>`` register bits. The
1543f35ef5SPaul Beesley   frame number ``<N>`` is defined by ``PLAT_ARM_NSTIMER_FRAME_ID``, which
1643f35ef5SPaul Beesley   should match the frame used by the Non-Secure image (normally the Linux
1743f35ef5SPaul Beesley   kernel). Default is true (access to the frame is allowed).
1843f35ef5SPaul Beesley
1943f35ef5SPaul Beesley-  ``ARM_DISABLE_TRUSTED_WDOG``: boolean option to disable the Trusted Watchdog.
2043f35ef5SPaul Beesley   By default, Arm platforms use a watchdog to trigger a system reset in case
2143f35ef5SPaul Beesley   an error is encountered during the boot process (for example, when an image
2243f35ef5SPaul Beesley   could not be loaded or authenticated). The watchdog is enabled in the early
2343f35ef5SPaul Beesley   platform setup hook at BL1 and disabled in the BL1 prepare exit hook. The
2443f35ef5SPaul Beesley   Trusted Watchdog may be disabled at build time for testing or development
2543f35ef5SPaul Beesley   purposes.
2643f35ef5SPaul Beesley
2743f35ef5SPaul Beesley-  ``ARM_LINUX_KERNEL_AS_BL33``: The Linux kernel expects registers x0-x3 to
2843f35ef5SPaul Beesley   have specific values at boot. This boolean option allows the Trusted Firmware
2943f35ef5SPaul Beesley   to have a Linux kernel image as BL33 by preparing the registers to these
3043f35ef5SPaul Beesley   values before jumping to BL33. This option defaults to 0 (disabled). For
3143f35ef5SPaul Beesley   AArch64 ``RESET_TO_BL31`` and for AArch32 ``RESET_TO_SP_MIN`` must be 1 when
3243f35ef5SPaul Beesley   using it. If this option is set to 1, ``ARM_PRELOADED_DTB_BASE`` must be set
3343f35ef5SPaul Beesley   to the location of a device tree blob (DTB) already loaded in memory. The
3443f35ef5SPaul Beesley   Linux Image address must be specified using the ``PRELOADED_BL33_BASE``
3543f35ef5SPaul Beesley   option.
3643f35ef5SPaul Beesley
3743f35ef5SPaul Beesley-  ``ARM_PLAT_MT``: This flag determines whether the Arm platform layer has to
3843f35ef5SPaul Beesley   cater for the multi-threading ``MT`` bit when accessing MPIDR. When this flag
3943f35ef5SPaul Beesley   is set, the functions which deal with MPIDR assume that the ``MT`` bit in
4043f35ef5SPaul Beesley   MPIDR is set and access the bit-fields in MPIDR accordingly. Default value of
4143f35ef5SPaul Beesley   this flag is 0. Note that this option is not used on FVP platforms.
4243f35ef5SPaul Beesley
4343f35ef5SPaul Beesley-  ``ARM_RECOM_STATE_ID_ENC``: The PSCI1.0 specification recommends an encoding
4443f35ef5SPaul Beesley   for the construction of composite state-ID in the power-state parameter.
4543f35ef5SPaul Beesley   The existing PSCI clients currently do not support this encoding of
4643f35ef5SPaul Beesley   State-ID yet. Hence this flag is used to configure whether to use the
4743f35ef5SPaul Beesley   recommended State-ID encoding or not. The default value of this flag is 0,
4843f35ef5SPaul Beesley   in which case the platform is configured to expect NULL in the State-ID
4943f35ef5SPaul Beesley   field of power-state parameter.
5043f35ef5SPaul Beesley
5143f35ef5SPaul Beesley-  ``ARM_ROTPK_LOCATION``: used when ``TRUSTED_BOARD_BOOT=1``. It specifies the
529b1dad8bSlaurenw-arm   location of the ROTPK returned by the function ``plat_get_rotpk_info()``
5343f35ef5SPaul Beesley   for Arm platforms. Depending on the selected option, the proper private key
5443f35ef5SPaul Beesley   must be specified using the ``ROT_KEY`` option when building the Trusted
5543f35ef5SPaul Beesley   Firmware. This private key will be used by the certificate generation tool
5643f35ef5SPaul Beesley   to sign the BL2 and Trusted Key certificates. Available options for
5743f35ef5SPaul Beesley   ``ARM_ROTPK_LOCATION`` are:
5843f35ef5SPaul Beesley
5943f35ef5SPaul Beesley   -  ``regs`` : return the ROTPK hash stored in the Trusted root-key storage
60a6ffddecSMax Shvetsov      registers.
6143f35ef5SPaul Beesley   -  ``devel_rsa`` : return a development public key hash embedded in the BL1
6243f35ef5SPaul Beesley      and BL2 binaries. This hash has been obtained from the RSA public key
6343f35ef5SPaul Beesley      ``arm_rotpk_rsa.der``, located in ``plat/arm/board/common/rotpk``. To use
6443f35ef5SPaul Beesley      this option, ``arm_rotprivk_rsa.pem`` must be specified as ``ROT_KEY``
6543f35ef5SPaul Beesley      when creating the certificates.
6643f35ef5SPaul Beesley   -  ``devel_ecdsa`` : return a development public key hash embedded in the BL1
6743f35ef5SPaul Beesley      and BL2 binaries. This hash has been obtained from the ECDSA public key
6843f35ef5SPaul Beesley      ``arm_rotpk_ecdsa.der``, located in ``plat/arm/board/common/rotpk``. To
6943f35ef5SPaul Beesley      use this option, ``arm_rotprivk_ecdsa.pem`` must be specified as
7043f35ef5SPaul Beesley      ``ROT_KEY`` when creating the certificates.
719b1dad8bSlaurenw-arm   -  ``devel_full_dev_rsa_key`` : returns a development public key embedded in
729b1dad8bSlaurenw-arm      the BL1 and BL2 binaries. This key has been obtained from the RSA public
739b1dad8bSlaurenw-arm      key ``arm_rotpk_rsa.der``, located in ``plat/arm/board/common/rotpk``.
7443f35ef5SPaul Beesley
759b1dad8bSlaurenw-arm-  ``ARM_ROTPK_HASH``: used when ``ARM_ROTPK_LOCATION=devel_*``, excluding
769b1dad8bSlaurenw-arm   ``devel_full_dev_rsa_key``. Specifies the location of the ROTPK hash. Not
779b1dad8bSlaurenw-arm   expected to be a build option. This defaults to
789b1dad8bSlaurenw-arm   ``plat/arm/board/common/rotpk/*_sha256.bin`` depending on the specified
799b1dad8bSlaurenw-arm   algorithm. Providing ``ROT_KEY`` enforces generation of the hash from the
809b1dad8bSlaurenw-arm   ``ROT_KEY`` and overwrites the default hash file.
81a6ffddecSMax Shvetsov
8243f35ef5SPaul Beesley-  ``ARM_TSP_RAM_LOCATION``: location of the TSP binary. Options:
8343f35ef5SPaul Beesley
8443f35ef5SPaul Beesley   -  ``tsram`` : Trusted SRAM (default option when TBB is not enabled)
8543f35ef5SPaul Beesley   -  ``tdram`` : Trusted DRAM (if available)
8643f35ef5SPaul Beesley   -  ``dram`` : Secure region in DRAM (default option when TBB is enabled,
8743f35ef5SPaul Beesley      configured by the TrustZone controller)
8843f35ef5SPaul Beesley
8943f35ef5SPaul Beesley-  ``ARM_XLAT_TABLES_LIB_V1``: boolean option to compile TF-A with version 1
9043f35ef5SPaul Beesley   of the translation tables library instead of version 2. It is set to 0 by
9143f35ef5SPaul Beesley   default, which selects version 2.
9243f35ef5SPaul Beesley
93e3be1086SManish V Badarkhe-  ``ARM_GPT_SUPPORT``: Enable GPT parser to get the entry address and length of
94e3be1086SManish V Badarkhe   the various partitions present in the GPT image. This support is available
95e3be1086SManish V Badarkhe   only for the BL2 component, and it is disabled by default.
96e3be1086SManish V Badarkhe   The following diagram shows the view of the FIP partition inside the GPT
97e3be1086SManish V Badarkhe   image:
98e3be1086SManish V Badarkhe
99e3be1086SManish V Badarkhe   |FIP in a GPT image|
100e3be1086SManish V Badarkhe
10143f35ef5SPaul BeesleyFor a better understanding of these options, the Arm development platform memory
10243f35ef5SPaul Beesleymap is explained in the :ref:`Firmware Design`.
10343f35ef5SPaul Beesley
10443f35ef5SPaul Beesley.. _build_options_arm_css_platform:
10543f35ef5SPaul Beesley
10643f35ef5SPaul BeesleyArm CSS Platform-Specific Build Options
10743f35ef5SPaul Beesley---------------------------------------
10843f35ef5SPaul Beesley
10943f35ef5SPaul Beesley-  ``CSS_DETECT_PRE_1_7_0_SCP``: Boolean flag to detect SCP version
11043f35ef5SPaul Beesley   incompatibility. Version 1.7.0 of the SCP firmware made a non-backwards
11143f35ef5SPaul Beesley   compatible change to the MTL protocol, used for AP/SCP communication.
11243f35ef5SPaul Beesley   TF-A no longer supports earlier SCP versions. If this option is set to 1
11343f35ef5SPaul Beesley   then TF-A will detect if an earlier version is in use. Default is 1.
11443f35ef5SPaul Beesley
11543f35ef5SPaul Beesley-  ``CSS_LOAD_SCP_IMAGES``: Boolean flag, which when set, adds SCP_BL2 and
11643f35ef5SPaul Beesley   SCP_BL2U to the FIP and FWU_FIP respectively, and enables them to be loaded
11743f35ef5SPaul Beesley   during boot. Default is 1.
11843f35ef5SPaul Beesley
11943f35ef5SPaul Beesley-  ``CSS_USE_SCMI_SDS_DRIVER``: Boolean flag which selects SCMI/SDS drivers
12043f35ef5SPaul Beesley   instead of SCPI/BOM driver for communicating with the SCP during power
12143f35ef5SPaul Beesley   management operations and for SCP RAM Firmware transfer. If this option
12243f35ef5SPaul Beesley   is set to 1, then SCMI/SDS drivers will be used. Default is 0.
12343f35ef5SPaul Beesley
124158ed580SPranav Madhu- ``CSS_SYSTEM_GRACEFUL_RESET``: Build option to enable graceful powerdown of
125158ed580SPranav Madhu   CPU core on reset. This build option can be used on CSS platforms that
126158ed580SPranav Madhu   require all the CPUs to execute the CPU specific power down sequence to
127158ed580SPranav Madhu   complete a warm reboot sequence in which only the CPUs are power cycled.
128158ed580SPranav Madhu
12941e56f42SChris KayArm FVP Build Options
13041e56f42SChris Kay---------------------
13141e56f42SChris Kay
13241e56f42SChris Kay- ``FVP_TRUSTED_SRAM_SIZE``: Size (in kilobytes) of the Trusted SRAM region to
13341e56f42SChris Kay  utilize when building for the FVP platform. This option defaults to 256.
13441e56f42SChris Kay
13531df0632SManish V BadarkheArm Juno Build Options
13631df0632SManish V Badarkhe----------------------
13731df0632SManish V Badarkhe
13831df0632SManish V Badarkhe-  ``JUNO_AARCH32_EL3_RUNTIME``: This build flag enables you to execute EL3
13931df0632SManish V Badarkhe   runtime software in AArch32 mode, which is required to run AArch32 on Juno.
14031df0632SManish V Badarkhe   By default this flag is set to '0'. Enabling this flag builds BL1 and BL2 in
14131df0632SManish V Badarkhe   AArch64 and facilitates the loading of ``SP_MIN`` and BL33 as AArch32 executable
14231df0632SManish V Badarkhe   images.
14331df0632SManish V Badarkhe
144*a1e6467bSRohit MathewArm Neoverse RD Platform Build Options
145*a1e6467bSRohit Mathew--------------------------------------
146*a1e6467bSRohit Mathew
147*a1e6467bSRohit Mathew - ``NRD_CHIP_COUNT``: Configures the number of chips on a Neoverse RD platform
148*a1e6467bSRohit Mathew   which supports multi-chip operation. If ``NRD_CHIP_COUNT`` is set to any
149*a1e6467bSRohit Mathew   valid value greater than 1, the platform code performs required configuration
150*a1e6467bSRohit Mathew   to support multi-chip operation.
151*a1e6467bSRohit Mathew
152*a1e6467bSRohit Mathew- ``NRD_PLATFORM_VARIANT``: Selects the variant of a Neoverse RD platform. A
153*a1e6467bSRohit Mathew  particular Neoverse RD platform may have multiple variants which may differ in
154*a1e6467bSRohit Mathew  core count, cluster count or other peripherals. This build option is used to
155*a1e6467bSRohit Mathew  select the appropriate platform variant for the build. The range of valid
156*a1e6467bSRohit Mathew  values is platform specific.
157*a1e6467bSRohit Mathew
15843f35ef5SPaul Beesley--------------
15943f35ef5SPaul Beesley
160e3be1086SManish V Badarkhe.. |FIP in a GPT image| image:: ../../resources/diagrams/FIP_in_a_GPT_image.png
161e3be1086SManish V Badarkhe
162*a1e6467bSRohit Mathew*Copyright (c) 2019-2024, Arm Limited. All rights reserved.*
163