1Trusted Firmware-A Documentation 2================================ 3 4.. toctree:: 5 :maxdepth: 1 6 :hidden: 7 8 Home<self> 9 getting_started/index 10 process/index 11 components/index 12 design/index 13 plat/index 14 perf/index 15 security_advisories/index 16 change-log 17 acknowledgements 18 maintainers 19 license 20 21.. contents:: On This Page 22 :depth: 3 23 24Trusted Firmware-A (TF-A) provides a reference implementation of secure world 25software for `Armv7-A and Armv8-A`_, including a `Secure Monitor`_ executing 26at Exception Level 3 (EL3). It implements various Arm interface standards, 27such as: 28 29- The `Power State Coordination Interface (PSCI)`_ 30- `Trusted Board Boot Requirements CLIENT (TBBR-CLIENT)`_ 31- `SMC Calling Convention`_ 32- `System Control and Management Interface (SCMI)`_ 33- `Software Delegated Exception Interface (SDEI)`_ 34 35Where possible, the code is designed for reuse or porting to other Armv7-A and 36Armv8-A model and hardware platforms. 37 38This release provides a suitable starting point for productization of secure 39world boot and runtime firmware, in either the AArch32 or AArch64 execution 40states. 41 42Users are encouraged to do their own security validation, including penetration 43testing, on any secure world code derived from TF-A. 44 45Arm will continue development in collaboration with interested parties to 46provide a full reference implementation of Secure Monitor code and Arm standards 47to the benefit of all developers working with Armv7-A and Armv8-A TrustZone 48technology. 49 50Functionality 51------------- 52 53- Initialization of the secure world, for example exception vectors, control 54 registers and interrupts for the platform. 55 56- Library support for CPU specific reset and power down sequences. This 57 includes support for errata workarounds and the latest Arm DynamIQ CPUs. 58 59- Drivers to enable standard initialization of Arm System IP, for example 60 Generic Interrupt Controller (GIC), Cache Coherent Interconnect (CCI), 61 Cache Coherent Network (CCN), Network Interconnect (NIC) and TrustZone 62 Controller (TZC). 63 64- A generic `SCMI`_ driver to interface with conforming power controllers, for 65 example the Arm System Control Processor (SCP). 66 67- SMC (Secure Monitor Call) handling, conforming to the `SMC Calling 68 Convention`_ using an EL3 runtime services framework. 69 70- `PSCI`_ library support for CPU, cluster and system power management 71 use-cases. 72 This library is pre-integrated with the AArch64 EL3 Runtime Software, and 73 is also suitable for integration with other AArch32 EL3 Runtime Software, 74 for example an AArch32 Secure OS. 75 76- A minimal AArch32 Secure Payload (SP\_MIN) to demonstrate `PSCI`_ library 77 integration with AArch32 EL3 Runtime Software. 78 79- Secure Monitor library code such as world switching, EL1 context management 80 and interrupt routing. 81 When a Secure-EL1 Payload (SP) is present, for example a Secure OS, the 82 AArch64 EL3 Runtime Software must be integrated with a Secure Payload 83 Dispatcher (SPD) component to customize the interaction with the SP. 84 85- A Test SP and SPD to demonstrate AArch64 Secure Monitor functionality and SP 86 interaction with PSCI. 87 88- SPDs for the `OP-TEE Secure OS`_, `NVIDIA Trusted Little Kernel`_ 89 and `Trusty Secure OS`_. 90 91- A Trusted Board Boot implementation, conforming to all mandatory TBBR 92 requirements. This includes image authentication, Firmware Update (or 93 recovery mode), and packaging of the various firmware images into a 94 Firmware Image Package (FIP). 95 96- Pre-integration of TBB with the Arm CryptoCell product, to take advantage of 97 its hardware Root of Trust and crypto acceleration services. 98 99- Reliability, Availability, and Serviceability (RAS) functionality, including 100 101 - A Secure Partition Manager (SPM) to manage Secure Partitions in 102 Secure-EL0, which can be used to implement simple management and 103 security services. 104 105 - An SDEI dispatcher to route interrupt-based SDEI events. 106 107 - An Exception Handling Framework (EHF) that allows dispatching of EL3 108 interrupts to their registered handlers, to facilitate firmware-first 109 error handling. 110 111- A dynamic configuration framework that enables each of the firmware images 112 to be configured at runtime if required by the platform. It also enables 113 loading of a hardware configuration (for example, a kernel device tree) 114 as part of the FIP, to be passed through the firmware stages. 115 116- Support for alternative boot flows, for example to support platforms where 117 the EL3 Runtime Software is loaded using other firmware or a separate 118 secure system processor, or where a non-TF-A ROM expects BL2 to be loaded 119 at EL3. 120 121- Support for the GCC, LLVM and Arm Compiler 6 toolchains. 122 123- Support for combining several libraries into a "romlib" image that may be 124 shared across images to reduce memory footprint. The romlib image is stored 125 in ROM but is accessed through a jump-table that may be stored 126 in read-write memory, allowing for the library code to be patched. 127 128- A prototype implementation of a Secure Partition Manager (SPM) that is based 129 on the SPCI Alpha 1 and SPRT draft specifications. 130 131- Support for ARMv8.3 pointer authentication in the normal and secure worlds. 132 The use of pointer authentication in the normal world is enabled whenever 133 architectural support is available, without the need for additional build 134 flags. Use of pointer authentication in the secure world remains an 135 experimental configuration at this time and requires the ``ENABLE_PAUTH`` 136 build flag to be set. 137 138- Position-Independent Executable (PIE) support. Initially for BL31 only, with 139 further support to be added in a future release. 140 141For a full description of functionality and implementation details, please 142see the `Firmware Design`_ and supporting documentation. The `Change Log`_ 143provides details of changes made since the last release. 144 145Platforms 146--------- 147 148Various AArch32 and AArch64 builds of this release have been tested on r0, r1 149and r2 variants of the `Juno Arm Development Platform`_. 150 151The latest version of the AArch64 build of TF-A has been tested on the following 152Arm FVPs without shifted affinities, and that do not support threaded CPU cores 153(64-bit host machine only). 154 155The FVP models used are Version 11.5 Build 33, unless otherwise stated. 156 157- ``FVP_Base_AEMv8A-AEMv8A`` 158- ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502`` 159- ``FVP_Base_RevC-2xAEMv8A`` 160- ``FVP_Base_Cortex-A32x4`` 161- ``FVP_Base_Cortex-A35x4`` 162- ``FVP_Base_Cortex-A53x4`` 163- ``FVP_Base_Cortex-A55x4+Cortex-A75x4`` 164- ``FVP_Base_Cortex-A55x4`` 165- ``FVP_Base_Cortex-A57x1-A53x1`` 166- ``FVP_Base_Cortex-A57x2-A53x4`` 167- ``FVP_Base_Cortex-A57x4-A53x4`` 168- ``FVP_Base_Cortex-A57x4`` 169- ``FVP_Base_Cortex-A72x4-A53x4`` 170- ``FVP_Base_Cortex-A72x4`` 171- ``FVP_Base_Cortex-A73x4-A53x4`` 172- ``FVP_Base_Cortex-A73x4`` 173- ``FVP_Base_Cortex-A75x4`` 174- ``FVP_Base_Cortex-A76x4`` 175- ``FVP_Base_Cortex-A76AEx4`` (Tested with internal model) 176- ``FVP_Base_Cortex-A76AEx8`` (Tested with internal model) 177- ``FVP_Base_Neoverse-N1x4`` (Tested with internal model) 178- ``FVP_Base_Deimos`` 179- ``FVP_CSS_SGI-575`` (Version 11.3 build 42) 180- ``FVP_CSS_SGM-775`` (Version 11.3 build 42) 181- ``FVP_RD_E1Edge`` (Version 11.3 build 42) 182- ``FVP_RD_N1Edge`` (Version 11.3 build 42) 183- ``Foundation_Platform`` 184 185The latest version of the AArch32 build of TF-A has been tested on the following 186Arm FVPs without shifted affinities, and that do not support threaded CPU cores 187(64-bit host machine only). 188 189- ``FVP_Base_AEMv8A-AEMv8A`` 190- ``FVP_Base_Cortex-A32x4`` 191 192NOTE: The ``FVP_Base_RevC-2xAEMv8A`` FVP only supports shifted affinities. 193 194The Foundation FVP can be downloaded free of charge. The Base FVPs can be 195licensed from Arm. See the `Arm FVP website`_. 196 197All the above platforms have been tested with `Linaro Release 18.04`_. 198 199This release also contains the following platform support: 200 201- Allwinner sun50i_a64 and sun50i_h6 202- Amlogic Meson S905 (GXBB) 203- Arm Juno Software Development Platform 204- Arm Neoverse N1 System Development Platform (N1SDP) 205- Arm Neoverse Reference Design N1 Edge (RD-N1-Edge) FVP 206- Arm Neoverse Reference Design E1 Edge (RD-E1-Edge) FVP 207- Arm SGI-575 and SGM-775 208- Arm Versatile Express FVP 209- HiKey, HiKey960 and Poplar boards 210- Intel Stratix 10 SoC FPGA 211- Marvell Armada 3700 and 8K 212- MediaTek MT6795 and MT8173 SoCs 213- NVIDIA T132, T186 and T210 SoCs 214- NXP QorIQ LS1043A, i.MX8MM, i.MX8MQ, i.MX8QX, i.MX8QM and i.MX7Solo WaRP7 215- QEMU 216- Raspberry Pi 3 217- Renesas R-Car Generation 3 218- RockChip RK3328, RK3368 and RK3399 SoCs 219- Socionext UniPhier SoC family and SynQuacer SC2A11 SoCs 220- STMicroelectronics STM32MP1 221- Texas Instruments K3 SoCs 222- Xilinx Versal and Zynq UltraScale + MPSoC 223 224Still to come 225------------- 226 227- Support for additional platforms. 228 229- Refinements to Position Independent Executable (PIE) support. 230 231- Refinements to the SPCI-based SPM implementation as the draft SPCI and SPRT 232 specifications continue to evolve. 233 234- Documentation enhancements. 235 236- Ongoing support for new architectural features, CPUs and System IP. 237 238- Ongoing support for new Arm system architecture specifications. 239 240- Ongoing security hardening, optimization and quality improvements. 241 242For a full list of detailed issues in the current code, please see the `Change 243Log`_ and the `issue tracker`_. 244 245Getting started 246--------------- 247 248See the `User Guide`_ for instructions on how to download, install, build and 249use TF-A with the Arm `FVP`_\ s. 250 251See the `Firmware Design`_ for information on how TF-A works. 252 253See the `Porting Guide`_ as well for information about how to use this 254software on another Armv7-A or Armv8-A platform. 255 256See the `Contributing Guidelines`_ for information on how to contribute to this 257project and the `Acknowledgments`_ file for a list of contributors to the 258project. 259 260IRC channel 261~~~~~~~~~~~ 262 263Development discussion takes place on the #trusted-firmware-a channel 264on the Freenode IRC network. This is not an official support channel. 265If you have an issue to raise, please use the `issue tracker`_. 266 267Feedback and support 268~~~~~~~~~~~~~~~~~~~~ 269 270Arm welcomes any feedback on TF-A. If you think you have found a security 271vulnerability, please report this using the process defined in the TF-A 272`Security Center`_. For all other feedback, please use the 273`issue tracker`_. 274 275Arm licensees may contact Arm directly via their partner managers. 276 277-------------- 278 279*Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.* 280 281.. _Armv7-A and Armv8-A: https://developer.arm.com/products/architecture/a-profile 282.. _Secure Monitor: http://www.arm.com/products/processors/technologies/trustzone/tee-smc.php 283.. _Power State Coordination Interface (PSCI): PSCI_ 284.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf 285.. _Trusted Board Boot Requirements CLIENT (TBBR-CLIENT): https://developer.arm.com/docs/den0006/latest/trusted-board-boot-requirements-client-tbbr-client-armv8-a 286.. _SMC Calling Convention: http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf 287.. _System Control and Management Interface (SCMI): SCMI_ 288.. _SCMI: http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf 289.. _Software Delegated Exception Interface (SDEI): SDEI_ 290.. _SDEI: http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf 291.. _Juno Arm Development Platform: http://www.arm.com/products/tools/development-boards/versatile-express/juno-arm-development-platform.php 292.. _Arm FVP website: FVP_ 293.. _FVP: https://developer.arm.com/products/system-design/fixed-virtual-platforms 294.. _Linaro Release 18.04: https://community.arm.com/dev-platforms/b/documents/posts/linaro-release-notes-deprecated#LinaroRelease18.04 295.. _OP-TEE Secure OS: https://github.com/OP-TEE/optee_os 296.. _NVIDIA Trusted Little Kernel: http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/ote_partner/tlk.git;a=summary 297.. _Trusty Secure OS: https://source.android.com/security/trusty 298.. _trustedfirmware.org: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git 299.. _issue tracker: https://issues.trustedfirmware.org 300.. _Security Center: ./docs/security-center.rst 301.. _license: ./license.rst 302.. _Contributing Guidelines: ./contributing.rst 303.. _Acknowledgments: ./acknowledgements.rst 304.. _Firmware Design: ./docs/firmware-design.rst 305.. _Change Log: ./docs/change-log.rst 306.. _User Guide: ./docs/user-guide.rst 307.. _Porting Guide: ./docs/porting-guide.rst 308.. _FreeBSD: http://www.freebsd.org 309.. _SCC: http://www.simple-cc.org/ 310.. _Security Advisory TFV-1: ./docs/security_advisories/security-advisory-tfv-1.rst 311.. _Security Advisory TFV-2: ./docs/security_advisories/security-advisory-tfv-2.rst 312.. _Security Advisory TFV-3: ./docs/security_advisories/security-advisory-tfv-3.rst 313.. _Security Advisory TFV-4: ./docs/security_advisories/security-advisory-tfv-4.rst 314.. _Security Advisory TFV-5: ./docs/security_advisories/security-advisory-tfv-5.rst 315.. _Security Advisory TFV-6: ./docs/security_advisories/security-advisory-tfv-6.rst 316.. _Security Advisory TFV-7: ./docs/security_advisories/security-advisory-tfv-7.rst 317.. _Security Advisory TFV-8: ./docs/security_advisories/security-advisory-tfv-8.rst 318