xref: /rk3399_ARM-atf/docs/glossary.rst (revision ffb7742125def3e0acca4c7e4d3215af5ce25a31)
1Glossary
2========
3
4This glossary provides definitions for terms and abbreviations used in the TF-A
5documentation.
6
7You can find additional definitions in the `Arm Glossary`_.
8
9.. glossary::
10   :sorted:
11
12   AArch32
13      32-bit execution state of the ARMv8 ISA
14
15   AArch64
16      64-bit execution state of the ARMv8 ISA
17
18   AMU
19      Activity Monitor Unit, a hardware monitoring unit introduced by FEAT_AMUv1
20      that exposes CPU core runtime metrics as a set of counter registers.
21
22   API
23      Application Programming Interface
24
25   AT
26      Address Translation
27
28   BTI
29      Branch Target Identification. An Armv8.5 extension providing additional
30      control flow integrity around indirect branches and their targets.
31
32   CoT
33   COT
34      Chain of Trust
35
36   CSS
37      Compute Sub-System
38
39   CVE
40      Common Vulnerabilities and Exposures. A CVE document is commonly used to
41      describe a publicly-known security vulnerability.
42
43   DCE
44      DRTM Configuration Environment
45
46   D-CRTM
47      Dynamic Code Root of Trust for Measurement
48
49   DLME
50      Dynamically Launched Measured Environment
51
52   DRTM
53      Dynamic Root of Trust for Measurement
54
55   DS-5
56      Arm Development Studio 5
57
58   DSU
59      DynamIQ Shared Unit
60
61   DT
62      Device Tree
63
64   DTB
65      Device Tree Blob
66
67   EL
68      Exception Level
69
70   EHF
71      Exception Handling Framework
72
73   ERRATA_ABI
74      Errata management firmware interface
75
76   FCONF
77      Firmware Configuration Framework
78
79   FDT
80      Flattened Device Tree
81
82   FF-A
83      Firmware Framework for Arm A-profile
84
85   FIP
86      Firmware Image Package
87
88   FVP
89      Fixed Virtual Platform
90
91   FWU
92      FirmWare Update
93
94   GIC
95      Generic Interrupt Controller
96
97   ISA
98      Instruction Set Architecture
99
100   Linaro
101      A collaborative engineering organization consolidating
102      and optimizing open source software and tools for the Arm architecture.
103
104   LSP
105      A logical secure partition managed by SPM
106
107   MMU
108      Memory Management Unit
109
110   MPAM
111      Memory Partitioning And Monitoring. An optional Armv8.4 extension.
112
113   MPMM
114     Maximum Power Mitigation Mechanism, an optional power management mechanism
115     supported by some Arm Armv9-A cores.
116
117   MPIDR
118      Multiprocessor Affinity Register
119
120   MTE
121      Memory Tagging Extension. An optional Armv8.5 extension that enables
122      hardware-assisted memory tagging.
123
124   OEN
125      Owning Entity Number
126
127   OP-TEE
128      Open Portable Trusted Execution Environment. An example of a :term:`TEE`
129
130   OTE
131      Open-source Trusted Execution Environment
132
133   PDD
134      Platform Design Document
135
136   PAUTH
137      Pointer Authentication. An optional extension introduced in Armv8.3.
138
139   PMF
140      Performance Measurement Framework
141
142   PSA
143      Platform Security Architecture
144
145   PSR
146     Platform Security Requirements
147
148   PSCI
149      Power State Coordination Interface
150
151   RAS
152      Reliability, Availability, and Serviceability extensions. A mandatory
153      extension for the Armv8.2 architecture and later. An optional extension to
154      the base Armv8 architecture.
155
156   ROT
157      Root of Trust
158
159   SCMI
160      System Control and Management Interface
161
162   SCP
163      System Control Processor
164
165   SDEI
166      Software Delegated Exception Interface
167
168   SDS
169      Shared Data Storage
170
171   SEA
172      Synchronous External Abort
173
174   SiP
175   SIP
176      Silicon Provider
177
178   SMC
179      Secure Monitor Call
180
181   SMCCC
182      :term:`SMC` Calling Convention
183
184   SoC
185      System on Chip
186
187   SP
188      Secure Partition
189
190   SPD
191      Secure Payload Dispatcher
192
193   SPM
194      Secure Partition Manager
195
196   SRTM
197      Static Root of Trust for Measurement
198
199   SSBS
200      Speculative Store Bypass Safe. Introduced in Armv8.5, this configuration
201      bit can be set by software to allow or prevent the hardware from
202      performing speculative operations.
203
204   SVE
205      Scalable Vector Extension
206
207   TBB
208      Trusted Board Boot
209
210   TBBR
211      Trusted Board Boot Requirements
212
213   TCB
214      Trusted Compute Base
215
216   TCG
217      Trusted Computing Group
218
219   TEE
220      Trusted Execution Environment
221
222   TF-A
223      Trusted Firmware-A
224
225   TF-M
226      Trusted Firmware-M
227
228   TLB
229      Translation Lookaside Buffer
230
231   TLK
232      Trusted Little Kernel. A Trusted OS from NVIDIA.
233
234   TPM
235      Trusted Platform Module
236
237   TRNG
238      True Random Number Generator (hardware based)
239
240   TSP
241      Test Secure Payload
242
243   TZC
244      TrustZone Controller
245
246   UBSAN
247      Undefined Behavior Sanitizer
248
249   UEFI
250      Unified Extensible Firmware Interface
251
252   WDOG
253      Watchdog
254
255   XLAT
256      Translation (abbr.). For example, "XLAT table".
257
258.. _`Arm Glossary`: https://developer.arm.com/support/arm-glossary
259