xref: /rk3399_ARM-atf/docs/glossary.rst (revision b62673c645752a78f649282cfa293e8da09e3bef)
1Glossary
2========
3
4This glossary provides definitions for terms and abbreviations used in the TF-A
5documentation.
6
7You can find additional definitions in the `Arm Glossary`_.
8
9.. glossary::
10   :sorted:
11
12   AArch32
13      32-bit execution state of the ARMv8 ISA
14
15   AArch64
16      64-bit execution state of the ARMv8 ISA
17
18   AMU
19      Activity Monitor Unit, a hardware monitoring unit introduced by FEAT_AMUv1
20      that exposes CPU core runtime metrics as a set of counter registers.
21
22   API
23      Application Programming Interface
24
25   AT
26      Address Translation
27
28   BTI
29      Branch Target Identification. An Armv8.5 extension providing additional
30      control flow integrity around indirect branches and their targets.
31
32   CoT
33   COT
34      Chain of Trust
35
36   CSS
37      Compute Sub-System
38
39   CVE
40      Common Vulnerabilities and Exposures. A CVE document is commonly used to
41      describe a publicly-known security vulnerability.
42
43   DICE
44      Device Identifier Composition Engine
45
46   DCE
47      DRTM Configuration Environment
48
49   D-CRTM
50      Dynamic Code Root of Trust for Measurement
51
52   DLME
53      Dynamically Launched Measured Environment
54
55   DRTM
56      Dynamic Root of Trust for Measurement
57
58   DPE
59      DICE Protection Environment
60
61   DS-5
62      Arm Development Studio 5
63
64   DSU
65      DynamIQ Shared Unit
66
67   DT
68      Device Tree
69
70   DTB
71      Device Tree Blob
72
73   EL
74      Exception Level
75
76   EHF
77      Exception Handling Framework
78
79   ERRATA_ABI
80      Errata management firmware interface
81
82   FCONF
83      Firmware Configuration Framework
84
85   FDT
86      Flattened Device Tree
87
88   FF-A
89      Firmware Framework for Arm A-profile
90
91   FIP
92      Firmware Image Package
93
94   FVP
95      Fixed Virtual Platform
96
97   FWU
98      FirmWare Update
99
100   GIC
101      Generic Interrupt Controller
102
103   HES
104      Arm CCA Hardware Enforced Security
105
106   ISA
107      Instruction Set Architecture
108
109   Linaro
110      A collaborative engineering organization consolidating
111      and optimizing open source software and tools for the Arm architecture.
112
113   LSP
114      A logical secure partition managed by SPM
115
116   MMU
117      Memory Management Unit
118
119   MPAM
120      Memory Partitioning And Monitoring. An optional Armv8.4 extension.
121
122   MPMM
123     Maximum Power Mitigation Mechanism, an optional power management mechanism
124     supported by some Arm Armv9-A cores.
125
126   MPIDR
127      Multiprocessor Affinity Register
128
129   MTE
130      Memory Tagging Extension. An optional Armv8.5 extension that enables
131      hardware-assisted memory tagging.
132
133   LTS
134      Long-Term Support
135
136   OEN
137      Owning Entity Number
138
139   OP-TEE
140      Open Portable Trusted Execution Environment. An example of a :term:`TEE`
141
142   OTE
143      Open-source Trusted Execution Environment
144
145   PCR
146      Platform Configuration Register
147
148   PDD
149      Platform Design Document
150
151   PAUTH
152      Pointer Authentication. An optional extension introduced in Armv8.3.
153
154   PMF
155      Performance Measurement Framework
156
157   PSA
158      Platform Security Architecture
159
160   PSR
161     Platform Security Requirements
162
163   PSCI
164      Power State Coordination Interface
165
166   RAS
167      Reliability, Availability, and Serviceability extensions. A mandatory
168      extension for the Armv8.2 architecture and later. An optional extension to
169      the base Armv8 architecture.
170
171   ROT
172      Root of Trust
173
174   RSE
175      Runtime Security Engine
176
177   SCMI
178      System Control and Management Interface
179
180   SCP
181      System Control Processor
182
183   SDEI
184      Software Delegated Exception Interface
185
186   SDS
187      Shared Data Storage
188
189   SEA
190      Synchronous External Abort
191
192   SiP
193   SIP
194      Silicon Provider
195
196   SMC
197      Secure Monitor Call
198
199   SMCCC
200      :term:`SMC` Calling Convention
201
202   SoC
203      System on Chip
204
205   SP
206      Secure Partition
207
208   SPD
209      Secure Payload Dispatcher
210
211   SPM
212      Secure Partition Manager
213
214   SRTM
215      Static Root of Trust for Measurement
216
217   SSBS
218      Speculative Store Bypass Safe. Introduced in Armv8.5, this configuration
219      bit can be set by software to allow or prevent the hardware from
220      performing speculative operations.
221
222   SVE
223      Scalable Vector Extension
224
225   TBB
226      Trusted Board Boot
227
228   TBBR
229      Trusted Board Boot Requirements
230
231   TCB
232      Trusted Compute Base
233
234   TCG
235      Trusted Computing Group
236
237   TEE
238      Trusted Execution Environment
239
240   TF-A
241      Trusted Firmware-A
242
243   TF-M
244      Trusted Firmware-M
245
246   TLB
247      Translation Lookaside Buffer
248
249   TLK
250      Trusted Little Kernel. A Trusted OS from NVIDIA.
251
252   TPM
253      Trusted Platform Module
254
255   TRNG
256      True Random Number Generator (hardware based)
257
258   TSP
259      Test Secure Payload
260
261   TZC
262      TrustZone Controller
263
264   UBSAN
265      Undefined Behavior Sanitizer
266
267   UEFI
268      Unified Extensible Firmware Interface
269
270   WDOG
271      Watchdog
272
273   XLAT
274      Translation (abbr.). For example, "XLAT table".
275
276.. _`Arm Glossary`: https://developer.arm.com/support/arm-glossary
277