1Arm CPU Specific Build Macros 2============================= 3 4This document describes the various build options present in the CPU specific 5operations framework to enable errata workarounds and to enable optimizations 6for a specific CPU on a platform. 7 8Security Vulnerability Workarounds 9---------------------------------- 10 11TF-A exports a series of build flags which control which security 12vulnerability workarounds should be applied at runtime. 13 14- ``WORKAROUND_CVE_2017_5715``: Enables the security workaround for 15 `CVE-2017-5715`_. This flag can be set to 0 by the platform if none 16 of the PEs in the system need the workaround. Setting this flag to 0 provides 17 no performance benefit for non-affected platforms, it just helps to comply 18 with the recommendation in the spec regarding workaround discovery. 19 Defaults to 1. 20 21- ``WORKAROUND_CVE_2018_3639``: Enables the security workaround for 22 `CVE-2018-3639`_. Defaults to 1. The TF-A project recommends to keep 23 the default value of 1 even on platforms that are unaffected by 24 CVE-2018-3639, in order to comply with the recommendation in the spec 25 regarding workaround discovery. 26 27- ``DYNAMIC_WORKAROUND_CVE_2018_3639``: Enables dynamic mitigation for 28 `CVE-2018-3639`_. This build option should be set to 1 if the target 29 platform contains at least 1 CPU that requires dynamic mitigation. 30 Defaults to 0. 31 32- ``WORKAROUND_CVE_2022_23960``: Enables mitigation for `CVE-2022-23960`_. 33 This build option should be set to 1 if the target platform contains at 34 least 1 CPU that requires this mitigation. Defaults to 1. 35 36- ``WORKAROUND_CVE_2024_5660``: Enables mitigation for `CVE-2024-5660`. 37 The fix is to disable hardware page aggregation by setting CPUECTLR_EL1[46] 38 in EL3 FW. This build option should be set to 1 if the target platform contains 39 at least 1 CPU that requires this mitigation. Defaults to 1. 40 41- ``WORKAROUND_CVE_2024_7881``: Enables mitigation for `CVE-2024-7881`. 42 This build option should be set to 1 if the target platform contains at 43 least 1 CPU that requires this mitigation. Defaults to 1. 44 45- ``WORKAROUND_CVE_2025_0647``: Enables mitigation for `CVE-2025-0647`. 46 This build option should be set to 1 if the target platform contains at 47 least 1 CPU that requires this mitigation. Defaults to 1. 48 49.. _arm_cpu_macros_errata_workarounds: 50 51CPU Errata Workarounds 52---------------------- 53 54TF-A exports a series of build flags which control the errata workarounds that 55are applied to each CPU by the reset handler. The errata details can be found 56in the CPU specific errata documents published by Arm: 57For example: `Cortex-A72 MPCore Software Developers Errata Notice`_ 58 59The errata workarounds are implemented for a particular revision or a set of 60processor revisions. This is checked by the reset handler at runtime. Each 61errata workaround is identified by its ``ID`` as specified in the processor's 62errata notice document. The format of the define used to enable/disable the 63errata workaround is ``ERRATA_<Processor name>_<ID>``, where the ``Processor name`` 64is for example ``A57`` for the ``Cortex_A57`` CPU. 65 66Refer to :ref:`firmware_design_cpu_errata_implementation` for information on how to 67write errata workaround functions. 68 69All workarounds are disabled by default. The platform is responsible for 70enabling these workarounds according to its requirement by defining the 71errata workaround build flags in the platform specific makefile. In case 72these workarounds are enabled for the wrong CPU revision then the errata 73workaround is not applied. In the DEBUG build, this is indicated by 74printing a warning to the crash console. 75 76In the current implementation, a platform which has more than 1 variant 77with different revisions of a processor has no runtime mechanism available 78for it to specify which errata workarounds should be enabled or not. 79 80The value of the build flags is 0 by default, that is, disabled. A value of 1 81will enable it. 82 83For Cortex-A9, the following errata build flags are defined : 84 85- ``ERRATA_A9_794073``: This applies errata 794073 workaround to Cortex-A9 86 CPU. This needs to be enabled for all revisions of the CPU. 87 88For Cortex-A15, the following errata build flags are defined : 89 90- ``ERRATA_A15_816470``: This applies errata 816470 workaround to Cortex-A15 91 CPU. This needs to be enabled only for revision >= r3p0 of the CPU. 92 93- ``ERRATA_A15_827671``: This applies errata 827671 workaround to Cortex-A15 94 CPU. This needs to be enabled only for revision >= r3p0 of the CPU. 95 96For Cortex-A17, the following errata build flags are defined : 97 98- ``ERRATA_A17_852421``: This applies errata 852421 workaround to Cortex-A17 99 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 100 101- ``ERRATA_A17_852423``: This applies errata 852423 workaround to Cortex-A17 102 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 103 104For Cortex-A35, the following errata build flags are defined : 105 106- ``ERRATA_A35_855472``: This applies errata 855472 workaround to Cortex-A35 107 CPUs. This needs to be enabled only for revision r0p0 of Cortex-A35. 108 109For Cortex-A53, the following errata build flags are defined : 110 111- ``ERRATA_A53_819472``: This applies errata 819472 workaround to all 112 CPUs. This needs to be enabled only for revision <= r0p1 of Cortex-A53. 113 114- ``ERRATA_A53_824069``: This applies errata 824069 workaround to all 115 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53. 116 117- ``ERRATA_A53_826319``: This applies errata 826319 workaround to Cortex-A53 118 CPU. This needs to be enabled only for revision <= r0p2 of the CPU. 119 120- ``ERRATA_A53_827319``: This applies errata 827319 workaround to all 121 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53. 122 123- ``ERRATA_A53_835769``: This applies erratum 835769 workaround at compile and 124 link time to Cortex-A53 CPU. This needs to be enabled for some variants of 125 revision <= r0p4. This workaround can lead the linker to create ``*.stub`` 126 sections. 127 128- ``ERRATA_A53_836870``: This applies errata 836870 workaround to Cortex-A53 129 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From 130 r0p4 and onwards, this errata is enabled by default in hardware. Identical to 131 ``A53_DISABLE_NON_TEMPORAL_HINT``. 132 133- ``ERRATA_A53_843419``: This applies erratum 843419 workaround at link time 134 to Cortex-A53 CPU. This needs to be enabled for some variants of revision 135 <= r0p4. This workaround can lead the linker to emit ``*.stub`` sections 136 which are 4kB aligned. 137 138- ``ERRATA_A53_855873``: This applies errata 855873 workaround to Cortex-A53 139 CPUs. Though the erratum is present in every revision of the CPU, 140 this workaround is only applied to CPUs from r0p3 onwards, which feature 141 a chicken bit in CPUACTLR_EL1 to enable a hardware workaround. 142 Earlier revisions of the CPU have other errata which require the same 143 workaround in software, so they should be covered anyway. 144 145- ``ERRATA_A53_1530924``: This applies errata 1530924 workaround to all 146 revisions of Cortex-A53 CPU. 147 148For Cortex-A55, the following errata build flags are defined : 149 150- ``ERRATA_A55_768277``: This applies errata 768277 workaround to Cortex-A55 151 CPU. This needs to be enabled only for revision r0p0 of the CPU. 152 153- ``ERRATA_A55_778703``: This applies errata 778703 workaround to Cortex-A55 154 CPU. This needs to be enabled only for revision r0p0 of the CPU. 155 156- ``ERRATA_A55_798797``: This applies errata 798797 workaround to Cortex-A55 157 CPU. This needs to be enabled only for revision r0p0 of the CPU. 158 159- ``ERRATA_A55_846532``: This applies errata 846532 workaround to Cortex-A55 160 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 161 162- ``ERRATA_A55_903758``: This applies errata 903758 workaround to Cortex-A55 163 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 164 165- ``ERRATA_A55_1221012``: This applies errata 1221012 workaround to Cortex-A55 166 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 167 168- ``ERRATA_A55_1530923``: This applies errata 1530923 workaround to all 169 revisions of Cortex-A55 CPU. 170 171For Cortex-A57, the following errata build flags are defined : 172 173- ``ERRATA_A57_806969``: This applies errata 806969 workaround to Cortex-A57 174 CPU. This needs to be enabled only for revision r0p0 of the CPU. 175 176- ``ERRATA_A57_813419``: This applies errata 813419 workaround to Cortex-A57 177 CPU. This needs to be enabled only for revision r0p0 of the CPU. 178 179- ``ERRATA_A57_813420``: This applies errata 813420 workaround to Cortex-A57 180 CPU. This needs to be enabled only for revision r0p0 of the CPU. 181 182- ``ERRATA_A57_814670``: This applies errata 814670 workaround to Cortex-A57 183 CPU. This needs to be enabled only for revision r0p0 of the CPU. 184 185- ``ERRATA_A57_817169``: This applies errata 817169 workaround to Cortex-A57 186 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 187 188- ``ERRATA_A57_826974``: This applies errata 826974 workaround to Cortex-A57 189 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 190 191- ``ERRATA_A57_826977``: This applies errata 826977 workaround to Cortex-A57 192 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 193 194- ``ERRATA_A57_828024``: This applies errata 828024 workaround to Cortex-A57 195 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 196 197- ``ERRATA_A57_829520``: This applies errata 829520 workaround to Cortex-A57 198 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 199 200- ``ERRATA_A57_833471``: This applies errata 833471 workaround to Cortex-A57 201 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 202 203- ``ERRATA_A57_859972``: This applies errata 859972 workaround to Cortex-A57 204 CPU. This needs to be enabled only for revision <= r1p3 of the CPU. 205 206- ``ERRATA_A57_1319537``: This applies errata 1319537 workaround to all 207 revisions of Cortex-A57 CPU. 208 209For Cortex-A65, the following errata build flags are defined : 210 211- ``ERRATA_A65_1179935``: This applies errata 1179935 workaround to Cortex-A65 212 CPU. This needs to be enabled only for revision r0p0 of the CPU, and is fixed 213 in r1p0. 214 215- ``ERRATA_A65_1227419``: This applies errata 1227419 workaround to Cortex-A65 216 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU and 217 is fixed in r1p1. 218 219- ``ERRATA_A65_1541130``: This applies errata 1541130 workaround to r0p0, r1p0, 220 r1p1, r1p2 revisions of the CPU and is still open. 221 222For Cortex-A65AE, the following errata build flags are defined : 223 224- ``ERRATA_A65AE_1638571``: This applies errata 1638571 workaround to Cortex-A65AE 225 CPU. This needs to be enabled r0p0, r1p0, r1p1 revisions of the CPU and is still 226 open. 227 228For Cortex-A72, the following errata build flags are defined : 229 230- ``ERRATA_A72_859971``: This applies errata 859971 workaround to Cortex-A72 231 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. 232 233- ``ERRATA_A72_1319367``: This applies errata 1319367 workaround to all 234 revisions of Cortex-A72 CPU. 235 236For Cortex-A73, the following errata build flags are defined : 237 238- ``ERRATA_A73_852427``: This applies errata 852427 workaround to Cortex-A73 239 CPU. This needs to be enabled only for revision r0p0 of the CPU. 240 241- ``ERRATA_A73_855423``: This applies errata 855423 workaround to Cortex-A73 242 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 243 244For Cortex-A75, the following errata build flags are defined : 245 246- ``ERRATA_A75_764081``: This applies errata 764081 workaround to Cortex-A75 247 CPU. This needs to be enabled only for revision r0p0 of the CPU. 248 249- ``ERRATA_A75_790748``: This applies errata 790748 workaround to Cortex-A75 250 CPU. This needs to be enabled only for revision r0p0 of the CPU. 251 252For Cortex-A76, the following errata build flags are defined : 253 254- ``ERRATA_A76_1073348``: This applies errata 1073348 workaround to Cortex-A76 255 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 256 257- ``ERRATA_A76_1130799``: This applies errata 1130799 workaround to Cortex-A76 258 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 259 260- ``ERRATA_A76_1165347``: This applies errata 1165347 workaround to Cortex-A76 261 CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU. 262 It is fixed in r3p0. 263 264- ``ERRATA_A76_1207823``: This applies errata 1207823 workaround to Cortex-A76 265 CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU. 266 It is fixed in r3p0. 267 268- ``ERRATA_A76_1220197``: This applies errata 1220197 workaround to Cortex-A76 269 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 270 271- ``ERRATA_A76_1257314``: This applies errata 1257314 workaround to Cortex-A76 272 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 273 274- ``ERRATA_A76_1262606``: This applies errata 1262606 workaround to Cortex-A76 275 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 276 277- ``ERRATA_A76_1262888``: This applies errata 1262888 workaround to Cortex-A76 278 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 279 280- ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76 281 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 282 283- ``ERRATA_A76_1791580``: This applies errata 1791580 workaround to Cortex-A76 284 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 285 286- ``ERRATA_A76_1165522``: This applies errata 1165522 workaround to all 287 revisions of Cortex-A76 CPU. This errata is fixed in r3p0 but due to 288 limitation of errata framework this errata is applied to all revisions 289 of Cortex-A76 CPU. 290 291- ``ERRATA_A76_1868343``: This applies errata 1868343 workaround to Cortex-A76 292 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 293 294- ``ERRATA_A76_1946160``: This applies errata 1946160 workaround to Cortex-A76 295 CPU. This needs to be enabled only for revisions r3p0 - r4p1 of the CPU. 296 297- ``ERRATA_A76_2743102``: This applies errata 2743102 workaround to Cortex-A76 298 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 299 still open. 300 301For Cortex-A76AE, the following errata build flags are defined : 302 303- ``ERRATA_A76AE_1931427``: This applies errata 1931427 workaround to Cortex-A76AE 304 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 305 fixed in r1p1. 306 307- ``ERRATA_A76AE_1931435``: This applies errata 1931435 workaround to Cortex-A76AE 308 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 309 fixed in r1p1. 310 311- ``ERRATA_A76AE_1969401``: This applies errata 1969401 workaround to Cortex-A76AE 312 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 313 fixed in r1p1. 314 315- ``ERRATA_A76AE_2371140``: This applies errata 2371140 workaround to Cortex-A76AE 316 CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is 317 still open. 318 319- ``ERRATA_A76AE_2753838``: This applies errata 2753838 workaround to Cortex-A76AE 320 CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is 321 still open. 322 323For Cortex-A77, the following errata build flags are defined : 324 325- ``ERRATA_A77_1508412``: This applies errata 1508412 workaround to Cortex-A77 326 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 327 328- ``ERRATA_A77_1925769``: This applies errata 1925769 workaround to Cortex-A77 329 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 330 331- ``ERRATA_A77_1946167``: This applies errata 1946167 workaround to Cortex-A77 332 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 333 334- ``ERRATA_A77_1791578``: This applies errata 1791578 workaround to Cortex-A77 335 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 336 337- ``ERRATA_A77_2356587``: This applies errata 2356587 workaround to Cortex-A77 338 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 339 340 - ``ERRATA_A77_1800714``: This applies errata 1800714 workaround to Cortex-A77 341 CPU. This needs to be enabled for revisions <= r1p1 of the CPU. 342 343 - ``ERRATA_A77_2743100``: This applies errata 2743100 workaround to Cortex-A77 344 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 345 346For Cortex-A78, the following errata build flags are defined : 347 348- ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78 349 CPU. This needs to be enabled only for revision r0p0 - r1p0 of the CPU. 350 351- ``ERRATA_A78_1941498``: This applies errata 1941498 workaround to Cortex-A78 352 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the CPU. 353 354- ``ERRATA_A78_1951500``: This applies errata 1951500 workaround to Cortex-A78 355 CPU. This needs to be enabled for revisions r1p0 and r1p1, r0p0 has the same 356 issue but there is no workaround for that revision. 357 358- ``ERRATA_A78_1821534``: This applies errata 1821534 workaround to Cortex-A78 359 CPU. This needs to be enabled for revisions r0p0 and r1p0. 360 361- ``ERRATA_A78_1952683``: This applies errata 1952683 workaround to Cortex-A78 362 CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0. 363 364- ``ERRATA_A78_2242635``: This applies errata 2242635 workaround to Cortex-A78 365 CPU. This needs to be enabled for revisions r1p0, r1p1, and r1p2. The issue 366 is present in r0p0 but there is no workaround. It is still open. 367 368- ``ERRATA_A78_2376745``: This applies errata 2376745 workaround to Cortex-A78 369 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 370 it is still open. 371 372- ``ERRATA_A78_2395406``: This applies errata 2395406 workaround to Cortex-A78 373 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 374 it is still open. 375 376- ``ERRATA_A78_2712571``: This applies erratum 2712571 workaround to Cortex-A78 377 CPU, this erratum affects system configurations that do not use an ARM 378 interconnect IP. This needs to be enabled for revisions r0p0, r1p0, r1p1 379 and r1p2 and it is still open. 380 381- ``ERRATA_A78_2742426``: This applies erratum 2742426 workaround to Cortex-A78 382 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and 383 it is still open. 384 385- ``ERRATA_A78_2772019``: This applies errata 2772019 workaround to Cortex-A78 386 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 387 it is still open. 388 389- ``ERRATA_A78_2779479``: This applies erratum 2779479 workaround to Cortex-A78 390 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and 391 it is still open. 392 393For Cortex-A78AE, the following errata build flags are defined : 394 395- ``ERRATA_A78_AE_1941500`` : This applies errata 1941500 workaround to 396 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. 397 This erratum is still open. 398 399- ``ERRATA_A78_AE_1951502`` : This applies errata 1951502 workaround to 400 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This 401 erratum is still open. 402 403- ``ERRATA_A78_AE_2376748`` : This applies errata 2376748 workaround to 404 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 405 This erratum is still open. 406 407- ``ERRATA_A78_AE_2395408`` : This applies errata 2395408 workaround to 408 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This 409 erratum is still open. 410 411- ``ERRATA_A78_AE_2712574`` : This applies erratum 2712574 workaround to 412 Cortex-A78AE CPU. This erratum affects system configurations that do not use 413 an ARM interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and 414 r0p2. This erratum is still open. 415 416For Cortex-A78C, the following errata build flags are defined : 417 418- ``ERRATA_A78C_1827430`` : This applies errata 1827430 workaround to 419 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is 420 fixed in r0p1. 421 422- ``ERRATA_A78C_1827440`` : This applies errata 1827440 workaround to 423 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is 424 fixed in r0p1. 425 426- ``ERRATA_A78C_2242638`` : This applies errata 2242638 workaround to 427 Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and 428 it is still open. 429 430- ``ERRATA_A78C_2376749`` : This applies errata 2376749 workaround to 431 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 432 erratum is still open. 433 434- ``ERRATA_A78C_2395411`` : This applies errata 2395411 workaround to 435 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 436 erratum is still open. 437 438- ``ERRATA_A78C_2683027`` : This applies errata 2683027 workaround to 439 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 440 erratum is still open. 441 442- ``ERRATA_A78C_2712575`` : This applies erratum 2712575 workaround to 443 Cortex-A78C CPU, this erratum affects system configurations that do not use 444 an ARM interconnect IP. This needs to be enabled for revisions r0p1 and r0p2 445 and is still open. 446 447- ``ERRATA_A78C_2743232`` : This applies erratum 2743232 workaround to 448 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. 449 This erratum is still open. 450 451- ``ERRATA_A78C_2772121`` : This applies errata 2772121 workaround to 452 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 453 This erratum is still open. 454 455- ``ERRATA_A78C_2779484`` : This applies errata 2779484 workaround to 456 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. 457 This erratum is still open. 458 459For Cortex-X1 CPU, the following errata build flags are defined: 460 461- ``ERRATA_X1_1821534`` : This applies errata 1821534 workaround to Cortex-X1 462 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 463 464- ``ERRATA_X1_1688305`` : This applies errata 1688305 workaround to Cortex-X1 465 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 466 467- ``ERRATA_X1_1827429`` : This applies errata 1827429 workaround to Cortex-X1 468 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 469 470For Neoverse N1, the following errata build flags are defined : 471 472- ``ERRATA_N1_1073348``: This applies errata 1073348 workaround to Neoverse-N1 473 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU. 474 475- ``ERRATA_N1_1130799``: This applies errata 1130799 workaround to Neoverse-N1 476 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 477 478- ``ERRATA_N1_1165347``: This applies errata 1165347 workaround to Neoverse-N1 479 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 480 481- ``ERRATA_N1_1207823``: This applies errata 1207823 workaround to Neoverse-N1 482 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 483 484- ``ERRATA_N1_1220197``: This applies errata 1220197 workaround to Neoverse-N1 485 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 486 487- ``ERRATA_N1_1257314``: This applies errata 1257314 workaround to Neoverse-N1 488 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 489 490- ``ERRATA_N1_1262606``: This applies errata 1262606 workaround to Neoverse-N1 491 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 492 493- ``ERRATA_N1_1262888``: This applies errata 1262888 workaround to Neoverse-N1 494 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 495 496- ``ERRATA_N1_1275112``: This applies errata 1275112 workaround to Neoverse-N1 497 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 498 499- ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1 500 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 501 502- ``ERRATA_N1_1542419``: This applies errata 1542419 workaround to Neoverse-N1 503 CPU. This needs to be enabled only for revisions r3p0 - r4p0 of the CPU. 504 505- ``ERRATA_N1_1868343``: This applies errata 1868343 workaround to Neoverse-N1 506 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 507 508- ``ERRATA_N1_1946160``: This applies errata 1946160 workaround to Neoverse-N1 509 CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for 510 revisions r0p0, r1p0, and r2p0 there is no workaround. 511 512- ``ERRATA_N1_2743102``: This applies errata 2743102 workaround to Neoverse-N1 513 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 514 still open. 515 516- ``ERRATA_N1_3324349``: This applies errata 3324349 workaround to Neoverse-N1 517 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 518 still open. 519 520For Neoverse V1, the following errata build flags are defined : 521 522- ``ERRATA_V1_1618635``: This applies errata 1618635 workaround to Neoverse-V1 523 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 524 r1p0. 525 526- ``ERRATA_V1_1774420``: This applies errata 1774420 workaround to Neoverse-V1 527 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 528 in r1p1. 529 530- ``ERRATA_V1_1791573``: This applies errata 1791573 workaround to Neoverse-V1 531 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 532 in r1p1. 533 534- ``ERRATA_V1_1852267``: This applies errata 1852267 workaround to Neoverse-V1 535 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 536 in r1p1. 537 538- ``ERRATA_V1_1925756``: This applies errata 1925756 workaround to Neoverse-V1 539 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 540 541- ``ERRATA_V1_1940577``: This applies errata 1940577 workaround to Neoverse-V1 542 CPU. This needs to be enabled only for revision r1p0 and r1p1 of the 543 CPU. 544 545- ``ERRATA_V1_1966096``: This applies errata 1966096 workaround to Neoverse-V1 546 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the 547 issue is present in r0p0 as well but there is no workaround for that 548 revision. It is still open. 549 550- ``ERRATA_V1_2139242``: This applies errata 2139242 workaround to Neoverse-V1 551 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the 552 CPU. It is still open. 553 554- ``ERRATA_V1_2216392``: This applies errata 2216392 workaround to Neoverse-V1 555 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the 556 issue is present in r0p0 as well but there is no workaround for that 557 revision. It is still open. 558 559- ``ERRATA_V1_2294912``: This applies errata 2294912 workaround to Neoverse-V1 560 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 and r1p2 of 561 the CPU. 562 563- ``ERRATA_V1_2348377``: This applies errata 2348377 workaroud to Neoverse-V1 564 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU. 565 It has been fixed in r1p2. 566 567- ``ERRATA_V1_2372203``: This applies errata 2372203 workaround to Neoverse-V1 568 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU. 569 It is still open. 570 571- ``ERRATA_V1_2701953``: This applies erratum 2701953 workaround to Neoverse-V1 572 CPU, this erratum affects system configurations that do not use an ARM 573 interconnect IP. This needs to be enabled for revisions r0p0, r1p0 and r1p1. 574 It has been fixed in r1p2. 575 576- ``ERRATA_V1_2743093``: This applies errata 2743093 workaround to Neoverse-V1 577 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 of the 578 CPU. It is still open. 579 580- ``ERRATA_V1_2743233``: This applies erratum 2743233 workaround to Neoverse-V1 581 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2 of the 582 CPU. It is still open. 583 584- ``ERRATA_V1_2779461``: This applies erratum 2779461 workaround to Neoverse-V1 585 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the 586 CPU. It is still open. 587 588For Neoverse V2, the following errata build flags are defined : 589 590- ``ERRATA_V2_2618597``: This applies errata 2618597 workaround to Neoverse-V2 591 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 592 r0p2. 593 594- ``ERRATA_V2_2662553``: This applies errata 2662553 workaround to Neoverse-V2 595 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 596 r0p2. 597 598- ``ERRATA_V2_2719103``: This applies errata 2719103 workaround to Neoverse-V2 599 CPU, this affects system configurations that do not use and ARM interconnect 600 IP. This needs to be enabled for revisions r0p0 and r0p1. It has been fixed 601 in r0p2. 602 603- ``ERRATA_V2_2719105``: This applies errata 2719105 workaround to Neoverse-V2 604 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 605 r0p2. 606 607- ``ERRATA_V2_2743011``: This applies errata 2743011 workaround to Neoverse-V2 608 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 609 r0p2. 610 611- ``ERRATA_V2_2779510``: This applies errata 2779510 workaround to Neoverse-V2 612 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 613 r0p2. 614 615- ``ERRATA_V2_2801372``: This applies errata 2801372 workaround to Neoverse-V2 616 CPU, this affects all configurations. This needs to be enabled for revisions 617 r0p0 and r0p1. It has been fixed in r0p2. 618 619- ``ERRATA_V2_3442699``: This applies errata 3442699 workaround to Neoverse-V2 620 CPU. This needs to be enabled for revision r0p0 - r0p2 and is still open. 621 622- ``ERRATA_V2_3701771``: This applies errata 3701771 workaround to Neoverse-V2 623 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 and is 624 still open. 625 626- ``ERRATA_V2_3841324``: This applies errata 3841324 workaround to Neoverse-V2 627 CPU. This needs to be enabled only for revisions r0p0 and r0p1 of 628 the CPU. It is fixed in r0p2. 629 630- ``ERRATA_V2_3888126``: This applies errata 3888126 workaround to Neoverse-V2 631 CPU. This needs to be enabled only for revisions r0p0, r0p1, r0p2 of 632 the CPU. It is still open. 633 634- ``ERRATA_V2_4302968``: This applies errata 4302968 workaround to Neoverse-V2 635 CPU. This needs to be enabled only for revisions r0p0, r0p1, r0p2 of 636 the CPU. It is still open. 637 638For Neoverse V3, the following errata build flags are defined : 639 640- ``ERRATA_V3_2970647``: This applies errata 2970647 workaround to Neoverse-V3 641 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 642 643- ``ERRATA_V3_3312417``: This applies errata 3312417 workaround to Neoverse-V3 644 CPU. This needs to be enabled for revisions r0p0 and r0p1 of the CPU and is 645 fixed in r0p2. 646 647- ``ERRATA_V3_3696307``: This applies errata 3696307 workaround to Neoverse-V3 648 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 649 r0p2. 650 651- ``ERRATA_V3_3701767``: This applies errata 3701767 workaround to Neoverse-V3 652 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the CPU and 653 is still open. 654 655- ``ERRATA_V3_3734562``: This applies errata 3734562 workaround to Neoverse-V3 656 CPU. This needs to be enabled for revisions r0p0 and r0p1 of the CPU and 657 is fixed in r0p2. 658 659- ``ERRATA_V3_3782181``: This applies errata 3782181 workaround to Neoverse-V3 660 CPU. This needs to be enabled for revision r0p1 of the CPU and is fixed in 661 r0p2. 662 663- ``ERRATA_V3_3864536``: This applies errata 3864536 workaround to Neoverse-V3 664 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU and 665 is still open. 666 667- ``ERRATA_V3_3878291``: This applies errata 3878291 workaround to Neoverse-V3 668 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU and 669 is still open. 670 671For Cortex-A710, the following errata build flags are defined : 672 673- ``ERRATA_A710_1901946``: This applies errata 1901946 workaround to 674 Cortex-A710 CPU. This needs to be enabled only for revision r1p0. It has 675 been fixed in r2p0. 676 677- ``ERRATA_A710_1916945``: This applies errata 1916945 workaround to 678 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 679 It has been fixed in r2p0. 680 681- ``ERRATA_A710_1917258``: This applies errata 1917258 workaround to 682 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 683 It has been fixed in r2p0. 684 685- ``ERRATA_A710_1927200``: This applies errata 1927200 workaround to 686 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 687 It has been fixed in r2p0. 688 689- ``ERRATA_A710_1987031``: This applies errata 1987031 workaround to 690 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 691 r2p0 of the CPU. It is still open. 692 693- ``ERRATA_A710_2081180``: This applies errata 2081180 workaround to 694 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 695 r2p0 of the CPU. It is still open. 696 697- ``ERRATA_A710_2055002``: This applies errata 2055002 workaround to 698 Cortex-A710 CPU. This needs to be enabled for revisions r1p0, r2p0 of the CPU 699 and is still open. 700 701- ``ERRATA_A710_2017096``: This applies errata 2017096 workaround to 702 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 703 of the CPU and is still open. 704 705- ``ERRATA_A710_2083908``: This applies errata 2083908 workaround to 706 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU and 707 is still open. 708 709- ``ERRATA_A710_2267065``: This applies errata 2267065 workaround to 710 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 711 of the CPU and is fixed in r2p1. 712 713- ``ERRATA_A710_2136059``: This applies errata 2136059 workaround to 714 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 715 of the CPU and is fixed in r2p1. 716 717- ``ERRATA_A710_2147715``: This applies errata 2147715 workaround to 718 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU 719 and is fixed in r2p1. 720 721- ``ERRATA_A710_2216384``: This applies errata 2216384 workaround to 722 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 723 of the CPU and is fixed in r2p1. 724 725- ``ERRATA_A710_2282622``: This applies errata 2282622 workaround to 726 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 727 r2p1 of the CPU and is still open. 728 729- ``ERRATA_A710_2291219``: This applies errata 2291219 workaround to 730 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 731 of the CPU and is fixed in r2p1. 732 733- ``ERRATA_A710_2008768``: This applies errata 2008768 workaround to 734 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 735 of the CPU and is fixed in r2p1. 736 737- ``ERRATA_A710_2371105``: This applies errata 2371105 workaround to 738 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 739 of the CPU and is fixed in r2p1. 740 741- ``ERRATA_A710_2701952``: This applies erratum 2701952 workaround to Cortex-A710 742 CPU, and applies to system configurations that do not use and ARM 743 interconnect IP. This needs to be enabled for r0p0, r1p0, r2p0 and r2p1 and 744 is still open. 745 746- ``ERRATA_A710_2742423``: This applies errata 2742423 workaround to 747 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 748 r2p1 of the CPU and is still open. 749 750- ``ERRATA_A710_2768515``: This applies errata 2768515 workaround to 751 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 752 r2p1 of the CPU and is still open. 753 754- ``ERRATA_A710_2778471``: This applies errata 2778471 workaround to Cortex-A710 755 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 756 CPU and is still open. 757 758- ``ERRATA_A710_3324338``: This applies errata 3324338 workaround to 759 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 760 r2p1 of the CPU and is still open. 761 762- ``ERRATA_A710_3701772``: This applies errata 3701772 workaround to Cortex-A710 763 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 of the 764 CPU and is still open. 765 766For Neoverse N2, the following errata build flags are defined : 767 768- ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2 769 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 770 771- ``ERRATA_N2_2009478``: This applies errata 2009478 workaround to Neoverse-N2 772 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 773 774- ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2 775 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 776 777- ``ERRATA_N2_2025414``: This applies errata 2025414 workaround to Neoverse-N2 778 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 779 780- ``ERRATA_N2_2138953``: This applies errata 2138953 workaround to Neoverse-N2 781 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3 of the 782 Neoverse N2 cpu and is still open. 783 784- ``ERRATA_N2_2138956``: This applies errata 2138956 workaround to Neoverse-N2 785 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 786 787- ``ERRATA_N2_2138958``: This applies errata 2138958 workaround to Neoverse-N2 788 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 789 790- ``ERRATA_N2_2189731``: This applies errata 2189731 workaround to Neoverse-N2 791 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 792 793- ``ERRATA_N2_2242400``: This applies errata 2242400 workaround to Neoverse-N2 794 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 795 796- ``ERRATA_N2_2242415``: This applies errata 2242415 workaround to Neoverse-N2 797 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 798 799- ``ERRATA_N2_2280757``: This applies errata 2280757 workaround to Neoverse-N2 800 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 801 802- ``ERRATA_N2_2326639``: This applies errata 2326639 workaround to Neoverse-N2 803 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 804 r0p1. 805 806- ``ERRATA_N2_2340933``: This applies errata 2340933 workaround to Neoverse-N2 807 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 808 r0p1. 809 810- ``ERRATA_N2_2346952``: This applies errata 2346952 workaround to Neoverse-N2 811 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU, 812 it is fixed in r0p3. 813 814- ``ERRATA_N2_2376738``: This applies errata 2376738 workaround to Neoverse-N2 815 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open. 816 817- ``ERRATA_N2_2388450``: This applies errata 2388450 workaround to Neoverse-N2 818 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 819 r0p1. 820 821- ``ERRATA_N2_2743014``: This applies errata 2743014 workaround to Neoverse-N2 822 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 823 in r0p3. 824 825- ``ERRATA_N2_2743089``: This applies errata 2743089 workaround to Neoverse-N2 826 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 827 in r0p3. 828 829- ``ERRATA_N2_2728475``: This applies erratum 2728475 workaround to Neoverse-N2 830 CPU, this erratum affects system configurations that do not use and ARM 831 interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 832 It is fixed in r0p3. 833 834- ``ERRATA_N2_2779511``: This applies errata 2779511 workaround to Neoverse-N2 835 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 836 in r0p3. 837 838- ``ERRATA_N2_3324339``: This applies errata 3324339 workaround to Neoverse-N2 839 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 840 still open. 841 842- ``ERRATA_N2_3701773``: This applies errata 3701773 workaround to Neoverse-N2 843 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 844 still open. 845 846- ``ERRATA_N2_3888123``: This applies errata 3888123 workaround to Neoverse-N2 847 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 848 still open. 849 850- ``ERRATA_N2_4302970``: This applies errata 4302970 workaround to Neoverse-N2 851 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 852 still open. 853 854For Neoverse N3, the following errata build flags are defined : 855 856- ``ERRATA_N3_3456111``: This applies errata 3456111 workaround to Neoverse-N3 857 CPU. This needs to be enabled for revisions r0p0 and r0p1 and is still open. 858 859- ``ERRATA_N3_3699563``: This applies errata 3699563 workaround to Neoverse-N3 860 CPU. This needs to be enabled for revisions r0p0 and is still open. 861 862For Cortex-X2, the following errata build flags are defined : 863 864- ``ERRATA_X2_1901946``: This applies errata 1901946 workaround to Cortex-X2 865 CPU. This needs to be enabled only for r1p0, it is fixed in r2p0. 866 867- ``ERRATA_X2_1916945``: This applies errata 1916945 workaround to Cortex-X2 868 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 869 is fixed in r2p0. 870 871- ``ERRATA_X2_1917258``: This applies errata 1917258 workaround to Cortex-X2 872 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 873 is fixed in r2p0. 874 875- ``ERRATA_X2_1927200``: This applies errata 1927200 workaround to Cortex-X2 876 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 877 is fixed in r2p0. 878 879- ``ERRATA_X2_1934260``: This applies errata 1934260 workaround to Cortex-X2 880 CPU. This needs to be enabled only for revision r1p0 of the CPU, it is fixed 881 in r2p0. 882 883- ``ERRATA_X2_2002765``: This applies errata 2002765 workaround to Cortex-X2 884 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 885 CPU, it is fixed in r2p1. 886 887- ``ERRATA_X2_2017096``: This applies errata 2017096 workaround to Cortex-X2 888 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 889 CPU, it is fixed in r2p1. 890 891- ``ERRATA_X2_2081180``: This applies errata 2081180 workaround to Cortex-X2 892 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 893 CPU, it is fixed in r2p1. 894 895- ``ERRATA_X2_2083908``: This applies errata 2083908 workaround to Cortex-X2 896 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed 897 in r2p1. 898 899- ``ERRATA_X2_2136059``: This applies errata 2136059 workaround to Cortex-X2 900 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 901 CPU, it is fixed in r2p1. 902 903- ``ERRATA_X2_2147715``: This applies errata 2147715 workaround to Cortex-X2 904 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed 905 in r2p1. 906 907- ``ERRATA_X2_2216384``: This applies errata 2216384 workaround to Cortex-X2 908 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 909 CPU, it is fixed in r2p1. 910 911- ``ERRATA_X2_2267065``: This applies errata 2267065 workaround to Cortex-X2 912 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 913 CPU, it is fixed in r2p1. 914 915- ``ERRATA_X2_2282622``: This applies errata 2282622 workaround to Cortex-X2 916 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 917 CPU and is still open. 918 919- ``ERRATA_X2_2291219``: This applies errata 2291219 workaround to Cortex-X2 920 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 921 CPU, it is fixed in r2p1. 922 923- ``ERRATA_X2_2371105``: This applies errata 2371105 workaround to Cortex-X2 924 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 925 CPU, it is fixed in r2p1. 926 927- ``ERRATA_X2_2701952``: This applies errata 2701952 workaround to Cortex-X2 928 CPU and affects system configurations that do not use an Arm interconnect IP. 929 This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 and is 930 still open. 931 932- ``ERRATA_X2_2742423``: This applies errata 2742423 workaround to Cortex-X2 933 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 934 CPU and is still open. 935 936- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to Cortex-X2 937 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 938 CPU and is still open. 939 940- ``ERRATA_X2_2778471``: This applies errata 2778471 workaround to Cortex-X2 941 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 942 CPU and is still open. 943 944- ``ERRATA_X2_3324338``: This applies errata 3324338 workaround to Cortex-X2 945 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 946 CPU and is still open. 947 948- ``ERRATA_X2_3701772``: This applies errata 3701772 workaround to Cortex-X2 949 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 950 CPU and is still open. 951 952- ``ERRATA_X2_3888122``: This applies errata 3888122 workaround to Cortex-X2 953 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 954 CPU and is still open. 955 956- ``ERRATA_X2_4302969``: This applies errata 4302969 workaround to Cortex-X2 957 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 958 CPU and is still open. 959 960For Cortex-X3, the following errata build flags are defined : 961 962- ``ERRATA_X3_2266875``: This applies errata 2266875 workaround to the Cortex-X3 963 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 964 is fixed in r1p1. 965 966- ``ERRATA_X3_2302506``: This applies errata 2302506 workaround to the Cortex-X3 967 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1, it is 968 fixed in r1p2. 969 970- ``ERRATA_X3_2313909``: This applies errata 2313909 workaround to 971 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 972 of the CPU, it is fixed in r1p1. 973 974- ``ERRATA_X3_2372204``: This applies errata 2372204 workaround to 975 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 976 of the CPU, it is fixed in r1p1. 977 978- ``ERRATA_X3_2615812``: This applies errata 2615812 workaround to Cortex-X3 979 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the 980 CPU, it is fixed in r1p2. 981 982- ``ERRATA_X3_2641945``: This applies errata 2641945 workaround to Cortex-X3 983 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU. 984 It is fixed in r1p1. 985 986- ``ERRATA_X3_2701951``: This applies erratum 2701951 workaround to Cortex-X3 987 CPU and affects system configurations that do not use an ARM interconnect 988 IP. This needs to be applied to revisions r0p0, r1p0 and r1p1. It is fixed 989 in r1p2. 990 991- ``ERRATA_X3_2742421``: This applies errata 2742421 workaround to 992 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 993 r1p1. It is fixed in r1p2. 994 995- ``ERRATA_X3_2743088``: This applies errata 2743088 workaround to Cortex-X3 996 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1. It is 997 fixed in r1p2. 998 999- ``ERRATA_X3_2779509``: This applies errata 2779509 workaround to Cortex-X3 1000 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the 1001 CPU. It is fixed in r1p2. 1002 1003- ``ERRATA_X3_3213672``: This applies errata 3213672 workaround to Cortex-X3 1004 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1005 of the CPU. It is still open. 1006 1007- ``ERRATA_X3_3692984``: This applies errata 3692984 workaround to Cortex-X3 1008 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1009 of the CPU. It is still open. 1010 1011- ``ERRATA_X3_3701769``: This applies errata 3701769 workaround to Cortex-X3 1012 CPU. This needs to be enabled only for revisions r0p0, r1p0, r1p1 and r1p2 1013 of the CPU and it is still open. 1014 1015- ``ERRATA_X3_3827463``: This applies errata 3827463 workaround to Cortex-X3 1016 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of 1017 the CPU. It is fixed in r1p2. 1018 1019- ``ERRATA_X3_3888125``: This applies errata 3888125 workaround to Cortex-X3 1020 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1021 of the CPU. It is still open. 1022 1023- ``ERRATA_X3_4302966``: This applies errata 4302966 workaround to Cortex-X3 1024 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1025 of the CPU. It is still open. 1026 1027For Cortex-X4, the following errata build flags are defined : 1028 1029- ``ERRATA_X4_2701112``: This applies erratum 2701112 workaround to Cortex-X4 1030 CPU and affects system configurations that do not use an Arm interconnect IP. 1031 This needs to be enabled for revisions r0p0 and is fixed in r0p1. 1032 The workaround for this erratum is not implemented in EL3, but the flag can 1033 be enabled/disabled at the platform level. The flag is used when the errata ABI 1034 feature is enabled and can assist the Kernel in the process of 1035 mitigation of the erratum. 1036 1037- ``ERRATA_X4_2726228``: This applies erratum 2726228 workaround to Cortex-X4 1038 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 1039 r0p2. 1040 1041- ``ERRATA_X4_2740089``: This applies errata 2740089 workaround to Cortex-X4 1042 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed 1043 in r0p2. 1044 1045- ``ERRATA_X4_2763018``: This applies errata 2763018 workaround to Cortex-X4 1046 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1047 1048- ``ERRATA_X4_2816013``: This applies errata 2816013 workaround to Cortex-X4 1049 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1050 1051- ``ERRATA_X4_2897503``: This applies errata 2897503 workaround to Cortex-X4 1052 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1053 1054- ``ERRATA_X4_2923985``: This applies errata 2923985 workaround to Cortex-X4 1055 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1056 1057- ``ERRATA_X4_2957258``: This applies errata 2957258 workaround to Cortex-X4 1058 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1059 1060- ``ERRATA_X4_3076789``: This applies errata 3076789 workaround to Cortex-X4 1061 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1062 1063- ``ERRATA_X4_3133195``: This applies errata 3133195 workaround to Cortex-X4 1064 CPU. This needs to be enabled for revision r0p2. It is fixed in r0p3. 1065 1066- ``ERRATA_X4_3701758``: This applies errata 3701758 workaround to Cortex-X4 1067 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3. 1068 It is still open. 1069 1070- ``ERRATA_X4_3887999``: This applies errata 3887999 workaround to Cortex-X4 1071 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2 and r0p3. 1072 It is still open. 1073 1074For Cortex-X925, the following errata build flags are defined : 1075 1076- ``ERRATA_X925_2921199``: This applies errata 2921199 workaround to Cortex-X925 1077 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1078 1079- ``ERRATA_X925_2922378``: This applies errata 2922378 workaround to Cortex-X925 1080 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1081 1082- ``ERRATA_X925_2933290``: This applies errata 2933290 workaround to Cortex-X925 1083 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1084 1085- ``ERRATA_X925_2963999``: This applies errata 2963999 workaround to Cortex-X925 1086 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1087 1088- ``ERRATA_X925_3324334``: This applies errata 3324334 workaround to Cortex-X925 1089 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1090 1091- ``ERRATA_X925_3692980``: This applies errata 3692980 workaround to Cortex-X925 1092 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1093 1094- ``ERRATA_X925_3730893``: This applies errata 3730893 workaround to Cortex-X925 1095 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1096 1097- ``ERRATA_X925_3865185``: This applies errata 3865185 workaround to Cortex-X925 1098 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1099 1100- ``ERRATA_X925_3701747``: This applies errata 3701747 workaround to Cortex-X925 1101 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is still open. 1102 1103For Cortex-A510, the following errata build flags are defined : 1104 1105- ``ERRATA_A510_2008766``: This applies errata 2008766 workaround to 1106 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1107 r0p3, r1p0, r1p1, r1p2 and r1p3. It is still open. 1108 1109- ``ERRATA_A510_2288014``: This applies errata 2288014 workaround to 1110 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1, 1111 r0p2, r0p3 and r1p0, it is fixed in r1p1. 1112 1113- ``ERRATA_A510_2042739``: This applies errata 2042739 workaround to 1114 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1 and 1115 r0p2, it is fixed in r0p3. 1116 1117- ``ERRATA_A510_2041909``: This applies errata 2041909 workaround to 1118 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is fixed 1119 in r0p3. The issue is also present in r0p0 and r0p1 but there is no 1120 workaround for those revisions. 1121 1122- ``ERRATA_A510_2080326``: This applies errata 2080326 workaround to 1123 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is 1124 fixed in r0p3. This issue is also present in r0p0 and r0p1 but there is no 1125 workaround for those revisions. 1126 1127- ``ERRATA_A510_2169012``: This applies errata 2169012 workaround to 1128 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1, 1129 r0p2, r0p3 and r1p0, it is fixed in r1p1. 1130 1131- ``ERRATA_A510_2218134``: This applies errata 2218134 workaround to 1132 Cortex-A510 CPU. This needs to be enabled only for revision r1p0 and is fixed 1133 in r1p1. 1134 1135- ``ERRATA_A510_2250311``: This applies errata 2250311 workaround to 1136 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1137 r0p3 and r1p0, it is fixed in r1p1. This workaround disables MPMM even if 1138 ENABLE_MPMM=1. 1139 1140- ``ERRATA_A510_2218950``: This applies errata 2218950 workaround to 1141 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1142 r0p3 and r1p0, it is fixed in r1p1. 1143 1144- ``ERRATA_A510_2172148``: This applies errata 2172148 workaround to 1145 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1146 r0p3 and r1p0, it is fixed in r1p1. 1147 1148- ``ERRATA_A510_2347730``: This applies errata 2347730 workaround to 1149 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1150 r0p3, r1p0 and r1p1. It is fixed in r1p2. 1151 1152- ``ERRATA_A510_2371937``: This applies errata 2371937 workaround to 1153 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2, 1154 r0p3, r1p0, r1p1, and is fixed in r1p2. 1155 1156- ``ERRATA_A510_2420992``: This applies errata 2420992 workaround to 1157 Cortex-A510 CPU. This needs to applied for revisions r1p0 and r1p1, and is 1158 fixed in r1p2. 1159 1160- ``ERRATA_A510_2666669``: This applies errata 2666669 workaround to 1161 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2, 1162 r0p3, r1p0, r1p1. It is fixed in r1p2. 1163 1164- ``ERRATA_A510_2684597``: This applies erratum 2684597 workaround to 1165 Cortex-A510 CPU. This needs to be applied to revision r0p0, r0p1, r0p2, 1166 r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. 1167 1168- ``ERRATA_A510_2971420``: This applies erratum 2971420 workaround to 1169 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1170 r1p0, r1p1, r1p2 and r1p3 and is still open. 1171 1172- ``ERRATA_A510_3672349``: This applies erratum 3672349 workaround to 1173 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1174 r1p0, r1p1, r1p2 and r1p3 and is still open. 1175 1176- ``ERRATA_A510_3704847``: This applies erratum 3704847 workaround to 1177 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1178 r1p0, r1p1, r1p2 and r1p3 and is still open. 1179 1180For Cortex-A520, the following errata build flags are defined : 1181 1182- ``ERRATA_A520_2630792``: This applies errata 2630792 workaround to 1183 Cortex-A520 CPU. This needs to applied for revisions r0p0, r0p1 of the 1184 CPU and is still open. 1185 1186- ``ERRATA_A520_2858100``: This applies errata 2858100 workaround to 1187 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1188 It is still open. 1189 1190- ``ERRATA_A520_2938996``: This applies errata 2938996 workaround to 1191 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1192 It is fixed in r0p2. 1193 1194For Cortex-A715, the following errata build flags are defined : 1195 1196- ``ERRATA_A715_2331818``: This applies errata 2331818 workaround to 1197 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. 1198 It is fixed in r1p1. 1199 1200- ``ERRATA_A715_2344187``: This applies errata 2344187 workaround to 1201 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is 1202 fixed in r1p1. 1203 1204- ``ERRATA_A715_2376701``: This applies errata 2376701 workaround to 1205 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is 1206 fixed in r1p1. 1207 1208- ``ERRATA_A715_2409570``: This applies errata 2409570 workaround to 1209 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1210 It is fixed in r1p1. This errata also applies to r0p0 but that revision has a 1211 different workaround, and since r0p0 is not used in production hardware it is 1212 not implemented. 1213 1214- ``ERRATA_A715_2413290``: This applies errata 2413290 workaround to 1215 Cortex-A715 CPU. This needs to be enabled only for revision r1p0 and 1216 when SPE(Statistical profiling extension)=True. The errata is fixed 1217 in r1p1. 1218 1219- ``ERRATA_A715_2420947``: This applies errata 2420947 workaround to 1220 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1221 It is fixed in r1p1. 1222 1223- ``ERRATA_A715_2429384``: This applies errata 2429384 workaround to 1224 Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no 1225 workaround for revision r0p0. It is fixed in r1p1. 1226 1227- ``ERRATA_A715_2561034``: This applies errata 2561034 workaround to 1228 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1229 It is fixed in r1p1. 1230 1231- ``ERRATA_A715_2728106``: This applies errata 2728106 workaround to 1232 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0 1233 and r1p1. It is fixed in r1p2. 1234 1235- ``ERRATA_A715_2804830``: This applies errata 2804830 workaround to 1236 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1237 r1p1 and r1p2. It is fixed in r1p3. 1238 1239- ``ERRATA_A715_3456084``: This applies errata 3456084 workaround to 1240 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1241 r1p1, r1p2 and r1p3. It is still open. 1242 1243- ``ERRATA_A715_3699560``: This applies errata 3699560 workaround to 1244 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1245 r1p2 and r1p3. It is still open. 1246 1247- ``ERRATA_A715_3711916``: This applies errata 3711916 workaround to 1248 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1249 r1p1, r1p2 and r1p3. It is still open. 1250 1251For Cortex-A720, the following errata build flags are defined : 1252 1253- ``ERRATA_A720_2729604``: This applies errata 2729604 workaround to 1254 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1255 It is fixed in r0p2. 1256 1257- ``ERRATA_A720_2792132``: This applies errata 2792132 workaround to 1258 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1259 It is fixed in r0p2. 1260 1261- ``ERRATA_A720_2844092``: This applies errata 2844092 workaround to 1262 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1263 It is fixed in r0p2. 1264 1265- ``ERRATA_A720_2926083``: This applies errata 2926083 workaround to 1266 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1267 It is fixed in r0p2. 1268 1269- ``ERRATA_A720_2940794``: This applies errata 2940794 workaround to 1270 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1271 It is fixed in r0p2. 1272 1273- ``ERRATA_A720_3456091``: This applies errata 3456091 workaround to 1274 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1275 and r0p2. It is still open. 1276 1277- ``ERRATA_A720_3699561``: This applies errata 3699561 workaround to 1278 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1279 and r0p2. It is still open. 1280 1281- ``ERRATA_A720_3711910``: This applies errata 3711910 workaround to 1282 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1283 and r0p2. It is still open. 1284 1285For Cortex-A720_AE, the following errata build flags are defined : 1286 1287- ``ERRATA_A720_AE_3456103``: This applies errata 3456103 workaround to 1288 Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0 and r0p1. It 1289 is still open. 1290 1291- ``ERRATA_A720_AE_3699562``: This applies errata 3699562 workaround 1292 to Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0. 1293 It is still open. 1294 1295For Cortex-A725, the following errata build flags are defined : 1296 1297- ``ERRATA_A725_2874943``: This applies errata 2874943 workaround to 1298 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 when 1299 FEAT_SPE is enabled. It is fixed in r0p1. 1300 1301- ``ERRATA_A725_2936490``: This applies errata 2936490 workaround to 1302 Cortex-A725 CPU. This needs to be enabled for revisions r0p0. 1303 It is fixed in r0p1. 1304 1305- ``ERRATA_A725_3456106``: This applies errata 3456106 workaround to 1306 Cortex-A725 CPU. This needs to be enabled for revisions r0p0, r0p1 1307 and r0p2. It is still open. 1308 1309- ``ERRATA_A725_3699564``: This applies errata 3699564 workaround to 1310 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1311 It is fixed in r0p2. 1312 1313- ``ERRATA_A725_3711914``: This applies errata 3711914 workaround to 1314 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1315 It is fixed in r0p2. 1316 1317For C1-Ultra, the following errata build flags are defined : 1318 1319- ``ERRATA_C1ULTRA_3324333``: This applies erratum 3324333 workaround to 1320 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is fixed 1321 in r1p0. 1322 1323- ``ERRATA_C1ULTRA_3502731``: This applies erratum 3502731 workaround to 1324 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is 1325 fixed in r1p0. 1326 1327- ``ERRATA_C1ULTRA_3658374``: This applies erratum 3658374 workaround to 1328 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1329 is still open. 1330 1331- ``ERRATA_C1ULTRA_3684152``: This applies erratum 3684152 workaround to 1332 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is 1333 fixed in r1p0. 1334 1335- ``ERRATA_C1ULTRA_3705939``: This applies erratum 3705939 workaround to 1336 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1337 is still open. 1338 1339- ``ERRATA_C1ULTRA_3815514``: This applies erratum 3815514 workaround to 1340 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1341 is still open. 1342 1343- ``ERRATA_C1ULTRA_3865171``: This applies erratum 3865171 workaround to 1344 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1345 is still open. 1346 1347- ``ERRATA_C1ULTRA_3926381``: This applies erratum 3926381 workaround to 1348 C1-Ultra CPU. This needs to be enabled for revision r1p0 and is still 1349 open. 1350 1351- ``ERRATA_C1ULTRA_4102704``: This applies erratum 4102704 workaround to 1352 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1353 is still open. 1354 1355For C1-Premium, the following errata build flags are defined : 1356 1357- ``ERRATA_C1PREMIUM_3324333``: This applies errata 3324333 workaround to 1358 C1-Premium CPU. This needs to be enabled for revision r0p0, and is 1359 fixed in r1p0. 1360 1361- ``ERRATA_C1PREMIUM_3502731``: This applies errata 3502731 workaround to 1362 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1363 in r1p0. 1364 1365- ``ERRATA_C1PREMIUM_3684152``: This applies errata 3684152 workaround to 1366 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1367 in r1p0. 1368 1369- ``ERRATA_C1PREMIUM_3705939``: This applies errata 3705939 workaround to 1370 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1371 is still open. 1372 1373- ``ERRATA_C1PREMIUM_3815514``: This applies errata 3815514 workaround to 1374 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1375 is still open. 1376 1377- ``ERRATA_C1PREMIUM_3865171``: This applies errata 3865171 workaround to 1378 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1379 is still open. 1380 1381- ``ERRATA_C1PREMIUM_3926381``: This applies errata 3926381 workaround to 1382 C1-Premium CPU. This needs to be enabled for revision r1p0 and is 1383 still open. 1384 1385- ``ERRATA_C1PREMIUM_4102704``: This applies errata 4102704 workaround to 1386 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1387 is still open. 1388 1389For C1-Pro, the following errata build flags are defined : 1390 1391- ``ERRATA_C1PRO_3619847``: This applies errata 3619847 workaround to C1-Pro 1392 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1393 1394- ``ERRATA_C1PRO_3338470``: This applies errata 3338470 workaround to C1-Pro 1395 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1396 1397- ``ERRATA_C1PRO_3362007``: This applies errata 3362007 workaround to C1-Pro 1398 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1399 1400- ``ERRATA_C1PRO_3686597``: This applies errata 3686597 workaround to C1-Pro 1401 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1402 is fixed in r1p1. 1403 1404- ``ERRATA_C1PRO_3694158``: This applies errata 3694158 workaround to C1-Pro 1405 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 and is 1406 fixed in r1p2. 1407 1408- ``ERRATA_C1PRO_3706576``: This applies errata 3706576 workaround to C1-Pro 1409 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1410 is fixed in r1p1. 1411 1412- ``ERRATA_C1PRO_3300099``: This applies errata 3300099 workaround to C1-Pro 1413 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1414 is fixed in r1p1. 1415 1416For C1-Nano, the following errata build flags are defined : 1417 1418- ``ERRATA_C1NANO_3392149``: This applies errata 3392149 workaround to 1419 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1420 in r0p1. 1421 1422- ``ERRATA_C1NANO_3419531``: This applies errata 3419531 workaround to 1423 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1424 in r0p1. 1425 1426- ``ERRATA_C1NANO_3437202``: This applies errata 3437202 workaround to 1427 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1428 in r0p1. 1429 1430- ``ERRATA_C1NANO_3516455``: This applies errata 3516455 workaround to 1431 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1432 in r0p1. 1433 1434- ``ERRATA_C1NANO_3616450``: This applies errata 3616450 workaround to 1435 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1436 in r0p1. 1437 1438- ``ERRATA_C1NANO_3630925``: This applies errata 3630925 workaround to 1439 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1440 in r0p1. 1441 1442- ``ERRATA_C1NANO_3754876``: This applies errata 3754876 workaround to 1443 C1-Nano CPU. This needs to be enabled for revisions r0p0 and r0p1, and 1444 is fixed in r0p2. 1445 1446DSU Errata Workarounds 1447---------------------- 1448 1449Similar to CPU errata, TF-A also implements workarounds for DSU (DynamIQ 1450Shared Unit) errata. The DSU errata details can be found in the respective Arm 1451documentation: 1452 1453- `Arm DSU Software Developers Errata Notice`_. 1454 1455Each erratum is identified by an ``ID``, as defined in the DSU errata notice 1456document. Thus, the build flags which enable/disable the errata workarounds 1457have the format ``ERRATA_DSU_<ID>``. The implementation and application logic 1458of DSU errata workarounds are similar to `CPU errata workarounds`_. 1459 1460For DSU errata, the following build flags are defined: 1461 1462- ``ERRATA_DSU_798953``: This applies errata 798953 workaround for the 1463 affected DSU configurations. This errata applies only for those DSUs that 1464 revision is r0p0 (on r0p1 it is fixed). However, please note that this 1465 workaround results in increased DSU power consumption on idle. 1466 1467- ``ERRATA_DSU_936184``: This applies errata 936184 workaround for the 1468 affected DSU configurations. This errata applies only for those DSUs that 1469 contain the ACP interface **and** the DSU revision is older than r2p0 (on 1470 r2p0 it is fixed). However, please note that this workaround results in 1471 increased DSU power consumption on idle. 1472 1473- ``ERRATA_DSU_2313941``: This applies errata 2313941 workaround for the 1474 affected DSU configurations. This errata applies for those DSUs with 1475 revisions r0p0, r1p0, r2p0, r2p1, r3p0, r3p1 and is still open. However, 1476 please note that this workaround results in increased DSU power consumption 1477 on idle. 1478 1479- ``ERRATA_DSU_2900952``: This applies errata 2900952 workaround for the 1480 affected DSU-120 configurations. This erratum applies to some r2p0 1481 implementations and is fixed in r2p1. The affected r2p0 implementations 1482 are determined by reading the IMP_CLUSTERREVIDR_EL1[1] register bit 1483 and making sure it's clear. 1484 1485CPU Specific optimizations 1486-------------------------- 1487 1488This section describes some of the optimizations allowed by the CPU micro 1489architecture that can be enabled by the platform as desired. 1490 1491- ``SKIP_A57_L1_FLUSH_PWR_DWN``: This flag enables an optimization in the 1492 Cortex-A57 cluster power down sequence by not flushing the Level 1 data 1493 cache. The L1 data cache and the L2 unified cache are inclusive. A flush 1494 of the L2 by set/way flushes any dirty lines from the L1 as well. This 1495 is a known safe deviation from the Cortex-A57 TRM defined power down 1496 sequence. Each Cortex-A57 based platform must make its own decision on 1497 whether to use the optimization. 1498 1499- ``A53_DISABLE_NON_TEMPORAL_HINT``: This flag disables the cache non-temporal 1500 hint. The LDNP/STNP instructions as implemented on Cortex-A53 do not behave 1501 in a way most programmers expect, and will most probably result in a 1502 significant speed degradation to any code that employs them. The Armv8-A 1503 architecture (see Arm DDI 0487A.h, section D3.4.3) allows cores to ignore 1504 the non-temporal hint and treat LDNP/STNP as LDP/STP instead. Enabling this 1505 flag enforces this behaviour. This needs to be enabled only for revisions 1506 <= r0p3 of the CPU and is enabled by default. 1507 1508- ``A57_DISABLE_NON_TEMPORAL_HINT``: This flag has the same behaviour as 1509 ``A53_DISABLE_NON_TEMPORAL_HINT`` but for Cortex-A57. This needs to be 1510 enabled only for revisions <= r1p2 of the CPU and is enabled by default, 1511 as recommended in section "4.7 Non-Temporal Loads/Stores" of the 1512 `Cortex-A57 Software Optimization Guide`_. 1513 1514- ''A57_ENABLE_NON_CACHEABLE_LOAD_FWD'': This flag enables non-cacheable 1515 streaming enhancement feature for Cortex-A57 CPUs. Platforms can set 1516 this bit only if their memory system meets the requirement that cache 1517 line fill requests from the Cortex-A57 processor are atomic. Each 1518 Cortex-A57 based platform must make its own decision on whether to use 1519 the optimization. This flag is disabled by default. 1520 1521- ``NEOVERSE_Nx_EXTERNAL_LLC``: This flag indicates that an external last 1522 level cache(LLC) is present in the system, and that the DataSource field 1523 on the master CHI interface indicates when data is returned from the LLC. 1524 This is used to control how the LL_CACHE* PMU events count. 1525 Default value is 0 (Disabled). 1526 1527- ``NEOVERSE_Vx_EXTERNAL_LLC``: This flag has the same behaviour as 1528 ``NEOVERSE_Nx_EXTERNAL_LLC`` but for Neoverse-V2. This is disabled 1529 by default. Default value is 0 (Disabled). 1530 1531- ``NEOVERSE_N2_PREFETCHER_DISABLE``: This flag disables the region prefetcher 1532 on the Neoverse N2 core. This is used during performance analysis to get clean 1533 and repeatable measurements of the cache by preventing speculative data fetches 1534 from interfering with benchmark results. 1535 Default value is 0 (Disabled). 1536 1537GIC Errata Workarounds 1538---------------------- 1539- ``GIC600_ERRATA_WA_2384374``: This flag applies part 2 of errata 2384374 1540 workaround for the affected GIC600 and GIC600-AE implementations. It applies 1541 to implementations of GIC600 and GIC600-AE with revisions less than or equal 1542 to r1p6 and r0p2 respectively. If the platform sets GICV3_SUPPORT_GIC600, 1543 then this flag is enabled; otherwise, it is 0 (Disabled). 1544 1545-------------- 1546 1547*Copyright (c) 2014-2026, Arm Limited and Contributors. All rights reserved.* 1548 1549.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715 1550.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639 1551.. _CVE-2022-23960: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2022-23960 1552.. _CVE-2024-5660: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-5660 1553.. _CVE-2024-7881: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-7881 1554.. _Cortex-A72 MPCore Software Developers Errata Notice: https://developer.arm.com/documentation/epm012079/latest 1555.. _Cortex-A57 Software Optimization Guide: https://developer.arm.com/documentation/uan0015 1556.. _Arm DSU Software Developers Errata Notice: https://developer.arm.com/documentation/SDEN854652 1557