1Arm CPU Specific Build Macros 2============================= 3 4This document describes the various build options present in the CPU specific 5operations framework to enable errata workarounds and to enable optimizations 6for a specific CPU on a platform. 7 8Security Vulnerability Workarounds 9---------------------------------- 10 11TF-A exports a series of build flags which control which security 12vulnerability workarounds should be applied at runtime. 13 14- ``WORKAROUND_CVE_2017_5715``: Enables the security workaround for 15 `CVE-2017-5715`_. This flag can be set to 0 by the platform if none 16 of the PEs in the system need the workaround. Setting this flag to 0 provides 17 no performance benefit for non-affected platforms, it just helps to comply 18 with the recommendation in the spec regarding workaround discovery. 19 Defaults to 1. 20 21- ``WORKAROUND_CVE_2018_3639``: Enables the security workaround for 22 `CVE-2018-3639`_. Defaults to 1. The TF-A project recommends to keep 23 the default value of 1 even on platforms that are unaffected by 24 CVE-2018-3639, in order to comply with the recommendation in the spec 25 regarding workaround discovery. 26 27- ``DYNAMIC_WORKAROUND_CVE_2018_3639``: Enables dynamic mitigation for 28 `CVE-2018-3639`_. This build option should be set to 1 if the target 29 platform contains at least 1 CPU that requires dynamic mitigation. 30 Defaults to 0. 31 32- ``WORKAROUND_CVE_2022_23960``: Enables mitigation for `CVE-2022-23960`_. 33 This build option should be set to 1 if the target platform contains at 34 least 1 CPU that requires this mitigation. Defaults to 1. 35 36- ``WORKAROUND_CVE_2024_5660``: Enables mitigation for `CVE-2024-5660`. 37 The fix is to disable hardware page aggregation by setting CPUECTLR_EL1[46] 38 in EL3 FW. This build option should be set to 1 if the target platform contains 39 at least 1 CPU that requires this mitigation. Defaults to 1. 40 41- ``WORKAROUND_CVE_2024_7881``: Enables mitigation for `CVE-2024-7881`. 42 This build option should be set to 1 if the target platform contains at 43 least 1 CPU that requires this mitigation. Defaults to 1. 44 45- ``WORKAROUND_CVE_2025_0647``: Enables mitigation for `CVE-2025-0647`. 46 This build option should be set to 1 if the target platform contains at 47 least 1 CPU that requires this mitigation. Defaults to 1. 48 49.. _arm_cpu_macros_errata_workarounds: 50 51CPU Errata Workarounds 52---------------------- 53 54TF-A exports a series of build flags which control the errata workarounds that 55are applied to each CPU by the reset handler. The errata details can be found 56in the CPU specific errata documents published by Arm: 57For example: `Cortex-A72 MPCore Software Developers Errata Notice`_ 58 59The errata workarounds are implemented for a particular revision or a set of 60processor revisions. This is checked by the reset handler at runtime. Each 61errata workaround is identified by its ``ID`` as specified in the processor's 62errata notice document. The format of the define used to enable/disable the 63errata workaround is ``ERRATA_<Processor name>_<ID>``, where the ``Processor name`` 64is for example ``A57`` for the ``Cortex_A57`` CPU. 65 66Refer to :ref:`firmware_design_cpu_errata_implementation` for information on how to 67write errata workaround functions. 68 69All workarounds are disabled by default. The platform is responsible for 70enabling these workarounds according to its requirement by defining the 71errata workaround build flags in the platform specific makefile. In case 72these workarounds are enabled for the wrong CPU revision then the errata 73workaround is not applied. In the DEBUG build, this is indicated by 74printing a warning to the crash console. 75 76In the current implementation, a platform which has more than 1 variant 77with different revisions of a processor has no runtime mechanism available 78for it to specify which errata workarounds should be enabled or not. 79 80The value of the build flags is 0 by default, that is, disabled. A value of 1 81will enable it. 82 83For Cortex-A9, the following errata build flags are defined : 84 85- ``ERRATA_A9_794073``: This applies errata 794073 workaround to Cortex-A9 86 CPU. This needs to be enabled for all revisions of the CPU. 87 88For Cortex-A15, the following errata build flags are defined : 89 90- ``ERRATA_A15_816470``: This applies errata 816470 workaround to Cortex-A15 91 CPU. This needs to be enabled only for revision >= r3p0 of the CPU. 92 93- ``ERRATA_A15_827671``: This applies errata 827671 workaround to Cortex-A15 94 CPU. This needs to be enabled only for revision >= r3p0 of the CPU. 95 96For Cortex-A17, the following errata build flags are defined : 97 98- ``ERRATA_A17_852421``: This applies errata 852421 workaround to Cortex-A17 99 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 100 101- ``ERRATA_A17_852423``: This applies errata 852423 workaround to Cortex-A17 102 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 103 104For Cortex-A35, the following errata build flags are defined : 105 106- ``ERRATA_A35_855472``: This applies errata 855472 workaround to Cortex-A35 107 CPUs. This needs to be enabled only for revision r0p0 of Cortex-A35. 108 109For Cortex-A53, the following errata build flags are defined : 110 111- ``ERRATA_A53_819472``: This applies errata 819472 workaround to all 112 CPUs. This needs to be enabled only for revision <= r0p1 of Cortex-A53. 113 114- ``ERRATA_A53_824069``: This applies errata 824069 workaround to all 115 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53. 116 117- ``ERRATA_A53_826319``: This applies errata 826319 workaround to Cortex-A53 118 CPU. This needs to be enabled only for revision <= r0p2 of the CPU. 119 120- ``ERRATA_A53_827319``: This applies errata 827319 workaround to all 121 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53. 122 123- ``ERRATA_A53_835769``: This applies erratum 835769 workaround at compile and 124 link time to Cortex-A53 CPU. This needs to be enabled for some variants of 125 revision <= r0p4. This workaround can lead the linker to create ``*.stub`` 126 sections. 127 128- ``ERRATA_A53_836870``: This applies errata 836870 workaround to Cortex-A53 129 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From 130 r0p4 and onwards, this errata is enabled by default in hardware. Identical to 131 ``A53_DISABLE_NON_TEMPORAL_HINT``. 132 133- ``ERRATA_A53_843419``: This applies erratum 843419 workaround at link time 134 to Cortex-A53 CPU. This needs to be enabled for some variants of revision 135 <= r0p4. This workaround can lead the linker to emit ``*.stub`` sections 136 which are 4kB aligned. 137 138- ``ERRATA_A53_855873``: This applies errata 855873 workaround to Cortex-A53 139 CPUs. Though the erratum is present in every revision of the CPU, 140 this workaround is only applied to CPUs from r0p3 onwards, which feature 141 a chicken bit in CPUACTLR_EL1 to enable a hardware workaround. 142 Earlier revisions of the CPU have other errata which require the same 143 workaround in software, so they should be covered anyway. 144 145- ``ERRATA_A53_1530924``: This applies errata 1530924 workaround to all 146 revisions of Cortex-A53 CPU. 147 148For Cortex-A55, the following errata build flags are defined : 149 150- ``ERRATA_A55_768277``: This applies errata 768277 workaround to Cortex-A55 151 CPU. This needs to be enabled only for revision r0p0 of the CPU. 152 153- ``ERRATA_A55_778703``: This applies errata 778703 workaround to Cortex-A55 154 CPU. This needs to be enabled only for revision r0p0 of the CPU. 155 156- ``ERRATA_A55_798797``: This applies errata 798797 workaround to Cortex-A55 157 CPU. This needs to be enabled only for revision r0p0 of the CPU. 158 159- ``ERRATA_A55_846532``: This applies errata 846532 workaround to Cortex-A55 160 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 161 162- ``ERRATA_A55_903758``: This applies errata 903758 workaround to Cortex-A55 163 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 164 165- ``ERRATA_A55_1221012``: This applies errata 1221012 workaround to Cortex-A55 166 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 167 168- ``ERRATA_A55_1530923``: This applies errata 1530923 workaround to all 169 revisions of Cortex-A55 CPU. 170 171For Cortex-A57, the following errata build flags are defined : 172 173- ``ERRATA_A57_806969``: This applies errata 806969 workaround to Cortex-A57 174 CPU. This needs to be enabled only for revision r0p0 of the CPU. 175 176- ``ERRATA_A57_813419``: This applies errata 813419 workaround to Cortex-A57 177 CPU. This needs to be enabled only for revision r0p0 of the CPU. 178 179- ``ERRATA_A57_813420``: This applies errata 813420 workaround to Cortex-A57 180 CPU. This needs to be enabled only for revision r0p0 of the CPU. 181 182- ``ERRATA_A57_814670``: This applies errata 814670 workaround to Cortex-A57 183 CPU. This needs to be enabled only for revision r0p0 of the CPU. 184 185- ``ERRATA_A57_817169``: This applies errata 817169 workaround to Cortex-A57 186 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 187 188- ``ERRATA_A57_826974``: This applies errata 826974 workaround to Cortex-A57 189 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 190 191- ``ERRATA_A57_826977``: This applies errata 826977 workaround to Cortex-A57 192 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 193 194- ``ERRATA_A57_828024``: This applies errata 828024 workaround to Cortex-A57 195 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 196 197- ``ERRATA_A57_829520``: This applies errata 829520 workaround to Cortex-A57 198 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 199 200- ``ERRATA_A57_833471``: This applies errata 833471 workaround to Cortex-A57 201 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 202 203- ``ERRATA_A57_859972``: This applies errata 859972 workaround to Cortex-A57 204 CPU. This needs to be enabled only for revision <= r1p3 of the CPU. 205 206- ``ERRATA_A57_1319537``: This applies errata 1319537 workaround to all 207 revisions of Cortex-A57 CPU. 208 209For Cortex-A65, the following errata build flags are defined : 210 211- ``ERRATA_A65_1179935``: This applies errata 1179935 workaround to Cortex-A65 212 CPU. This needs to be enabled only for revision r0p0 of the CPU, and is fixed 213 in r1p0. 214 215- ``ERRATA_A65_1227419``: This applies errata 1227419 workaround to Cortex-A65 216 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU and 217 is fixed in r1p1. 218 219- ``ERRATA_A65_1541130``: This applies errata 1541130 workaround to r0p0, r1p0, 220 r1p1, r1p2 revisions of the CPU and is still open. 221 222For Cortex-A65AE, the following errata build flags are defined : 223 224- ``ERRATA_A65AE_1638571``: This applies errata 1638571 workaround to Cortex-A65AE 225 CPU. This needs to be enabled r0p0, r1p0, r1p1 revisions of the CPU and is still 226 open. 227 228For Cortex-A72, the following errata build flags are defined : 229 230- ``ERRATA_A72_859971``: This applies errata 859971 workaround to Cortex-A72 231 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. 232 233- ``ERRATA_A72_1319367``: This applies errata 1319367 workaround to all 234 revisions of Cortex-A72 CPU. 235 236For Cortex-A73, the following errata build flags are defined : 237 238- ``ERRATA_A73_852427``: This applies errata 852427 workaround to Cortex-A73 239 CPU. This needs to be enabled only for revision r0p0 of the CPU. 240 241- ``ERRATA_A73_855423``: This applies errata 855423 workaround to Cortex-A73 242 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 243 244For Cortex-A75, the following errata build flags are defined : 245 246- ``ERRATA_A75_764081``: This applies errata 764081 workaround to Cortex-A75 247 CPU. This needs to be enabled only for revision r0p0 of the CPU. 248 249- ``ERRATA_A75_790748``: This applies errata 790748 workaround to Cortex-A75 250 CPU. This needs to be enabled only for revision r0p0 of the CPU. 251 252For Cortex-A76, the following errata build flags are defined : 253 254- ``ERRATA_A76_1073348``: This applies errata 1073348 workaround to Cortex-A76 255 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 256 257- ``ERRATA_A76_1130799``: This applies errata 1130799 workaround to Cortex-A76 258 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 259 260- ``ERRATA_A76_1165347``: This applies errata 1165347 workaround to Cortex-A76 261 CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU. 262 It is fixed in r3p0. 263 264- ``ERRATA_A76_1165522``: This applies errata 1165522 workaround to all 265 revisions of Cortex-A76 CPU. This errata is fixed in r3p0 but due to 266 limitation of errata framework this errata is applied to all revisions 267 of Cortex-A76 CPU. 268 269- ``ERRATA_A76_1207823``: This applies errata 1207823 workaround to Cortex-A76 270 CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU. 271 It is fixed in r3p0. 272 273- ``ERRATA_A76_1220197``: This applies errata 1220197 workaround to Cortex-A76 274 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 275 276- ``ERRATA_A76_1257314``: This applies errata 1257314 workaround to Cortex-A76 277 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 278 279- ``ERRATA_A76_1262606``: This applies errata 1262606 workaround to Cortex-A76 280 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 281 282- ``ERRATA_A76_1262888``: This applies errata 1262888 workaround to Cortex-A76 283 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 284 285- ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76 286 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 287 288- ``ERRATA_A76_1791580``: This applies errata 1791580 workaround to Cortex-A76 289 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 290 291- ``ERRATA_A76_1868343``: This applies errata 1868343 workaround to Cortex-A76 292 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 293 294- ``ERRATA_A76_1946160``: This applies errata 1946160 workaround to Cortex-A76 295 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0, 296 and r4p1 of the CPU. It is still open. 297 298- ``ERRATA_A76_2356586``: This applies erratum 2356586 workaround to Cortex-A76 299 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0, 300 r4p1 of the CPU. It is still open. 301 302- ``ERRATA_A76_2743102``: This applies errata 2743102 workaround to Cortex-A76 303 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 304 still open. 305 306- ``ERRATA_A76_3888013``: This applies erratum 3888013 workaround to Cortex-A76 307 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0, 308 r4p1 of the CPU. It is still open. 309 310For Cortex-A76AE, the following errata build flags are defined : 311 312- ``ERRATA_A76AE_1931427``: This applies errata 1931427 workaround to Cortex-A76AE 313 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 314 fixed in r1p1. 315 316- ``ERRATA_A76AE_1931435``: This applies errata 1931435 workaround to Cortex-A76AE 317 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 318 fixed in r1p1. 319 320- ``ERRATA_A76AE_1969401``: This applies errata 1969401 workaround to Cortex-A76AE 321 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 322 fixed in r1p1. 323 324- ``ERRATA_A76AE_2371140``: This applies errata 2371140 workaround to Cortex-A76AE 325 CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is 326 still open. 327 328- ``ERRATA_A76AE_2753838``: This applies errata 2753838 workaround to Cortex-A76AE 329 CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is 330 still open. 331 332- ``ERRATA_A76AE_3888014``: This applies erratum 3888014 workaround to 333 Cortex-A76AE CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 of the 334 CPU. It is still open. 335 336For Cortex-A77, the following errata build flags are defined : 337 338- ``ERRATA_A77_1160841``: This applies erratum 1160841 workaround to Cortex-A77 339 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed in r1p0. 340 341- ``ERRATA_A77_1204882``: This applies erratum 1204882 workaround to Cortex-A77 342 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed in r1p0. 343 344- ``ERRATA_A77_1220737``: This applies erratum 1220737 workaround to Cortex-A77 345 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed in r1p0. 346 347- ``ERRATA_A77_1253791``: This applies erratum 1253791 workaround to Cortex-A77 348 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed in r1p0. 349 350- ``ERRATA_A77_1273521``: This applies erratum 1273521 workaround to Cortex-A77 351 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed in r1p0. 352 353- ``ERRATA_A77_1508412``: This applies errata 1508412 workaround to Cortex-A77 354 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 355 356- ``ERRATA_A77_1515815``: This applies erratum 1515815 workaround to Cortex-A77 357 CPU. This needs to be enabled for revisions r0p0, r1p0 of the CPU. It is fixed 358 in r1p1. 359 360- ``ERRATA_A77_1925769``: This applies errata 1925769 workaround to Cortex-A77 361 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 362 363- ``ERRATA_A77_1946167``: This applies errata 1946167 workaround to Cortex-A77 364 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 365 366- ``ERRATA_A77_1791578``: This applies errata 1791578 workaround to Cortex-A77 367 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 368 369- ``ERRATA_A77_2356587``: This applies errata 2356587 workaround to Cortex-A77 370 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 371 372 - ``ERRATA_A77_1800714``: This applies errata 1800714 workaround to Cortex-A77 373 CPU. This needs to be enabled for revisions <= r1p1 of the CPU. 374 375 - ``ERRATA_A77_2743100``: This applies errata 2743100 workaround to Cortex-A77 376 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 377 378- ``ERRATA_A77_3888015``: This applies erratum 3888015 workaround to Cortex-A77 379 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 of the CPU. It is 380 still open. 381 382For Cortex-A78, the following errata build flags are defined : 383 384- ``ERRATA_A78_1467580``: This applies erratum 1467580 workaround to Cortex-A78 385 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 386 in r1p0. 387 388- ``ERRATA_A78_1479939``: This applies erratum 1479939 workaround to Cortex-A78 389 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 390 in r1p0. 391 392- ``ERRATA_A78_1492189``: This applies erratum 1492189 workaround to Cortex-A78 393 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 394 in r1p0. 395 396- ``ERRATA_A78_1503072``: This applies erratum 1503072 workaround to Cortex-A78 397 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 398 in r1p0. 399 400- ``ERRATA_A78_1515634``: This applies erratum 1515634 workaround to Cortex-A78 401 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 402 in r1p0. 403 404- ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78 405 CPU. This needs to be enabled only for revision r0p0 - r1p0 of the CPU. 406 407- ``ERRATA_A78_1827429``: This applies erratum 1827429 workaround to Cortex-A78 408 CPU. This needs to be enabled for revisions r0p0, r1p0 of the CPU. It is fixed 409 in r1p1. 410 411- ``ERRATA_A78_1941498``: This applies errata 1941498 workaround to Cortex-A78 412 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the CPU. 413 414- ``ERRATA_A78_1951500``: This applies errata 1951500 workaround to Cortex-A78 415 CPU. This needs to be enabled for revisions r1p0 and r1p1, r0p0 has the same 416 issue but there is no workaround for that revision. 417 418- ``ERRATA_A78_1821534``: This applies errata 1821534 workaround to Cortex-A78 419 CPU. This needs to be enabled for revisions r0p0 and r1p0. 420 421- ``ERRATA_A78_1952683``: This applies errata 1952683 workaround to Cortex-A78 422 CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0. 423 424- ``ERRATA_A78_2242635``: This applies errata 2242635 workaround to Cortex-A78 425 CPU. This needs to be enabled for revisions r1p0, r1p1, and r1p2. The issue 426 is present in r0p0 but there is no workaround. It is still open. 427 428- ``ERRATA_A78_2376745``: This applies errata 2376745 workaround to Cortex-A78 429 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 430 it is still open. 431 432- ``ERRATA_A78_2395406``: This applies errata 2395406 workaround to Cortex-A78 433 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 434 it is still open. 435 436- ``ERRATA_A78_2712571``: This applies erratum 2712571 workaround to Cortex-A78 437 CPU, this erratum affects system configurations that do not use an ARM 438 interconnect IP. This needs to be enabled for revisions r0p0, r1p0, r1p1 439 and r1p2 and it is still open. 440 441- ``ERRATA_A78_2742426``: This applies erratum 2742426 workaround to Cortex-A78 442 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and 443 it is still open. 444 445- ``ERRATA_A78_2772019``: This applies errata 2772019 workaround to Cortex-A78 446 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 447 it is still open. 448 449- ``ERRATA_A78_2779479``: This applies erratum 2779479 workaround to Cortex-A78 450 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and 451 it is still open. 452 453- ``ERRATA_A78_3888017``: This applies erratum 3888017 workaround to Cortex-A78 454 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the CPU. 455 It is still open. 456 457- ``ERRATA_A78_4302972``: This applies erratum 4302972 workaround to Cortex-A78 458 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the CPU. 459 It is still open. 460 461For Cortex-A78AE, the following errata build flags are defined : 462 463- ``ERRATA_A78_AE_1827431``: This applies erratum 1827431 workaround to 464 Cortex-A78AE CPU. This needs to be enabled for revision r0p0 of the CPU. It is 465 fixed in r0p1. 466 467- ``ERRATA_A78_AE_1827433``: This applies erratum 1827433 workaround to 468 Cortex-A78AE CPU. This needs to be enabled for revision r0p0 of the CPU. It is 469 fixed in r0p1. 470 471- ``ERRATA_A78_AE_1941500`` : This applies errata 1941500 workaround to 472 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. 473 This erratum is still open. 474 475- ``ERRATA_A78_AE_1951502`` : This applies errata 1951502 workaround to 476 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This 477 erratum is still open. 478 479- ``ERRATA_A78_AE_2242639``: This applies erratum 2242639 workaround to 480 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1 of the CPU. 481 It is fixed in r0p2. There is no workaround for revision r0p0. 482 483- ``ERRATA_A78_AE_2376748`` : This applies errata 2376748 workaround to 484 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 485 This erratum is still open. 486 487- ``ERRATA_A78_AE_2395408`` : This applies errata 2395408 workaround to 488 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This 489 erratum is still open. 490 491- ``ERRATA_A78_AE_2466780``: This applies erratum 2466780 workaround to 492 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1 of the CPU. 493 It is fixed in r0p2. 494 495- ``ERRATA_A78_AE_2712574`` : This applies erratum 2712574 workaround to 496 Cortex-A78AE CPU. This erratum affects system configurations that do not use 497 an ARM interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and 498 r0p2. This erratum is still open. 499 500- ``ERRATA_A78_AE_2743229``: This applies erratum 2743229 workaround to 501 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the 502 CPU. It is fixed in r0p3. 503 504- ``ERRATA_A78_AE_2779481``: This applies erratum 2779481 workaround to 505 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the 506 CPU. It is fixed in r0p3. 507 508- ``ERRATA_A78_AE_3888018``: This applies erratum 3888018 workaround to 509 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 510 of the CPU. It is still open. 511 512- ``ERRATA_A78_AE_4302973``: This applies erratum 4302973 workaround to 513 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 514 of the CPU. It is still open. 515 516For Cortex-A78C, the following errata build flags are defined : 517 518- ``ERRATA_A78C_1827430`` : This applies errata 1827430 workaround to 519 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is 520 fixed in r0p1. 521 522- ``ERRATA_A78C_1827440`` : This applies errata 1827440 workaround to 523 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is 524 fixed in r0p1. 525 526- ``ERRATA_A78C_1941499``: This applies erratum 1941499 workaround to 527 Cortex-A78C CPU. This needs to be enabled for revision r0p0 of the CPU. It is 528 fixed in r0p1. 529 530- ``ERRATA_A78C_1951501``: This applies erratum 1951501 workaround to 531 Cortex-A78C CPU. This needs to be enabled for revision r0p0 of the CPU. It is 532 fixed in r0p1. 533 534- ``ERRATA_A78C_2242638`` : This applies errata 2242638 workaround to 535 Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and 536 it is still open. 537 538- ``ERRATA_A78C_2376746``: This applies erratum 2376746 workaround to 539 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the 540 CPU. It is still open. 541 542- ``ERRATA_A78C_2376749`` : This applies errata 2376749 workaround to 543 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 544 erratum is still open. 545 546- ``ERRATA_A78C_2395407``: This applies erratum 2395407 workaround to 547 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the 548 CPU. It is still open. 549 550- ``ERRATA_A78C_2395411`` : This applies errata 2395411 workaround to 551 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 552 erratum is still open. 553 554- ``ERRATA_A78C_2478780``: This applies erratum 2478780 workaround to 555 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the 556 CPU. It is still open. 557 558- ``ERRATA_A78C_2683027`` : This applies errata 2683027 workaround to 559 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 560 erratum is still open. 561 562- ``ERRATA_A78C_2712575`` : This applies erratum 2712575 workaround to 563 Cortex-A78C CPU, this erratum affects system configurations that do not use 564 an ARM interconnect IP. This needs to be enabled for revisions r0p1 and r0p2 565 and is still open. 566 567- ``ERRATA_A78C_2743232`` : This applies erratum 2743232 workaround to 568 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. 569 This erratum is still open. 570 571- ``ERRATA_A78C_2772121`` : This applies errata 2772121 workaround to 572 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 573 This erratum is still open. 574 575- ``ERRATA_A78C_2779483``: This applies erratum 2779483 workaround to 576 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the 577 CPU. It is still open. 578 579- ``ERRATA_A78C_2779484`` : This applies errata 2779484 workaround to 580 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. 581 This erratum is still open. 582 583- ``ERRATA_A78C_3888019``: This applies erratum 3888019 workaround to 584 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the 585 CPU. It is still open. 586 587- ``ERRATA_A78C_4302974``: This applies erratum 4302974 workaround to 588 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the 589 CPU. It is still open. 590 591For Cortex-X1 CPU, the following errata build flags are defined: 592 593- ``ERRATA_X1_1821534`` : This applies errata 1821534 workaround to Cortex-X1 594 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 595 596- ``ERRATA_X1_1688305`` : This applies errata 1688305 workaround to Cortex-X1 597 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 598 599- ``ERRATA_X1_1827429`` : This applies errata 1827429 workaround to Cortex-X1 600 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 601 602For Neoverse N1, the following errata build flags are defined : 603 604- ``ERRATA_N1_925373``: This applies erratum 925373 workaround to Neoverse N1 605 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed in r1p0. 606 607- ``ERRATA_N1_1073348``: This applies errata 1073348 workaround to Neoverse-N1 608 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU. 609 610- ``ERRATA_N1_1130799``: This applies errata 1130799 workaround to Neoverse-N1 611 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 612 613- ``ERRATA_N1_1165347``: This applies errata 1165347 workaround to Neoverse-N1 614 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 615 616- ``ERRATA_N1_1207823``: This applies errata 1207823 workaround to Neoverse-N1 617 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 618 619- ``ERRATA_N1_1220197``: This applies errata 1220197 workaround to Neoverse-N1 620 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 621 622- ``ERRATA_N1_1257314``: This applies errata 1257314 workaround to Neoverse-N1 623 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 624 625- ``ERRATA_N1_1262606``: This applies errata 1262606 workaround to Neoverse-N1 626 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 627 628- ``ERRATA_N1_1262888``: This applies errata 1262888 workaround to Neoverse-N1 629 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 630 631- ``ERRATA_N1_1275112``: This applies errata 1275112 workaround to Neoverse-N1 632 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 633 634- ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1 635 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 636 637- ``ERRATA_N1_1542419``: This applies errata 1542419 workaround to Neoverse-N1 638 CPU. This needs to be enabled only for revisions r3p0 - r4p0 of the CPU. 639 640- ``ERRATA_N1_1791580``: This applies erratum 1791580 workaround to Neoverse N1 641 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0 642 of the CPU. It is fixed in r4p1. 643 644- ``ERRATA_N1_1868343``: This applies errata 1868343 workaround to Neoverse-N1 645 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 646 647- ``ERRATA_N1_1946160``: This applies errata 1946160 workaround to Neoverse-N1 648 CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for 649 revisions r0p0, r1p0, and r2p0 there is no workaround. 650 651- ``ERRATA_N1_2743102``: This applies errata 2743102 workaround to Neoverse-N1 652 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 653 still open. 654 655- ``ERRATA_N1_3324349``: This applies errata 3324349 workaround to Neoverse-N1 656 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 657 still open. 658 659- ``ERRATA_N1_3888013``: This applies erratum 3888013 workaround to Neoverse N1 660 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0, 661 r4p1 of the CPU. It is still open. 662 663For Neoverse V1, the following errata build flags are defined : 664 665- ``ERRATA_V1_1542436``: This applies erratum 1542436 workaround to Neoverse V1 666 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 667 in r1p0. 668 669- ``ERRATA_V1_1618634``: This applies erratum 1618634 workaround to Neoverse V1 670 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 671 in r1p0. 672 673- ``ERRATA_V1_1618635``: This applies errata 1618635 workaround to Neoverse-V1 674 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 675 r1p0. 676 677- ``ERRATA_V1_1618636``: This applies erratum 1618636 workaround to Neoverse V1 678 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 679 in r1p0. 680 681- ``ERRATA_V1_1619807``: This applies erratum 1619807 workaround to Neoverse V1 682 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 683 in r1p0. 684 685- ``ERRATA_V1_1654562``: This applies erratum 1654562 workaround to Neoverse V1 686 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 687 in r1p0. 688 689- ``ERRATA_V1_1674403``: This applies erratum 1674403 workaround to Neoverse V1 690 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 691 in r1p0. 692 693- ``ERRATA_V1_1774420``: This applies errata 1774420 workaround to Neoverse-V1 694 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 695 in r1p1. 696 697- ``ERRATA_V1_1791573``: This applies errata 1791573 workaround to Neoverse-V1 698 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 699 in r1p1. 700 701- ``ERRATA_V1_1852267``: This applies errata 1852267 workaround to Neoverse-V1 702 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 703 in r1p1. 704 705- ``ERRATA_V1_1925756``: This applies errata 1925756 workaround to Neoverse-V1 706 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 707 708- ``ERRATA_V1_1940577``: This applies errata 1940577 workaround to Neoverse-V1 709 CPU. This needs to be enabled only for revision r1p0 and r1p1 of the 710 CPU. 711 712- ``ERRATA_V1_1966096``: This applies errata 1966096 workaround to Neoverse-V1 713 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the 714 issue is present in r0p0 as well but there is no workaround for that 715 revision. It is still open. 716 717- ``ERRATA_V1_2139242``: This applies errata 2139242 workaround to Neoverse-V1 718 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the 719 CPU. It is still open. 720 721- ``ERRATA_V1_2216392``: This applies errata 2216392 workaround to Neoverse-V1 722 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the 723 issue is present in r0p0 as well but there is no workaround for that 724 revision. It is still open. 725 726- ``ERRATA_V1_2294912``: This applies errata 2294912 workaround to Neoverse-V1 727 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 and r1p2 of 728 the CPU. 729 730- ``ERRATA_V1_2348377``: This applies errata 2348377 workaroud to Neoverse-V1 731 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU. 732 It has been fixed in r1p2. 733 734- ``ERRATA_V1_2372203``: This applies errata 2372203 workaround to Neoverse-V1 735 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU. 736 It is still open. 737 738- ``ERRATA_V1_2701953``: This applies erratum 2701953 workaround to Neoverse-V1 739 CPU, this erratum affects system configurations that do not use an ARM 740 interconnect IP. This needs to be enabled for revisions r0p0, r1p0 and r1p1. 741 It has been fixed in r1p2. 742 743- ``ERRATA_V1_2743093``: This applies errata 2743093 workaround to Neoverse-V1 744 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 of the 745 CPU. It is still open. 746 747- ``ERRATA_V1_2743233``: This applies erratum 2743233 workaround to Neoverse-V1 748 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2 of the 749 CPU. It is still open. 750 751- ``ERRATA_V1_2779461``: This applies erratum 2779461 workaround to Neoverse-V1 752 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the 753 CPU. It is still open. 754 755- ``ERRATA_V1_3888016``: This applies erratum 3888016 workaround to Neoverse V1 756 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the CPU. 757 It is still open. 758 759For Neoverse V2, the following errata build flags are defined : 760 761- ``ERRATA_V2_2618597``: This applies errata 2618597 workaround to Neoverse-V2 762 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 763 r0p2. 764 765- ``ERRATA_V2_2662553``: This applies errata 2662553 workaround to Neoverse-V2 766 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 767 r0p2. 768 769- ``ERRATA_V2_2719103``: This applies errata 2719103 workaround to Neoverse-V2 770 CPU, this affects system configurations that do not use and ARM interconnect 771 IP. This needs to be enabled for revisions r0p0 and r0p1. It has been fixed 772 in r0p2. 773 774- ``ERRATA_V2_2719105``: This applies errata 2719105 workaround to Neoverse-V2 775 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 776 r0p2. 777 778- ``ERRATA_V2_2743011``: This applies errata 2743011 workaround to Neoverse-V2 779 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 780 r0p2. 781 782- ``ERRATA_V2_2779510``: This applies errata 2779510 workaround to Neoverse-V2 783 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 784 r0p2. 785 786- ``ERRATA_V2_2801372``: This applies errata 2801372 workaround to Neoverse-V2 787 CPU, this affects all configurations. This needs to be enabled for revisions 788 r0p0 and r0p1. It has been fixed in r0p2. 789 790- ``ERRATA_V2_3442699``: This applies errata 3442699 workaround to Neoverse-V2 791 CPU. This needs to be enabled for revision r0p0 - r0p2 and is still open. 792 793- ``ERRATA_V2_3701771``: This applies errata 3701771 workaround to Neoverse-V2 794 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 and is 795 still open. 796 797- ``ERRATA_V2_3841324``: This applies errata 3841324 workaround to Neoverse-V2 798 CPU. This needs to be enabled only for revisions r0p0 and r0p1 of 799 the CPU. It is fixed in r0p2. 800 801- ``ERRATA_V2_3888126``: This applies errata 3888126 workaround to Neoverse-V2 802 CPU. This needs to be enabled only for revisions r0p0, r0p1, r0p2 of 803 the CPU. It is still open. 804 805- ``ERRATA_V2_4302968``: This applies errata 4302968 workaround to Neoverse-V2 806 CPU. This needs to be enabled only for revisions r0p0, r0p1, r0p2 of 807 the CPU. It is still open. 808 809For Neoverse V3, the following errata build flags are defined : 810 811- ``ERRATA_V3_2970647``: This applies errata 2970647 workaround to Neoverse-V3 812 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 813 814- ``ERRATA_V3_3312417``: This applies errata 3312417 workaround to Neoverse-V3 815 CPU. This needs to be enabled for revisions r0p0 and r0p1 of the CPU and is 816 fixed in r0p2. 817 818- ``ERRATA_V3_3696307``: This applies errata 3696307 workaround to Neoverse-V3 819 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 820 r0p2. 821 822- ``ERRATA_V3_3701767``: This applies errata 3701767 workaround to Neoverse-V3 823 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the CPU and 824 is still open. 825 826- ``ERRATA_V3_3734562``: This applies errata 3734562 workaround to Neoverse-V3 827 CPU. This needs to be enabled for revisions r0p0 and r0p1 of the CPU and 828 is fixed in r0p2. 829 830- ``ERRATA_V3_3782181``: This applies errata 3782181 workaround to Neoverse-V3 831 CPU. This needs to be enabled for revision r0p1 of the CPU and is fixed in 832 r0p2. 833 834- ``ERRATA_V3_3864536``: This applies errata 3864536 workaround to Neoverse-V3 835 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU and 836 is still open. 837 838- ``ERRATA_V3_3878291``: This applies errata 3878291 workaround to Neoverse-V3 839 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU and 840 is still open. 841 842For Cortex-A710, the following errata build flags are defined : 843 844- ``ERRATA_A710_1785648``: This applies erratum 1785648 workaround to 845 Cortex-A710 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 846 fixed in r1p0. 847 848- ``ERRATA_A710_1793423``: This applies erratum 1793423 workaround to 849 Cortex-A710 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 850 fixed in r1p0. 851 852- ``ERRATA_A710_1847092``: This applies erratum 1847092 workaround to 853 Cortex-A710 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 854 fixed in r1p0. 855 856- ``ERRATA_A710_1887102``: This applies erratum 1887102 workaround to 857 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 of the CPU. 858 It is fixed in r2p0. 859 860- ``ERRATA_A710_1901946``: This applies errata 1901946 workaround to 861 Cortex-A710 CPU. This needs to be enabled only for revision r1p0. It has 862 been fixed in r2p0. 863 864- ``ERRATA_A710_1916945``: This applies errata 1916945 workaround to 865 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 866 It has been fixed in r2p0. 867 868- ``ERRATA_A710_1917258``: This applies errata 1917258 workaround to 869 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 870 It has been fixed in r2p0. 871 872- ``ERRATA_A710_1927200``: This applies errata 1927200 workaround to 873 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 874 It has been fixed in r2p0. 875 876- ``ERRATA_A710_1987031``: This applies errata 1987031 workaround to 877 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 878 r2p0 of the CPU. It is still open. 879 880- ``ERRATA_A710_2081180``: This applies errata 2081180 workaround to 881 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 882 r2p0 of the CPU. It is still open. 883 884- ``ERRATA_A710_2055002``: This applies errata 2055002 workaround to 885 Cortex-A710 CPU. This needs to be enabled for revisions r1p0, r2p0 of the CPU 886 and is still open. 887 888- ``ERRATA_A710_2017096``: This applies errata 2017096 workaround to 889 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 890 of the CPU and is still open. 891 892- ``ERRATA_A710_2083908``: This applies errata 2083908 workaround to 893 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU and 894 is still open. 895 896- ``ERRATA_A710_2267065``: This applies errata 2267065 workaround to 897 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 898 of the CPU and is fixed in r2p1. 899 900- ``ERRATA_A710_2136059``: This applies errata 2136059 workaround to 901 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 902 of the CPU and is fixed in r2p1. 903 904- ``ERRATA_A710_2147715``: This applies errata 2147715 workaround to 905 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU 906 and is fixed in r2p1. 907 908- ``ERRATA_A710_2216384``: This applies errata 2216384 workaround to 909 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 910 of the CPU and is fixed in r2p1. 911 912- ``ERRATA_A710_2282622``: This applies errata 2282622 workaround to 913 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 914 r2p1 of the CPU and is still open. 915 916- ``ERRATA_A710_2291219``: This applies errata 2291219 workaround to 917 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 918 of the CPU and is fixed in r2p1. 919 920- ``ERRATA_A710_2008768``: This applies errata 2008768 workaround to 921 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 922 of the CPU and is fixed in r2p1. 923 924- ``ERRATA_A710_2371105``: This applies errata 2371105 workaround to 925 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 926 of the CPU and is fixed in r2p1. 927 928- ``ERRATA_A710_2701952``: This applies erratum 2701952 workaround to Cortex-A710 929 CPU, and applies to system configurations that do not use and ARM 930 interconnect IP. This needs to be enabled for r0p0, r1p0, r2p0 and r2p1 and 931 is still open. 932 933- ``ERRATA_A710_2742423``: This applies errata 2742423 workaround to 934 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 935 r2p1 of the CPU and is still open. 936 937- ``ERRATA_A710_2768515``: This applies errata 2768515 workaround to 938 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 939 r2p1 of the CPU and is still open. 940 941- ``ERRATA_A710_2778471``: This applies errata 2778471 workaround to Cortex-A710 942 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 943 CPU and is still open. 944 945- ``ERRATA_A710_3324338``: This applies errata 3324338 workaround to 946 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 947 r2p1 of the CPU and is still open. 948 949- ``ERRATA_A710_3701772``: This applies errata 3701772 workaround to Cortex-A710 950 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 of the 951 CPU and is still open. 952 953- ``ERRATA_A710_3888122``: This applies erratum 3888122 workaround to 954 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 955 of the CPU. It is still open. 956 957- ``ERRATA_A710_4302969``: This applies erratum 4302969 workaround to 958 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 959 of the CPU. It is still open. 960 961For Neoverse N2, the following errata build flags are defined : 962 963- ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2 964 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 965 966- ``ERRATA_N2_2009478``: This applies errata 2009478 workaround to Neoverse-N2 967 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 968 969- ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2 970 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 971 972- ``ERRATA_N2_2025414``: This applies errata 2025414 workaround to Neoverse-N2 973 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 974 975- ``ERRATA_N2_2138953``: This applies errata 2138953 workaround to Neoverse-N2 976 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3 of the 977 Neoverse N2 cpu and is still open. 978 979- ``ERRATA_N2_2138956``: This applies errata 2138956 workaround to Neoverse-N2 980 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 981 982- ``ERRATA_N2_2138958``: This applies errata 2138958 workaround to Neoverse-N2 983 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 984 985- ``ERRATA_N2_2189731``: This applies errata 2189731 workaround to Neoverse-N2 986 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 987 988- ``ERRATA_N2_2242400``: This applies errata 2242400 workaround to Neoverse-N2 989 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 990 991- ``ERRATA_N2_2242415``: This applies errata 2242415 workaround to Neoverse-N2 992 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 993 994- ``ERRATA_N2_2280757``: This applies errata 2280757 workaround to Neoverse-N2 995 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 996 997- ``ERRATA_N2_2326639``: This applies errata 2326639 workaround to Neoverse-N2 998 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 999 r0p1. 1000 1001- ``ERRATA_N2_2340933``: This applies errata 2340933 workaround to Neoverse-N2 1002 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 1003 r0p1. 1004 1005- ``ERRATA_N2_2346952``: This applies errata 2346952 workaround to Neoverse-N2 1006 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU, 1007 it is fixed in r0p3. 1008 1009- ``ERRATA_N2_2376738``: This applies errata 2376738 workaround to Neoverse-N2 1010 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open. 1011 1012- ``ERRATA_N2_2388450``: This applies errata 2388450 workaround to Neoverse-N2 1013 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 1014 r0p1. 1015 1016- ``ERRATA_N2_2743014``: This applies errata 2743014 workaround to Neoverse-N2 1017 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 1018 in r0p3. 1019 1020- ``ERRATA_N2_2743089``: This applies errata 2743089 workaround to Neoverse-N2 1021 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 1022 in r0p3. 1023 1024- ``ERRATA_N2_2728475``: This applies erratum 2728475 workaround to Neoverse-N2 1025 CPU, this erratum affects system configurations that do not use and ARM 1026 interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 1027 It is fixed in r0p3. 1028 1029- ``ERRATA_N2_2779511``: This applies errata 2779511 workaround to Neoverse-N2 1030 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 1031 in r0p3. 1032 1033- ``ERRATA_N2_3324339``: This applies errata 3324339 workaround to Neoverse-N2 1034 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 1035 still open. 1036 1037- ``ERRATA_N2_3701773``: This applies errata 3701773 workaround to Neoverse-N2 1038 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 1039 still open. 1040 1041- ``ERRATA_N2_3888123``: This applies errata 3888123 workaround to Neoverse-N2 1042 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 1043 still open. 1044 1045- ``ERRATA_N2_4302970``: This applies errata 4302970 workaround to Neoverse-N2 1046 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 1047 still open. 1048 1049For Neoverse N3, the following errata build flags are defined : 1050 1051- ``ERRATA_N3_3456111``: This applies errata 3456111 workaround to Neoverse-N3 1052 CPU. This needs to be enabled for revisions r0p0 and r0p1 and is still open. 1053 1054- ``ERRATA_N3_3699563``: This applies errata 3699563 workaround to Neoverse-N3 1055 CPU. This needs to be enabled for revisions r0p0 and is still open. 1056 1057For Cortex-X2, the following errata build flags are defined : 1058 1059- ``ERRATA_X2_1901946``: This applies errata 1901946 workaround to Cortex-X2 1060 CPU. This needs to be enabled only for r1p0, it is fixed in r2p0. 1061 1062- ``ERRATA_X2_1916945``: This applies errata 1916945 workaround to Cortex-X2 1063 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 1064 is fixed in r2p0. 1065 1066- ``ERRATA_X2_1917258``: This applies errata 1917258 workaround to Cortex-X2 1067 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 1068 is fixed in r2p0. 1069 1070- ``ERRATA_X2_1927200``: This applies errata 1927200 workaround to Cortex-X2 1071 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 1072 is fixed in r2p0. 1073 1074- ``ERRATA_X2_1934260``: This applies errata 1934260 workaround to Cortex-X2 1075 CPU. This needs to be enabled only for revision r1p0 of the CPU, it is fixed 1076 in r2p0. 1077 1078- ``ERRATA_X2_2002765``: This applies errata 2002765 workaround to Cortex-X2 1079 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1080 CPU, it is fixed in r2p1. 1081 1082- ``ERRATA_X2_2017096``: This applies errata 2017096 workaround to Cortex-X2 1083 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1084 CPU, it is fixed in r2p1. 1085 1086- ``ERRATA_X2_2081180``: This applies errata 2081180 workaround to Cortex-X2 1087 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1088 CPU, it is fixed in r2p1. 1089 1090- ``ERRATA_X2_2083908``: This applies errata 2083908 workaround to Cortex-X2 1091 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed 1092 in r2p1. 1093 1094- ``ERRATA_X2_2136059``: This applies errata 2136059 workaround to Cortex-X2 1095 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1096 CPU, it is fixed in r2p1. 1097 1098- ``ERRATA_X2_2147715``: This applies errata 2147715 workaround to Cortex-X2 1099 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed 1100 in r2p1. 1101 1102- ``ERRATA_X2_2216384``: This applies errata 2216384 workaround to Cortex-X2 1103 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1104 CPU, it is fixed in r2p1. 1105 1106- ``ERRATA_X2_2267065``: This applies errata 2267065 workaround to Cortex-X2 1107 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1108 CPU, it is fixed in r2p1. 1109 1110- ``ERRATA_X2_2282622``: This applies errata 2282622 workaround to Cortex-X2 1111 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1112 CPU and is still open. 1113 1114- ``ERRATA_X2_2291219``: This applies errata 2291219 workaround to Cortex-X2 1115 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1116 CPU, it is fixed in r2p1. 1117 1118- ``ERRATA_X2_2371105``: This applies errata 2371105 workaround to Cortex-X2 1119 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1120 CPU, it is fixed in r2p1. 1121 1122- ``ERRATA_X2_2701952``: This applies errata 2701952 workaround to Cortex-X2 1123 CPU and affects system configurations that do not use an Arm interconnect IP. 1124 This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 and is 1125 still open. 1126 1127- ``ERRATA_X2_2742423``: This applies errata 2742423 workaround to Cortex-X2 1128 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1129 CPU and is still open. 1130 1131- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to Cortex-X2 1132 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1133 CPU and is still open. 1134 1135- ``ERRATA_X2_2778471``: This applies errata 2778471 workaround to Cortex-X2 1136 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1137 CPU and is still open. 1138 1139- ``ERRATA_X2_3324338``: This applies errata 3324338 workaround to Cortex-X2 1140 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1141 CPU and is still open. 1142 1143- ``ERRATA_X2_3701772``: This applies errata 3701772 workaround to Cortex-X2 1144 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1145 CPU and is still open. 1146 1147- ``ERRATA_X2_3888122``: This applies errata 3888122 workaround to Cortex-X2 1148 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1149 CPU and is still open. 1150 1151- ``ERRATA_X2_4302969``: This applies errata 4302969 workaround to Cortex-X2 1152 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1153 CPU and is still open. 1154 1155For Cortex-X3, the following errata build flags are defined : 1156 1157- ``ERRATA_X3_2266875``: This applies errata 2266875 workaround to the Cortex-X3 1158 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 1159 is fixed in r1p1. 1160 1161- ``ERRATA_X3_2302506``: This applies errata 2302506 workaround to the Cortex-X3 1162 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1, it is 1163 fixed in r1p2. 1164 1165- ``ERRATA_X3_2313909``: This applies errata 2313909 workaround to 1166 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 1167 of the CPU, it is fixed in r1p1. 1168 1169- ``ERRATA_X3_2372204``: This applies errata 2372204 workaround to 1170 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 1171 of the CPU, it is fixed in r1p1. 1172 1173- ``ERRATA_X3_2615812``: This applies errata 2615812 workaround to Cortex-X3 1174 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the 1175 CPU, it is fixed in r1p2. 1176 1177- ``ERRATA_X3_2641945``: This applies errata 2641945 workaround to Cortex-X3 1178 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU. 1179 It is fixed in r1p1. 1180 1181- ``ERRATA_X3_2701951``: This applies erratum 2701951 workaround to Cortex-X3 1182 CPU and affects system configurations that do not use an ARM interconnect 1183 IP. This needs to be applied to revisions r0p0, r1p0 and r1p1. It is fixed 1184 in r1p2. 1185 1186- ``ERRATA_X3_2742421``: This applies errata 2742421 workaround to 1187 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 1188 r1p1. It is fixed in r1p2. 1189 1190- ``ERRATA_X3_2743088``: This applies errata 2743088 workaround to Cortex-X3 1191 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1. It is 1192 fixed in r1p2. 1193 1194- ``ERRATA_X3_2779509``: This applies errata 2779509 workaround to Cortex-X3 1195 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the 1196 CPU. It is fixed in r1p2. 1197 1198- ``ERRATA_X3_3213672``: This applies errata 3213672 workaround to Cortex-X3 1199 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1200 of the CPU. It is still open. 1201 1202- ``ERRATA_X3_3692984``: This applies errata 3692984 workaround to Cortex-X3 1203 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1204 of the CPU. It is still open. 1205 1206- ``ERRATA_X3_3701769``: This applies errata 3701769 workaround to Cortex-X3 1207 CPU. This needs to be enabled only for revisions r0p0, r1p0, r1p1 and r1p2 1208 of the CPU and it is still open. 1209 1210- ``ERRATA_X3_3827463``: This applies errata 3827463 workaround to Cortex-X3 1211 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of 1212 the CPU. It is fixed in r1p2. 1213 1214- ``ERRATA_X3_3888125``: This applies errata 3888125 workaround to Cortex-X3 1215 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1216 of the CPU. It is still open. 1217 1218- ``ERRATA_X3_4302966``: This applies errata 4302966 workaround to Cortex-X3 1219 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1220 of the CPU. It is still open. 1221 1222For Cortex-X4, the following errata build flags are defined : 1223 1224- ``ERRATA_X4_2701112``: This applies erratum 2701112 workaround to Cortex-X4 1225 CPU and affects system configurations that do not use an Arm interconnect IP. 1226 This needs to be enabled for revisions r0p0 and is fixed in r0p1. 1227 The workaround for this erratum is not implemented in EL3, but the flag can 1228 be enabled/disabled at the platform level. The flag is used when the errata ABI 1229 feature is enabled and can assist the Kernel in the process of 1230 mitigation of the erratum. 1231 1232- ``ERRATA_X4_2726228``: This applies erratum 2726228 workaround to Cortex-X4 1233 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 1234 r0p2. 1235 1236- ``ERRATA_X4_2740089``: This applies errata 2740089 workaround to Cortex-X4 1237 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed 1238 in r0p2. 1239 1240- ``ERRATA_X4_2763018``: This applies errata 2763018 workaround to Cortex-X4 1241 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1242 1243- ``ERRATA_X4_2816013``: This applies errata 2816013 workaround to Cortex-X4 1244 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1245 1246- ``ERRATA_X4_2897503``: This applies errata 2897503 workaround to Cortex-X4 1247 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1248 1249- ``ERRATA_X4_2923985``: This applies errata 2923985 workaround to Cortex-X4 1250 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1251 1252- ``ERRATA_X4_2957258``: This applies errata 2957258 workaround to Cortex-X4 1253 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1254 1255- ``ERRATA_X4_3076789``: This applies errata 3076789 workaround to Cortex-X4 1256 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1257 1258- ``ERRATA_X4_3133195``: This applies errata 3133195 workaround to Cortex-X4 1259 CPU. This needs to be enabled for revision r0p2. It is fixed in r0p3. 1260 1261- ``ERRATA_X4_3701758``: This applies errata 3701758 workaround to Cortex-X4 1262 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3. 1263 It is still open. 1264 1265- ``ERRATA_X4_3887999``: This applies errata 3887999 workaround to Cortex-X4 1266 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2 and r0p3. 1267 It is still open. 1268 1269For Cortex-X925, the following errata build flags are defined : 1270 1271- ``ERRATA_X925_2921199``: This applies errata 2921199 workaround to Cortex-X925 1272 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1273 1274- ``ERRATA_X925_2922378``: This applies errata 2922378 workaround to Cortex-X925 1275 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1276 1277- ``ERRATA_X925_2933290``: This applies errata 2933290 workaround to Cortex-X925 1278 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1279 1280- ``ERRATA_X925_2963999``: This applies errata 2963999 workaround to Cortex-X925 1281 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1282 1283- ``ERRATA_X925_3324334``: This applies errata 3324334 workaround to Cortex-X925 1284 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1285 1286- ``ERRATA_X925_3692980``: This applies errata 3692980 workaround to Cortex-X925 1287 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1288 1289- ``ERRATA_X925_3730893``: This applies errata 3730893 workaround to Cortex-X925 1290 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1291 1292- ``ERRATA_X925_3865185``: This applies errata 3865185 workaround to Cortex-X925 1293 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1294 1295- ``ERRATA_X925_3701747``: This applies errata 3701747 workaround to Cortex-X925 1296 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is still open. 1297 1298For Cortex-A510, the following errata build flags are defined : 1299 1300- ``ERRATA_A510_2008766``: This applies errata 2008766 workaround to 1301 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1302 r0p3, r1p0, r1p1, r1p2 and r1p3. It is still open. 1303 1304- ``ERRATA_A510_2288014``: This applies errata 2288014 workaround to 1305 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1, 1306 r0p2, r0p3 and r1p0, it is fixed in r1p1. 1307 1308- ``ERRATA_A510_2042739``: This applies errata 2042739 workaround to 1309 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1 and 1310 r0p2, it is fixed in r0p3. 1311 1312- ``ERRATA_A510_2041909``: This applies errata 2041909 workaround to 1313 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is fixed 1314 in r0p3. The issue is also present in r0p0 and r0p1 but there is no 1315 workaround for those revisions. 1316 1317- ``ERRATA_A510_2080326``: This applies errata 2080326 workaround to 1318 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is 1319 fixed in r0p3. This issue is also present in r0p0 and r0p1 but there is no 1320 workaround for those revisions. 1321 1322- ``ERRATA_A510_2169012``: This applies errata 2169012 workaround to 1323 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1, 1324 r0p2, r0p3 and r1p0, it is fixed in r1p1. 1325 1326- ``ERRATA_A510_2218134``: This applies errata 2218134 workaround to 1327 Cortex-A510 CPU. This needs to be enabled only for revision r1p0 and is fixed 1328 in r1p1. 1329 1330- ``ERRATA_A510_2250311``: This applies errata 2250311 workaround to 1331 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1332 r0p3 and r1p0, it is fixed in r1p1. This workaround disables MPMM even if 1333 ENABLE_MPMM=1. 1334 1335- ``ERRATA_A510_2218950``: This applies errata 2218950 workaround to 1336 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1337 r0p3 and r1p0, it is fixed in r1p1. 1338 1339- ``ERRATA_A510_2172148``: This applies errata 2172148 workaround to 1340 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1341 r0p3 and r1p0, it is fixed in r1p1. 1342 1343- ``ERRATA_A510_2347730``: This applies errata 2347730 workaround to 1344 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1345 r0p3, r1p0 and r1p1. It is fixed in r1p2. 1346 1347- ``ERRATA_A510_2371937``: This applies errata 2371937 workaround to 1348 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2, 1349 r0p3, r1p0, r1p1, and is fixed in r1p2. 1350 1351- ``ERRATA_A510_2420992``: This applies errata 2420992 workaround to 1352 Cortex-A510 CPU. This needs to applied for revisions r1p0 and r1p1, and is 1353 fixed in r1p2. 1354 1355- ``ERRATA_A510_2666669``: This applies errata 2666669 workaround to 1356 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2, 1357 r0p3, r1p0, r1p1. It is fixed in r1p2. 1358 1359- ``ERRATA_A510_2684597``: This applies erratum 2684597 workaround to 1360 Cortex-A510 CPU. This needs to be applied to revision r0p0, r0p1, r0p2, 1361 r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. 1362 1363- ``ERRATA_A510_2971420``: This applies erratum 2971420 workaround to 1364 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1365 r1p0, r1p1, r1p2 and r1p3 and is still open. 1366 1367- ``ERRATA_A510_3672349``: This applies erratum 3672349 workaround to 1368 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1369 r1p0, r1p1, r1p2 and r1p3 and is still open. 1370 1371- ``ERRATA_A510_3704847``: This applies erratum 3704847 workaround to 1372 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1373 r1p0, r1p1, r1p2 and r1p3 and is still open. 1374 1375For Cortex-A520, the following errata build flags are defined : 1376 1377- ``ERRATA_A520_2630792``: This applies errata 2630792 workaround to 1378 Cortex-A520 CPU. This needs to applied for revisions r0p0, r0p1 of the 1379 CPU and is still open. 1380 1381- ``ERRATA_A520_2858100``: This applies errata 2858100 workaround to 1382 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1383 It is still open. 1384 1385- ``ERRATA_A520_2938996``: This applies errata 2938996 workaround to 1386 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1387 It is fixed in r0p2. 1388 1389For Cortex-A715, the following errata build flags are defined : 1390 1391- ``ERRATA_A715_2238661``: This applies erratum 2238661 workaround to 1392 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1393 fixed in r1p0. 1394 1395- ``ERRATA_A715_2239006``: This applies erratum 2239006 workaround to 1396 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1397 fixed in r1p0. 1398 1399- ``ERRATA_A715_2275754``: This applies erratum 2275754 workaround to 1400 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1401 fixed in r1p0. 1402 1403- ``ERRATA_A715_2284544``: This applies erratum 2284544 workaround to 1404 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1405 fixed in r1p0. 1406 1407- ``ERRATA_A715_2285473``: This applies erratum 2285473 workaround to 1408 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1409 fixed in r1p0. 1410 1411- ``ERRATA_A715_2292761``: This applies erratum 2292761 workaround to 1412 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1413 fixed in r1p0. 1414 1415- ``ERRATA_A715_2331818``: This applies errata 2331818 workaround to 1416 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. 1417 It is fixed in r1p1. 1418 1419- ``ERRATA_A715_2344187``: This applies errata 2344187 workaround to 1420 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is 1421 fixed in r1p1. 1422 1423- ``ERRATA_A715_2376701``: This applies errata 2376701 workaround to 1424 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is 1425 fixed in r1p1. 1426 1427- ``ERRATA_A715_2409570``: This applies errata 2409570 workaround to 1428 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1429 It is fixed in r1p1. This errata also applies to r0p0 but that revision has a 1430 different workaround, and since r0p0 is not used in production hardware it is 1431 not implemented. 1432 1433- ``ERRATA_A715_2413290``: This applies errata 2413290 workaround to 1434 Cortex-A715 CPU. This needs to be enabled only for revision r1p0 and 1435 when SPE(Statistical profiling extension)=True. The errata is fixed 1436 in r1p1. 1437 1438- ``ERRATA_A715_2420947``: This applies errata 2420947 workaround to 1439 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1440 It is fixed in r1p1. 1441 1442- ``ERRATA_A715_2429384``: This applies errata 2429384 workaround to 1443 Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no 1444 workaround for revision r0p0. It is fixed in r1p1. 1445 1446- ``ERRATA_A715_2561034``: This applies errata 2561034 workaround to 1447 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1448 It is fixed in r1p1. 1449 1450- ``ERRATA_A715_2728106``: This applies errata 2728106 workaround to 1451 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0 1452 and r1p1. It is fixed in r1p2. 1453 1454- ``ERRATA_A715_2804830``: This applies errata 2804830 workaround to 1455 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1456 r1p1 and r1p2. It is fixed in r1p3. 1457 1458- ``ERRATA_A715_3456084``: This applies errata 3456084 workaround to 1459 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1460 r1p1, r1p2 and r1p3. It is still open. 1461 1462- ``ERRATA_A715_3699560``: This applies errata 3699560 workaround to 1463 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1464 r1p2 and r1p3. It is still open. 1465 1466- ``ERRATA_A715_3711916``: This applies errata 3711916 workaround to 1467 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1468 r1p1, r1p2 and r1p3. It is still open. 1469 1470For Cortex-A720, the following errata build flags are defined : 1471 1472- ``ERRATA_A720_2729604``: This applies errata 2729604 workaround to 1473 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1474 It is fixed in r0p2. 1475 1476- ``ERRATA_A720_2792132``: This applies errata 2792132 workaround to 1477 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1478 It is fixed in r0p2. 1479 1480- ``ERRATA_A720_2844092``: This applies errata 2844092 workaround to 1481 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1482 It is fixed in r0p2. 1483 1484- ``ERRATA_A720_2926083``: This applies errata 2926083 workaround to 1485 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1486 It is fixed in r0p2. 1487 1488- ``ERRATA_A720_2940794``: This applies errata 2940794 workaround to 1489 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1490 It is fixed in r0p2. 1491 1492- ``ERRATA_A720_3456091``: This applies errata 3456091 workaround to 1493 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1494 and r0p2. It is still open. 1495 1496- ``ERRATA_A720_3699561``: This applies errata 3699561 workaround to 1497 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1498 and r0p2. It is still open. 1499 1500- ``ERRATA_A720_3711910``: This applies errata 3711910 workaround to 1501 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1502 and r0p2. It is still open. 1503 1504For Cortex-A720_AE, the following errata build flags are defined : 1505 1506- ``ERRATA_A720_AE_3456103``: This applies errata 3456103 workaround to 1507 Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0 and r0p1. It 1508 is still open. 1509 1510- ``ERRATA_A720_AE_3699562``: This applies errata 3699562 workaround 1511 to Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0. 1512 It is still open. 1513 1514For Cortex-A725, the following errata build flags are defined : 1515 1516- ``ERRATA_A725_2874943``: This applies errata 2874943 workaround to 1517 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 when 1518 FEAT_SPE is enabled. It is fixed in r0p1. 1519 1520- ``ERRATA_A725_2936490``: This applies errata 2936490 workaround to 1521 Cortex-A725 CPU. This needs to be enabled for revisions r0p0. 1522 It is fixed in r0p1. 1523 1524- ``ERRATA_A725_3456106``: This applies errata 3456106 workaround to 1525 Cortex-A725 CPU. This needs to be enabled for revisions r0p0, r0p1 1526 and r0p2. It is still open. 1527 1528- ``ERRATA_A725_3699564``: This applies errata 3699564 workaround to 1529 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1530 It is fixed in r0p2. 1531 1532- ``ERRATA_A725_3711914``: This applies errata 3711914 workaround to 1533 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1534 It is fixed in r0p2. 1535 1536For C1-Ultra, the following errata build flags are defined : 1537 1538- ``ERRATA_C1ULTRA_3324333``: This applies erratum 3324333 workaround to 1539 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is fixed 1540 in r1p0. 1541 1542- ``ERRATA_C1ULTRA_3502731``: This applies erratum 3502731 workaround to 1543 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is 1544 fixed in r1p0. 1545 1546- ``ERRATA_C1ULTRA_3658374``: This applies erratum 3658374 workaround to 1547 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1548 is still open. 1549 1550- ``ERRATA_C1ULTRA_3684152``: This applies erratum 3684152 workaround to 1551 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is 1552 fixed in r1p0. 1553 1554- ``ERRATA_C1ULTRA_3705939``: This applies erratum 3705939 workaround to 1555 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1556 is still open. 1557 1558- ``ERRATA_C1ULTRA_3815514``: This applies erratum 3815514 workaround to 1559 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1560 is still open. 1561 1562- ``ERRATA_C1ULTRA_3865171``: This applies erratum 3865171 workaround to 1563 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1564 is still open. 1565 1566- ``ERRATA_C1ULTRA_3926381``: This applies erratum 3926381 workaround to 1567 C1-Ultra CPU. This needs to be enabled for revision r1p0 and is still 1568 open. 1569 1570- ``ERRATA_C1ULTRA_4102704``: This applies erratum 4102704 workaround to 1571 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1572 is still open. 1573 1574For C1-Premium, the following errata build flags are defined : 1575 1576- ``ERRATA_C1PREMIUM_3324333``: This applies errata 3324333 workaround to 1577 C1-Premium CPU. This needs to be enabled for revision r0p0, and is 1578 fixed in r1p0. 1579 1580- ``ERRATA_C1PREMIUM_3502731``: This applies errata 3502731 workaround to 1581 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1582 in r1p0. 1583 1584- ``ERRATA_C1PREMIUM_3684152``: This applies errata 3684152 workaround to 1585 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1586 in r1p0. 1587 1588- ``ERRATA_C1PREMIUM_3705939``: This applies errata 3705939 workaround to 1589 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1590 is still open. 1591 1592- ``ERRATA_C1PREMIUM_3815514``: This applies errata 3815514 workaround to 1593 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1594 is still open. 1595 1596- ``ERRATA_C1PREMIUM_3865171``: This applies errata 3865171 workaround to 1597 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1598 is still open. 1599 1600- ``ERRATA_C1PREMIUM_3926381``: This applies errata 3926381 workaround to 1601 C1-Premium CPU. This needs to be enabled for revision r1p0 and is 1602 still open. 1603 1604- ``ERRATA_C1PREMIUM_4102704``: This applies errata 4102704 workaround to 1605 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1606 is still open. 1607 1608For C1-Pro, the following errata build flags are defined : 1609 1610- ``ERRATA_C1PRO_3619847``: This applies errata 3619847 workaround to C1-Pro 1611 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1612 1613- ``ERRATA_C1PRO_3338470``: This applies errata 3338470 workaround to C1-Pro 1614 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1615 1616- ``ERRATA_C1PRO_3362007``: This applies errata 3362007 workaround to C1-Pro 1617 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1618 1619- ``ERRATA_C1PRO_3686597``: This applies errata 3686597 workaround to C1-Pro 1620 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1621 is fixed in r1p1. 1622 1623- ``ERRATA_C1PRO_3694158``: This applies errata 3694158 workaround to C1-Pro 1624 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 and is 1625 fixed in r1p2. 1626 1627- ``ERRATA_C1PRO_3706576``: This applies errata 3706576 workaround to C1-Pro 1628 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1629 is fixed in r1p1. 1630 1631- ``ERRATA_C1PRO_3300099``: This applies errata 3300099 workaround to C1-Pro 1632 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1633 is fixed in r1p1. 1634 1635For C1-Nano, the following errata build flags are defined : 1636 1637- ``ERRATA_C1NANO_3392149``: This applies errata 3392149 workaround to 1638 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1639 in r0p1. 1640 1641- ``ERRATA_C1NANO_3419531``: This applies errata 3419531 workaround to 1642 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1643 in r0p1. 1644 1645- ``ERRATA_C1NANO_3437202``: This applies errata 3437202 workaround to 1646 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1647 in r0p1. 1648 1649- ``ERRATA_C1NANO_3516455``: This applies errata 3516455 workaround to 1650 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1651 in r0p1. 1652 1653- ``ERRATA_C1NANO_3616450``: This applies errata 3616450 workaround to 1654 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1655 in r0p1. 1656 1657- ``ERRATA_C1NANO_3630925``: This applies errata 3630925 workaround to 1658 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1659 in r0p1. 1660 1661- ``ERRATA_C1NANO_3754876``: This applies errata 3754876 workaround to 1662 C1-Nano CPU. This needs to be enabled for revisions r0p0 and r0p1, and 1663 is fixed in r0p2. 1664 1665DSU Errata Workarounds 1666---------------------- 1667 1668Similar to CPU errata, TF-A also implements workarounds for DSU (DynamIQ 1669Shared Unit) errata. The DSU errata details can be found in the respective Arm 1670documentation: 1671 1672- `Arm DSU Software Developers Errata Notice`_. 1673 1674Each erratum is identified by an ``ID``, as defined in the DSU errata notice 1675document. Thus, the build flags which enable/disable the errata workarounds 1676have the format ``ERRATA_DSU_<ID>``. The implementation and application logic 1677of DSU errata workarounds are similar to `CPU errata workarounds`_. 1678 1679For DSU errata, the following build flags are defined: 1680 1681- ``ERRATA_DSU_798953``: This applies errata 798953 workaround for the 1682 affected DSU configurations. This errata applies only for those DSUs that 1683 revision is r0p0 (on r0p1 it is fixed). However, please note that this 1684 workaround results in increased DSU power consumption on idle. 1685 1686- ``ERRATA_DSU_936184``: This applies errata 936184 workaround for the 1687 affected DSU configurations. This errata applies only for those DSUs that 1688 contain the ACP interface **and** the DSU revision is older than r2p0 (on 1689 r2p0 it is fixed). However, please note that this workaround results in 1690 increased DSU power consumption on idle. 1691 1692- ``ERRATA_DSU_2313941``: This applies errata 2313941 workaround for the 1693 affected DSU configurations. This errata applies for those DSUs with 1694 revisions r0p0, r1p0, r2p0, r2p1, r3p0, r3p1 and is still open. However, 1695 please note that this workaround results in increased DSU power consumption 1696 on idle. 1697 1698- ``ERRATA_DSU_2900952``: This applies errata 2900952 workaround for the 1699 affected DSU-120 configurations. This erratum applies to some r2p0 1700 implementations and is fixed in r2p1. The affected r2p0 implementations 1701 are determined by reading the IMP_CLUSTERREVIDR_EL1[1] register bit 1702 and making sure it's clear. 1703 1704CPU Specific optimizations 1705-------------------------- 1706 1707This section describes some of the optimizations allowed by the CPU micro 1708architecture that can be enabled by the platform as desired. 1709 1710- ``SKIP_A57_L1_FLUSH_PWR_DWN``: This flag enables an optimization in the 1711 Cortex-A57 cluster power down sequence by not flushing the Level 1 data 1712 cache. The L1 data cache and the L2 unified cache are inclusive. A flush 1713 of the L2 by set/way flushes any dirty lines from the L1 as well. This 1714 is a known safe deviation from the Cortex-A57 TRM defined power down 1715 sequence. Each Cortex-A57 based platform must make its own decision on 1716 whether to use the optimization. 1717 1718- ``A53_DISABLE_NON_TEMPORAL_HINT``: This flag disables the cache non-temporal 1719 hint. The LDNP/STNP instructions as implemented on Cortex-A53 do not behave 1720 in a way most programmers expect, and will most probably result in a 1721 significant speed degradation to any code that employs them. The Armv8-A 1722 architecture (see Arm DDI 0487A.h, section D3.4.3) allows cores to ignore 1723 the non-temporal hint and treat LDNP/STNP as LDP/STP instead. Enabling this 1724 flag enforces this behaviour. This needs to be enabled only for revisions 1725 <= r0p3 of the CPU and is enabled by default. 1726 1727- ``A57_DISABLE_NON_TEMPORAL_HINT``: This flag has the same behaviour as 1728 ``A53_DISABLE_NON_TEMPORAL_HINT`` but for Cortex-A57. This needs to be 1729 enabled only for revisions <= r1p2 of the CPU and is enabled by default, 1730 as recommended in section "4.7 Non-Temporal Loads/Stores" of the 1731 `Cortex-A57 Software Optimization Guide`_. 1732 1733- ''A57_ENABLE_NON_CACHEABLE_LOAD_FWD'': This flag enables non-cacheable 1734 streaming enhancement feature for Cortex-A57 CPUs. Platforms can set 1735 this bit only if their memory system meets the requirement that cache 1736 line fill requests from the Cortex-A57 processor are atomic. Each 1737 Cortex-A57 based platform must make its own decision on whether to use 1738 the optimization. This flag is disabled by default. 1739 1740- ``NEOVERSE_Nx_EXTERNAL_LLC``: This flag indicates that an external last 1741 level cache(LLC) is present in the system, and that the DataSource field 1742 on the master CHI interface indicates when data is returned from the LLC. 1743 This is used to control how the LL_CACHE* PMU events count. 1744 Default value is 0 (Disabled). 1745 1746- ``NEOVERSE_Vx_EXTERNAL_LLC``: This flag has the same behaviour as 1747 ``NEOVERSE_Nx_EXTERNAL_LLC`` but for Neoverse-V2. This is disabled 1748 by default. Default value is 0 (Disabled). 1749 1750- ``NEOVERSE_N2_PREFETCHER_DISABLE``: This flag disables the region prefetcher 1751 on the Neoverse N2 core. This is used during performance analysis to get clean 1752 and repeatable measurements of the cache by preventing speculative data fetches 1753 from interfering with benchmark results. 1754 Default value is 0 (Disabled). 1755 1756GIC Errata Workarounds 1757---------------------- 1758- ``GIC600_ERRATA_WA_2384374``: This flag applies part 2 of errata 2384374 1759 workaround for the affected GIC600 and GIC600-AE implementations. It applies 1760 to implementations of GIC600 and GIC600-AE with revisions less than or equal 1761 to r1p6 and r0p2 respectively. If the platform sets GICV3_SUPPORT_GIC600, 1762 then this flag is enabled; otherwise, it is 0 (Disabled). 1763 1764-------------- 1765 1766*Copyright (c) 2014-2026, Arm Limited and Contributors. All rights reserved.* 1767 1768.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715 1769.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639 1770.. _CVE-2022-23960: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2022-23960 1771.. _CVE-2024-5660: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-5660 1772.. _CVE-2024-7881: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-7881 1773.. _Cortex-A72 MPCore Software Developers Errata Notice: https://developer.arm.com/documentation/epm012079/latest 1774.. _Cortex-A57 Software Optimization Guide: https://developer.arm.com/documentation/uan0015 1775.. _Arm DSU Software Developers Errata Notice: https://developer.arm.com/documentation/SDEN854652 1776