1Arm CPU Specific Build Macros 2============================= 3 4This document describes the various build options present in the CPU specific 5operations framework to enable errata workarounds and to enable optimizations 6for a specific CPU on a platform. 7 8Security Vulnerability Workarounds 9---------------------------------- 10 11TF-A exports a series of build flags which control which security 12vulnerability workarounds should be applied at runtime. 13 14- ``WORKAROUND_CVE_2017_5715``: Enables the security workaround for 15 `CVE-2017-5715`_. This flag can be set to 0 by the platform if none 16 of the PEs in the system need the workaround. Setting this flag to 0 provides 17 no performance benefit for non-affected platforms, it just helps to comply 18 with the recommendation in the spec regarding workaround discovery. 19 Defaults to 1. 20 21- ``WORKAROUND_CVE_2018_3639``: Enables the security workaround for 22 `CVE-2018-3639`_. Defaults to 1. The TF-A project recommends to keep 23 the default value of 1 even on platforms that are unaffected by 24 CVE-2018-3639, in order to comply with the recommendation in the spec 25 regarding workaround discovery. 26 27- ``DYNAMIC_WORKAROUND_CVE_2018_3639``: Enables dynamic mitigation for 28 `CVE-2018-3639`_. This build option should be set to 1 if the target 29 platform contains at least 1 CPU that requires dynamic mitigation. 30 Defaults to 0. 31 32- ``WORKAROUND_CVE_2022_23960``: Enables mitigation for `CVE-2022-23960`_. 33 This build option should be set to 1 if the target platform contains at 34 least 1 CPU that requires this mitigation. Defaults to 1. 35 36- ``WORKAROUND_CVE_2024_5660``: Enables mitigation for `CVE-2024-5660`. 37 The fix is to disable hardware page aggregation by setting CPUECTLR_EL1[46] 38 in EL3 FW. This build option should be set to 1 if the target platform contains 39 at least 1 CPU that requires this mitigation. Defaults to 1. 40 41- ``WORKAROUND_CVE_2024_7881``: Enables mitigation for `CVE-2024-7881`. 42 This build option should be set to 1 if the target platform contains at 43 least 1 CPU that requires this mitigation. Defaults to 1. 44 45- ``WORKAROUND_CVE_2025_0647``: Enables mitigation for `CVE-2025-0647`. 46 This build option should be set to 1 if the target platform contains at 47 least 1 CPU that requires this mitigation. Defaults to 1. 48 49.. _arm_cpu_macros_errata_workarounds: 50 51CPU Errata Workarounds 52---------------------- 53 54TF-A exports a series of build flags which control the errata workarounds that 55are applied to each CPU by the reset handler. The errata details can be found 56in the CPU specific errata documents published by Arm: 57For example: `Cortex-A72 MPCore Software Developers Errata Notice`_ 58 59The errata workarounds are implemented for a particular revision or a set of 60processor revisions. This is checked by the reset handler at runtime. Each 61errata workaround is identified by its ``ID`` as specified in the processor's 62errata notice document. The format of the define used to enable/disable the 63errata workaround is ``ERRATA_<Processor name>_<ID>``, where the ``Processor name`` 64is for example ``A57`` for the ``Cortex_A57`` CPU. 65 66Refer to :ref:`firmware_design_cpu_errata_implementation` for information on how to 67write errata workaround functions. 68 69All workarounds are disabled by default. The platform is responsible for 70enabling these workarounds according to its requirement by defining the 71errata workaround build flags in the platform specific makefile. In case 72these workarounds are enabled for the wrong CPU revision then the errata 73workaround is not applied. In the DEBUG build, this is indicated by 74printing a warning to the crash console. 75 76In the current implementation, a platform which has more than 1 variant 77with different revisions of a processor has no runtime mechanism available 78for it to specify which errata workarounds should be enabled or not. 79 80The value of the build flags is 0 by default, that is, disabled. A value of 1 81will enable it. 82 83For Cortex-A9, the following errata build flags are defined : 84 85- ``ERRATA_A9_794073``: This applies errata 794073 workaround to Cortex-A9 86 CPU. This needs to be enabled for all revisions of the CPU. 87 88For Cortex-A15, the following errata build flags are defined : 89 90- ``ERRATA_A15_816470``: This applies errata 816470 workaround to Cortex-A15 91 CPU. This needs to be enabled only for revision >= r3p0 of the CPU. 92 93- ``ERRATA_A15_827671``: This applies errata 827671 workaround to Cortex-A15 94 CPU. This needs to be enabled only for revision >= r3p0 of the CPU. 95 96For Cortex-A17, the following errata build flags are defined : 97 98- ``ERRATA_A17_852421``: This applies errata 852421 workaround to Cortex-A17 99 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 100 101- ``ERRATA_A17_852423``: This applies errata 852423 workaround to Cortex-A17 102 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 103 104For Cortex-A35, the following errata build flags are defined : 105 106- ``ERRATA_A35_855472``: This applies errata 855472 workaround to Cortex-A35 107 CPUs. This needs to be enabled only for revision r0p0 of Cortex-A35. 108 109For Cortex-A53, the following errata build flags are defined : 110 111- ``ERRATA_A53_819472``: This applies errata 819472 workaround to all 112 CPUs. This needs to be enabled only for revision <= r0p1 of Cortex-A53. 113 114- ``ERRATA_A53_824069``: This applies errata 824069 workaround to all 115 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53. 116 117- ``ERRATA_A53_826319``: This applies errata 826319 workaround to Cortex-A53 118 CPU. This needs to be enabled only for revision <= r0p2 of the CPU. 119 120- ``ERRATA_A53_827319``: This applies errata 827319 workaround to all 121 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53. 122 123- ``ERRATA_A53_835769``: This applies erratum 835769 workaround at compile and 124 link time to Cortex-A53 CPU. This needs to be enabled for some variants of 125 revision <= r0p4. This workaround can lead the linker to create ``*.stub`` 126 sections. 127 128- ``ERRATA_A53_836870``: This applies errata 836870 workaround to Cortex-A53 129 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From 130 r0p4 and onwards, this errata is enabled by default in hardware. Identical to 131 ``A53_DISABLE_NON_TEMPORAL_HINT``. 132 133- ``ERRATA_A53_843419``: This applies erratum 843419 workaround at link time 134 to Cortex-A53 CPU. This needs to be enabled for some variants of revision 135 <= r0p4. This workaround can lead the linker to emit ``*.stub`` sections 136 which are 4kB aligned. 137 138- ``ERRATA_A53_855873``: This applies errata 855873 workaround to Cortex-A53 139 CPUs. Though the erratum is present in every revision of the CPU, 140 this workaround is only applied to CPUs from r0p3 onwards, which feature 141 a chicken bit in CPUACTLR_EL1 to enable a hardware workaround. 142 Earlier revisions of the CPU have other errata which require the same 143 workaround in software, so they should be covered anyway. 144 145- ``ERRATA_A53_1530924``: This applies errata 1530924 workaround to all 146 revisions of Cortex-A53 CPU. 147 148For Cortex-A55, the following errata build flags are defined : 149 150- ``ERRATA_A55_768277``: This applies errata 768277 workaround to Cortex-A55 151 CPU. This needs to be enabled only for revision r0p0 of the CPU. 152 153- ``ERRATA_A55_778703``: This applies errata 778703 workaround to Cortex-A55 154 CPU. This needs to be enabled only for revision r0p0 of the CPU. 155 156- ``ERRATA_A55_798797``: This applies errata 798797 workaround to Cortex-A55 157 CPU. This needs to be enabled only for revision r0p0 of the CPU. 158 159- ``ERRATA_A55_846532``: This applies errata 846532 workaround to Cortex-A55 160 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 161 162- ``ERRATA_A55_903758``: This applies errata 903758 workaround to Cortex-A55 163 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 164 165- ``ERRATA_A55_1221012``: This applies errata 1221012 workaround to Cortex-A55 166 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 167 168- ``ERRATA_A55_1530923``: This applies errata 1530923 workaround to all 169 revisions of Cortex-A55 CPU. 170 171For Cortex-A57, the following errata build flags are defined : 172 173- ``ERRATA_A57_806969``: This applies errata 806969 workaround to Cortex-A57 174 CPU. This needs to be enabled only for revision r0p0 of the CPU. 175 176- ``ERRATA_A57_813419``: This applies errata 813419 workaround to Cortex-A57 177 CPU. This needs to be enabled only for revision r0p0 of the CPU. 178 179- ``ERRATA_A57_813420``: This applies errata 813420 workaround to Cortex-A57 180 CPU. This needs to be enabled only for revision r0p0 of the CPU. 181 182- ``ERRATA_A57_814670``: This applies errata 814670 workaround to Cortex-A57 183 CPU. This needs to be enabled only for revision r0p0 of the CPU. 184 185- ``ERRATA_A57_817169``: This applies errata 817169 workaround to Cortex-A57 186 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 187 188- ``ERRATA_A57_826974``: This applies errata 826974 workaround to Cortex-A57 189 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 190 191- ``ERRATA_A57_826977``: This applies errata 826977 workaround to Cortex-A57 192 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 193 194- ``ERRATA_A57_828024``: This applies errata 828024 workaround to Cortex-A57 195 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 196 197- ``ERRATA_A57_829520``: This applies errata 829520 workaround to Cortex-A57 198 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 199 200- ``ERRATA_A57_833471``: This applies errata 833471 workaround to Cortex-A57 201 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 202 203- ``ERRATA_A57_859972``: This applies errata 859972 workaround to Cortex-A57 204 CPU. This needs to be enabled only for revision <= r1p3 of the CPU. 205 206- ``ERRATA_A57_1319537``: This applies errata 1319537 workaround to all 207 revisions of Cortex-A57 CPU. 208 209For Cortex-A65, the following errata build flags are defined : 210 211- ``ERRATA_A65_1179935``: This applies errata 1179935 workaround to Cortex-A65 212 CPU. This needs to be enabled only for revision r0p0 of the CPU, and is fixed 213 in r1p0. 214 215- ``ERRATA_A65_1227419``: This applies errata 1227419 workaround to Cortex-A65 216 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU and 217 is fixed in r1p1. 218 219- ``ERRATA_A65_1541130``: This applies errata 1541130 workaround to r0p0, r1p0, 220 r1p1, r1p2 revisions of the CPU and is still open. 221 222For Cortex-A65AE, the following errata build flags are defined : 223 224- ``ERRATA_A65AE_1638571``: This applies errata 1638571 workaround to Cortex-A65AE 225 CPU. This needs to be enabled r0p0, r1p0, r1p1 revisions of the CPU and is still 226 open. 227 228For Cortex-A72, the following errata build flags are defined : 229 230- ``ERRATA_A72_859971``: This applies errata 859971 workaround to Cortex-A72 231 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. 232 233- ``ERRATA_A72_1319367``: This applies errata 1319367 workaround to all 234 revisions of Cortex-A72 CPU. 235 236For Cortex-A73, the following errata build flags are defined : 237 238- ``ERRATA_A73_852427``: This applies errata 852427 workaround to Cortex-A73 239 CPU. This needs to be enabled only for revision r0p0 of the CPU. 240 241- ``ERRATA_A73_855423``: This applies errata 855423 workaround to Cortex-A73 242 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 243 244For Cortex-A75, the following errata build flags are defined : 245 246- ``ERRATA_A75_764081``: This applies errata 764081 workaround to Cortex-A75 247 CPU. This needs to be enabled only for revision r0p0 of the CPU. 248 249- ``ERRATA_A75_790748``: This applies errata 790748 workaround to Cortex-A75 250 CPU. This needs to be enabled only for revision r0p0 of the CPU. 251 252For Cortex-A76, the following errata build flags are defined : 253 254- ``ERRATA_A76_1073348``: This applies errata 1073348 workaround to Cortex-A76 255 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 256 257- ``ERRATA_A76_1130799``: This applies errata 1130799 workaround to Cortex-A76 258 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 259 260- ``ERRATA_A76_1165347``: This applies errata 1165347 workaround to Cortex-A76 261 CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU. 262 It is fixed in r3p0. 263 264- ``ERRATA_A76_1165522``: This applies errata 1165522 workaround to all 265 revisions of Cortex-A76 CPU. This errata is fixed in r3p0 but due to 266 limitation of errata framework this errata is applied to all revisions 267 of Cortex-A76 CPU. 268 269- ``ERRATA_A76_1207823``: This applies errata 1207823 workaround to Cortex-A76 270 CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU. 271 It is fixed in r3p0. 272 273- ``ERRATA_A76_1220197``: This applies errata 1220197 workaround to Cortex-A76 274 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 275 276- ``ERRATA_A76_1257314``: This applies errata 1257314 workaround to Cortex-A76 277 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 278 279- ``ERRATA_A76_1262606``: This applies errata 1262606 workaround to Cortex-A76 280 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 281 282- ``ERRATA_A76_1262888``: This applies errata 1262888 workaround to Cortex-A76 283 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 284 285- ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76 286 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 287 288- ``ERRATA_A76_1791580``: This applies errata 1791580 workaround to Cortex-A76 289 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 290 291- ``ERRATA_A76_1868343``: This applies errata 1868343 workaround to Cortex-A76 292 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 293 294- ``ERRATA_A76_1946160``: This applies errata 1946160 workaround to Cortex-A76 295 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0, 296 and r4p1 of the CPU. It is still open. 297 298- ``ERRATA_A76_2356586``: This applies erratum 2356586 workaround to Cortex-A76 299 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0, 300 r4p1 of the CPU. It is still open. 301 302- ``ERRATA_A76_2743102``: This applies errata 2743102 workaround to Cortex-A76 303 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 304 still open. 305 306- ``ERRATA_A76_3888013``: This applies erratum 3888013 workaround to Cortex-A76 307 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0, 308 r4p1 of the CPU. It is still open. 309 310For Cortex-A76AE, the following errata build flags are defined : 311 312- ``ERRATA_A76AE_1931427``: This applies errata 1931427 workaround to Cortex-A76AE 313 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 314 fixed in r1p1. 315 316- ``ERRATA_A76AE_1931435``: This applies errata 1931435 workaround to Cortex-A76AE 317 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 318 fixed in r1p1. 319 320- ``ERRATA_A76AE_1969401``: This applies errata 1969401 workaround to Cortex-A76AE 321 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 322 fixed in r1p1. 323 324- ``ERRATA_A76AE_2371140``: This applies errata 2371140 workaround to Cortex-A76AE 325 CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is 326 still open. 327 328- ``ERRATA_A76AE_2753838``: This applies errata 2753838 workaround to Cortex-A76AE 329 CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is 330 still open. 331 332- ``ERRATA_A76AE_3888014``: This applies erratum 3888014 workaround to 333 Cortex-A76AE CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 of the 334 CPU. It is still open. 335 336For Cortex-A77, the following errata build flags are defined : 337 338- ``ERRATA_A77_1508412``: This applies errata 1508412 workaround to Cortex-A77 339 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 340 341- ``ERRATA_A77_1925769``: This applies errata 1925769 workaround to Cortex-A77 342 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 343 344- ``ERRATA_A77_1946167``: This applies errata 1946167 workaround to Cortex-A77 345 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 346 347- ``ERRATA_A77_1791578``: This applies errata 1791578 workaround to Cortex-A77 348 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 349 350- ``ERRATA_A77_2356587``: This applies errata 2356587 workaround to Cortex-A77 351 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 352 353 - ``ERRATA_A77_1800714``: This applies errata 1800714 workaround to Cortex-A77 354 CPU. This needs to be enabled for revisions <= r1p1 of the CPU. 355 356 - ``ERRATA_A77_2743100``: This applies errata 2743100 workaround to Cortex-A77 357 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 358 359For Cortex-A78, the following errata build flags are defined : 360 361- ``ERRATA_A78_1467580``: This applies erratum 1467580 workaround to Cortex-A78 362 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 363 in r1p0. 364 365- ``ERRATA_A78_1479939``: This applies erratum 1479939 workaround to Cortex-A78 366 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 367 in r1p0. 368 369- ``ERRATA_A78_1492189``: This applies erratum 1492189 workaround to Cortex-A78 370 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 371 in r1p0. 372 373- ``ERRATA_A78_1503072``: This applies erratum 1503072 workaround to Cortex-A78 374 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 375 in r1p0. 376 377- ``ERRATA_A78_1515634``: This applies erratum 1515634 workaround to Cortex-A78 378 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 379 in r1p0. 380 381- ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78 382 CPU. This needs to be enabled only for revision r0p0 - r1p0 of the CPU. 383 384- ``ERRATA_A78_1827429``: This applies erratum 1827429 workaround to Cortex-A78 385 CPU. This needs to be enabled for revisions r0p0, r1p0 of the CPU. It is fixed 386 in r1p1. 387 388- ``ERRATA_A78_1941498``: This applies errata 1941498 workaround to Cortex-A78 389 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the CPU. 390 391- ``ERRATA_A78_1951500``: This applies errata 1951500 workaround to Cortex-A78 392 CPU. This needs to be enabled for revisions r1p0 and r1p1, r0p0 has the same 393 issue but there is no workaround for that revision. 394 395- ``ERRATA_A78_1821534``: This applies errata 1821534 workaround to Cortex-A78 396 CPU. This needs to be enabled for revisions r0p0 and r1p0. 397 398- ``ERRATA_A78_1952683``: This applies errata 1952683 workaround to Cortex-A78 399 CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0. 400 401- ``ERRATA_A78_2242635``: This applies errata 2242635 workaround to Cortex-A78 402 CPU. This needs to be enabled for revisions r1p0, r1p1, and r1p2. The issue 403 is present in r0p0 but there is no workaround. It is still open. 404 405- ``ERRATA_A78_2376745``: This applies errata 2376745 workaround to Cortex-A78 406 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 407 it is still open. 408 409- ``ERRATA_A78_2395406``: This applies errata 2395406 workaround to Cortex-A78 410 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 411 it is still open. 412 413- ``ERRATA_A78_2712571``: This applies erratum 2712571 workaround to Cortex-A78 414 CPU, this erratum affects system configurations that do not use an ARM 415 interconnect IP. This needs to be enabled for revisions r0p0, r1p0, r1p1 416 and r1p2 and it is still open. 417 418- ``ERRATA_A78_2742426``: This applies erratum 2742426 workaround to Cortex-A78 419 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and 420 it is still open. 421 422- ``ERRATA_A78_2772019``: This applies errata 2772019 workaround to Cortex-A78 423 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 424 it is still open. 425 426- ``ERRATA_A78_2779479``: This applies erratum 2779479 workaround to Cortex-A78 427 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and 428 it is still open. 429 430- ``ERRATA_A78_3888017``: This applies erratum 3888017 workaround to Cortex-A78 431 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the CPU. 432 It is still open. 433 434- ``ERRATA_A78_4302972``: This applies erratum 4302972 workaround to Cortex-A78 435 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the CPU. 436 It is still open. 437 438For Cortex-A78AE, the following errata build flags are defined : 439 440- ``ERRATA_A78_AE_1941500`` : This applies errata 1941500 workaround to 441 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. 442 This erratum is still open. 443 444- ``ERRATA_A78_AE_1951502`` : This applies errata 1951502 workaround to 445 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This 446 erratum is still open. 447 448- ``ERRATA_A78_AE_2376748`` : This applies errata 2376748 workaround to 449 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 450 This erratum is still open. 451 452- ``ERRATA_A78_AE_2395408`` : This applies errata 2395408 workaround to 453 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This 454 erratum is still open. 455 456- ``ERRATA_A78_AE_2712574`` : This applies erratum 2712574 workaround to 457 Cortex-A78AE CPU. This erratum affects system configurations that do not use 458 an ARM interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and 459 r0p2. This erratum is still open. 460 461For Cortex-A78C, the following errata build flags are defined : 462 463- ``ERRATA_A78C_1827430`` : This applies errata 1827430 workaround to 464 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is 465 fixed in r0p1. 466 467- ``ERRATA_A78C_1827440`` : This applies errata 1827440 workaround to 468 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is 469 fixed in r0p1. 470 471- ``ERRATA_A78C_2242638`` : This applies errata 2242638 workaround to 472 Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and 473 it is still open. 474 475- ``ERRATA_A78C_2376749`` : This applies errata 2376749 workaround to 476 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 477 erratum is still open. 478 479- ``ERRATA_A78C_2395411`` : This applies errata 2395411 workaround to 480 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 481 erratum is still open. 482 483- ``ERRATA_A78C_2683027`` : This applies errata 2683027 workaround to 484 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 485 erratum is still open. 486 487- ``ERRATA_A78C_2712575`` : This applies erratum 2712575 workaround to 488 Cortex-A78C CPU, this erratum affects system configurations that do not use 489 an ARM interconnect IP. This needs to be enabled for revisions r0p1 and r0p2 490 and is still open. 491 492- ``ERRATA_A78C_2743232`` : This applies erratum 2743232 workaround to 493 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. 494 This erratum is still open. 495 496- ``ERRATA_A78C_2772121`` : This applies errata 2772121 workaround to 497 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 498 This erratum is still open. 499 500- ``ERRATA_A78C_2779484`` : This applies errata 2779484 workaround to 501 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. 502 This erratum is still open. 503 504For Cortex-X1 CPU, the following errata build flags are defined: 505 506- ``ERRATA_X1_1821534`` : This applies errata 1821534 workaround to Cortex-X1 507 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 508 509- ``ERRATA_X1_1688305`` : This applies errata 1688305 workaround to Cortex-X1 510 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 511 512- ``ERRATA_X1_1827429`` : This applies errata 1827429 workaround to Cortex-X1 513 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 514 515For Neoverse N1, the following errata build flags are defined : 516 517- ``ERRATA_N1_925373``: This applies erratum 925373 workaround to Neoverse N1 518 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed in r1p0. 519 520- ``ERRATA_N1_1073348``: This applies errata 1073348 workaround to Neoverse-N1 521 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU. 522 523- ``ERRATA_N1_1130799``: This applies errata 1130799 workaround to Neoverse-N1 524 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 525 526- ``ERRATA_N1_1165347``: This applies errata 1165347 workaround to Neoverse-N1 527 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 528 529- ``ERRATA_N1_1207823``: This applies errata 1207823 workaround to Neoverse-N1 530 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 531 532- ``ERRATA_N1_1220197``: This applies errata 1220197 workaround to Neoverse-N1 533 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 534 535- ``ERRATA_N1_1257314``: This applies errata 1257314 workaround to Neoverse-N1 536 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 537 538- ``ERRATA_N1_1262606``: This applies errata 1262606 workaround to Neoverse-N1 539 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 540 541- ``ERRATA_N1_1262888``: This applies errata 1262888 workaround to Neoverse-N1 542 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 543 544- ``ERRATA_N1_1275112``: This applies errata 1275112 workaround to Neoverse-N1 545 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 546 547- ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1 548 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 549 550- ``ERRATA_N1_1542419``: This applies errata 1542419 workaround to Neoverse-N1 551 CPU. This needs to be enabled only for revisions r3p0 - r4p0 of the CPU. 552 553- ``ERRATA_N1_1791580``: This applies erratum 1791580 workaround to Neoverse N1 554 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0 555 of the CPU. It is fixed in r4p1. 556 557- ``ERRATA_N1_1868343``: This applies errata 1868343 workaround to Neoverse-N1 558 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 559 560- ``ERRATA_N1_1946160``: This applies errata 1946160 workaround to Neoverse-N1 561 CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for 562 revisions r0p0, r1p0, and r2p0 there is no workaround. 563 564- ``ERRATA_N1_2743102``: This applies errata 2743102 workaround to Neoverse-N1 565 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 566 still open. 567 568- ``ERRATA_N1_3324349``: This applies errata 3324349 workaround to Neoverse-N1 569 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 570 still open. 571 572- ``ERRATA_N1_3888013``: This applies erratum 3888013 workaround to Neoverse N1 573 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0, 574 r4p1 of the CPU. It is still open. 575 576For Neoverse V1, the following errata build flags are defined : 577 578- ``ERRATA_V1_1542436``: This applies erratum 1542436 workaround to Neoverse V1 579 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 580 in r1p0. 581 582- ``ERRATA_V1_1618634``: This applies erratum 1618634 workaround to Neoverse V1 583 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 584 in r1p0. 585 586- ``ERRATA_V1_1618635``: This applies errata 1618635 workaround to Neoverse-V1 587 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 588 r1p0. 589 590- ``ERRATA_V1_1618636``: This applies erratum 1618636 workaround to Neoverse V1 591 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 592 in r1p0. 593 594- ``ERRATA_V1_1619807``: This applies erratum 1619807 workaround to Neoverse V1 595 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 596 in r1p0. 597 598- ``ERRATA_V1_1654562``: This applies erratum 1654562 workaround to Neoverse V1 599 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 600 in r1p0. 601 602- ``ERRATA_V1_1674403``: This applies erratum 1674403 workaround to Neoverse V1 603 CPU. This needs to be enabled for revision r0p0 of the CPU. It is fixed 604 in r1p0. 605 606- ``ERRATA_V1_1774420``: This applies errata 1774420 workaround to Neoverse-V1 607 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 608 in r1p1. 609 610- ``ERRATA_V1_1791573``: This applies errata 1791573 workaround to Neoverse-V1 611 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 612 in r1p1. 613 614- ``ERRATA_V1_1852267``: This applies errata 1852267 workaround to Neoverse-V1 615 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 616 in r1p1. 617 618- ``ERRATA_V1_1925756``: This applies errata 1925756 workaround to Neoverse-V1 619 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 620 621- ``ERRATA_V1_1940577``: This applies errata 1940577 workaround to Neoverse-V1 622 CPU. This needs to be enabled only for revision r1p0 and r1p1 of the 623 CPU. 624 625- ``ERRATA_V1_1966096``: This applies errata 1966096 workaround to Neoverse-V1 626 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the 627 issue is present in r0p0 as well but there is no workaround for that 628 revision. It is still open. 629 630- ``ERRATA_V1_2139242``: This applies errata 2139242 workaround to Neoverse-V1 631 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the 632 CPU. It is still open. 633 634- ``ERRATA_V1_2216392``: This applies errata 2216392 workaround to Neoverse-V1 635 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the 636 issue is present in r0p0 as well but there is no workaround for that 637 revision. It is still open. 638 639- ``ERRATA_V1_2294912``: This applies errata 2294912 workaround to Neoverse-V1 640 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 and r1p2 of 641 the CPU. 642 643- ``ERRATA_V1_2348377``: This applies errata 2348377 workaroud to Neoverse-V1 644 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU. 645 It has been fixed in r1p2. 646 647- ``ERRATA_V1_2372203``: This applies errata 2372203 workaround to Neoverse-V1 648 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU. 649 It is still open. 650 651- ``ERRATA_V1_2701953``: This applies erratum 2701953 workaround to Neoverse-V1 652 CPU, this erratum affects system configurations that do not use an ARM 653 interconnect IP. This needs to be enabled for revisions r0p0, r1p0 and r1p1. 654 It has been fixed in r1p2. 655 656- ``ERRATA_V1_2743093``: This applies errata 2743093 workaround to Neoverse-V1 657 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 of the 658 CPU. It is still open. 659 660- ``ERRATA_V1_2743233``: This applies erratum 2743233 workaround to Neoverse-V1 661 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2 of the 662 CPU. It is still open. 663 664- ``ERRATA_V1_2779461``: This applies erratum 2779461 workaround to Neoverse-V1 665 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the 666 CPU. It is still open. 667 668- ``ERRATA_V1_3888016``: This applies erratum 3888016 workaround to Neoverse V1 669 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the CPU. 670 It is still open. 671 672For Neoverse V2, the following errata build flags are defined : 673 674- ``ERRATA_V2_2618597``: This applies errata 2618597 workaround to Neoverse-V2 675 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 676 r0p2. 677 678- ``ERRATA_V2_2662553``: This applies errata 2662553 workaround to Neoverse-V2 679 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 680 r0p2. 681 682- ``ERRATA_V2_2719103``: This applies errata 2719103 workaround to Neoverse-V2 683 CPU, this affects system configurations that do not use and ARM interconnect 684 IP. This needs to be enabled for revisions r0p0 and r0p1. It has been fixed 685 in r0p2. 686 687- ``ERRATA_V2_2719105``: This applies errata 2719105 workaround to Neoverse-V2 688 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 689 r0p2. 690 691- ``ERRATA_V2_2743011``: This applies errata 2743011 workaround to Neoverse-V2 692 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 693 r0p2. 694 695- ``ERRATA_V2_2779510``: This applies errata 2779510 workaround to Neoverse-V2 696 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 697 r0p2. 698 699- ``ERRATA_V2_2801372``: This applies errata 2801372 workaround to Neoverse-V2 700 CPU, this affects all configurations. This needs to be enabled for revisions 701 r0p0 and r0p1. It has been fixed in r0p2. 702 703- ``ERRATA_V2_3442699``: This applies errata 3442699 workaround to Neoverse-V2 704 CPU. This needs to be enabled for revision r0p0 - r0p2 and is still open. 705 706- ``ERRATA_V2_3701771``: This applies errata 3701771 workaround to Neoverse-V2 707 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 and is 708 still open. 709 710- ``ERRATA_V2_3841324``: This applies errata 3841324 workaround to Neoverse-V2 711 CPU. This needs to be enabled only for revisions r0p0 and r0p1 of 712 the CPU. It is fixed in r0p2. 713 714- ``ERRATA_V2_3888126``: This applies errata 3888126 workaround to Neoverse-V2 715 CPU. This needs to be enabled only for revisions r0p0, r0p1, r0p2 of 716 the CPU. It is still open. 717 718- ``ERRATA_V2_4302968``: This applies errata 4302968 workaround to Neoverse-V2 719 CPU. This needs to be enabled only for revisions r0p0, r0p1, r0p2 of 720 the CPU. It is still open. 721 722For Neoverse V3, the following errata build flags are defined : 723 724- ``ERRATA_V3_2970647``: This applies errata 2970647 workaround to Neoverse-V3 725 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 726 727- ``ERRATA_V3_3312417``: This applies errata 3312417 workaround to Neoverse-V3 728 CPU. This needs to be enabled for revisions r0p0 and r0p1 of the CPU and is 729 fixed in r0p2. 730 731- ``ERRATA_V3_3696307``: This applies errata 3696307 workaround to Neoverse-V3 732 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 733 r0p2. 734 735- ``ERRATA_V3_3701767``: This applies errata 3701767 workaround to Neoverse-V3 736 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the CPU and 737 is still open. 738 739- ``ERRATA_V3_3734562``: This applies errata 3734562 workaround to Neoverse-V3 740 CPU. This needs to be enabled for revisions r0p0 and r0p1 of the CPU and 741 is fixed in r0p2. 742 743- ``ERRATA_V3_3782181``: This applies errata 3782181 workaround to Neoverse-V3 744 CPU. This needs to be enabled for revision r0p1 of the CPU and is fixed in 745 r0p2. 746 747- ``ERRATA_V3_3864536``: This applies errata 3864536 workaround to Neoverse-V3 748 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU and 749 is still open. 750 751- ``ERRATA_V3_3878291``: This applies errata 3878291 workaround to Neoverse-V3 752 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU and 753 is still open. 754 755For Cortex-A710, the following errata build flags are defined : 756 757- ``ERRATA_A710_1785648``: This applies erratum 1785648 workaround to 758 Cortex-A710 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 759 fixed in r1p0. 760 761- ``ERRATA_A710_1793423``: This applies erratum 1793423 workaround to 762 Cortex-A710 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 763 fixed in r1p0. 764 765- ``ERRATA_A710_1847092``: This applies erratum 1847092 workaround to 766 Cortex-A710 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 767 fixed in r1p0. 768 769- ``ERRATA_A710_1887102``: This applies erratum 1887102 workaround to 770 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 of the CPU. 771 It is fixed in r2p0. 772 773- ``ERRATA_A710_1901946``: This applies errata 1901946 workaround to 774 Cortex-A710 CPU. This needs to be enabled only for revision r1p0. It has 775 been fixed in r2p0. 776 777- ``ERRATA_A710_1916945``: This applies errata 1916945 workaround to 778 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 779 It has been fixed in r2p0. 780 781- ``ERRATA_A710_1917258``: This applies errata 1917258 workaround to 782 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 783 It has been fixed in r2p0. 784 785- ``ERRATA_A710_1927200``: This applies errata 1927200 workaround to 786 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 787 It has been fixed in r2p0. 788 789- ``ERRATA_A710_1987031``: This applies errata 1987031 workaround to 790 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 791 r2p0 of the CPU. It is still open. 792 793- ``ERRATA_A710_2081180``: This applies errata 2081180 workaround to 794 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 795 r2p0 of the CPU. It is still open. 796 797- ``ERRATA_A710_2055002``: This applies errata 2055002 workaround to 798 Cortex-A710 CPU. This needs to be enabled for revisions r1p0, r2p0 of the CPU 799 and is still open. 800 801- ``ERRATA_A710_2017096``: This applies errata 2017096 workaround to 802 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 803 of the CPU and is still open. 804 805- ``ERRATA_A710_2083908``: This applies errata 2083908 workaround to 806 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU and 807 is still open. 808 809- ``ERRATA_A710_2267065``: This applies errata 2267065 workaround to 810 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 811 of the CPU and is fixed in r2p1. 812 813- ``ERRATA_A710_2136059``: This applies errata 2136059 workaround to 814 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 815 of the CPU and is fixed in r2p1. 816 817- ``ERRATA_A710_2147715``: This applies errata 2147715 workaround to 818 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU 819 and is fixed in r2p1. 820 821- ``ERRATA_A710_2216384``: This applies errata 2216384 workaround to 822 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 823 of the CPU and is fixed in r2p1. 824 825- ``ERRATA_A710_2282622``: This applies errata 2282622 workaround to 826 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 827 r2p1 of the CPU and is still open. 828 829- ``ERRATA_A710_2291219``: This applies errata 2291219 workaround to 830 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 831 of the CPU and is fixed in r2p1. 832 833- ``ERRATA_A710_2008768``: This applies errata 2008768 workaround to 834 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 835 of the CPU and is fixed in r2p1. 836 837- ``ERRATA_A710_2371105``: This applies errata 2371105 workaround to 838 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 839 of the CPU and is fixed in r2p1. 840 841- ``ERRATA_A710_2701952``: This applies erratum 2701952 workaround to Cortex-A710 842 CPU, and applies to system configurations that do not use and ARM 843 interconnect IP. This needs to be enabled for r0p0, r1p0, r2p0 and r2p1 and 844 is still open. 845 846- ``ERRATA_A710_2742423``: This applies errata 2742423 workaround to 847 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 848 r2p1 of the CPU and is still open. 849 850- ``ERRATA_A710_2768515``: This applies errata 2768515 workaround to 851 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 852 r2p1 of the CPU and is still open. 853 854- ``ERRATA_A710_2778471``: This applies errata 2778471 workaround to Cortex-A710 855 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 856 CPU and is still open. 857 858- ``ERRATA_A710_3324338``: This applies errata 3324338 workaround to 859 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 860 r2p1 of the CPU and is still open. 861 862- ``ERRATA_A710_3701772``: This applies errata 3701772 workaround to Cortex-A710 863 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 of the 864 CPU and is still open. 865 866- ``ERRATA_A710_3888122``: This applies erratum 3888122 workaround to 867 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 868 of the CPU. It is still open. 869 870- ``ERRATA_A710_4302969``: This applies erratum 4302969 workaround to 871 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 872 of the CPU. It is still open. 873 874For Neoverse N2, the following errata build flags are defined : 875 876- ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2 877 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 878 879- ``ERRATA_N2_2009478``: This applies errata 2009478 workaround to Neoverse-N2 880 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 881 882- ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2 883 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 884 885- ``ERRATA_N2_2025414``: This applies errata 2025414 workaround to Neoverse-N2 886 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 887 888- ``ERRATA_N2_2138953``: This applies errata 2138953 workaround to Neoverse-N2 889 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3 of the 890 Neoverse N2 cpu and is still open. 891 892- ``ERRATA_N2_2138956``: This applies errata 2138956 workaround to Neoverse-N2 893 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 894 895- ``ERRATA_N2_2138958``: This applies errata 2138958 workaround to Neoverse-N2 896 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 897 898- ``ERRATA_N2_2189731``: This applies errata 2189731 workaround to Neoverse-N2 899 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 900 901- ``ERRATA_N2_2242400``: This applies errata 2242400 workaround to Neoverse-N2 902 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 903 904- ``ERRATA_N2_2242415``: This applies errata 2242415 workaround to Neoverse-N2 905 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 906 907- ``ERRATA_N2_2280757``: This applies errata 2280757 workaround to Neoverse-N2 908 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 909 910- ``ERRATA_N2_2326639``: This applies errata 2326639 workaround to Neoverse-N2 911 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 912 r0p1. 913 914- ``ERRATA_N2_2340933``: This applies errata 2340933 workaround to Neoverse-N2 915 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 916 r0p1. 917 918- ``ERRATA_N2_2346952``: This applies errata 2346952 workaround to Neoverse-N2 919 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU, 920 it is fixed in r0p3. 921 922- ``ERRATA_N2_2376738``: This applies errata 2376738 workaround to Neoverse-N2 923 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open. 924 925- ``ERRATA_N2_2388450``: This applies errata 2388450 workaround to Neoverse-N2 926 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 927 r0p1. 928 929- ``ERRATA_N2_2743014``: This applies errata 2743014 workaround to Neoverse-N2 930 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 931 in r0p3. 932 933- ``ERRATA_N2_2743089``: This applies errata 2743089 workaround to Neoverse-N2 934 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 935 in r0p3. 936 937- ``ERRATA_N2_2728475``: This applies erratum 2728475 workaround to Neoverse-N2 938 CPU, this erratum affects system configurations that do not use and ARM 939 interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 940 It is fixed in r0p3. 941 942- ``ERRATA_N2_2779511``: This applies errata 2779511 workaround to Neoverse-N2 943 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 944 in r0p3. 945 946- ``ERRATA_N2_3324339``: This applies errata 3324339 workaround to Neoverse-N2 947 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 948 still open. 949 950- ``ERRATA_N2_3701773``: This applies errata 3701773 workaround to Neoverse-N2 951 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 952 still open. 953 954- ``ERRATA_N2_3888123``: This applies errata 3888123 workaround to Neoverse-N2 955 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 956 still open. 957 958- ``ERRATA_N2_4302970``: This applies errata 4302970 workaround to Neoverse-N2 959 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 960 still open. 961 962For Neoverse N3, the following errata build flags are defined : 963 964- ``ERRATA_N3_3456111``: This applies errata 3456111 workaround to Neoverse-N3 965 CPU. This needs to be enabled for revisions r0p0 and r0p1 and is still open. 966 967- ``ERRATA_N3_3699563``: This applies errata 3699563 workaround to Neoverse-N3 968 CPU. This needs to be enabled for revisions r0p0 and is still open. 969 970For Cortex-X2, the following errata build flags are defined : 971 972- ``ERRATA_X2_1901946``: This applies errata 1901946 workaround to Cortex-X2 973 CPU. This needs to be enabled only for r1p0, it is fixed in r2p0. 974 975- ``ERRATA_X2_1916945``: This applies errata 1916945 workaround to Cortex-X2 976 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 977 is fixed in r2p0. 978 979- ``ERRATA_X2_1917258``: This applies errata 1917258 workaround to Cortex-X2 980 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 981 is fixed in r2p0. 982 983- ``ERRATA_X2_1927200``: This applies errata 1927200 workaround to Cortex-X2 984 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 985 is fixed in r2p0. 986 987- ``ERRATA_X2_1934260``: This applies errata 1934260 workaround to Cortex-X2 988 CPU. This needs to be enabled only for revision r1p0 of the CPU, it is fixed 989 in r2p0. 990 991- ``ERRATA_X2_2002765``: This applies errata 2002765 workaround to Cortex-X2 992 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 993 CPU, it is fixed in r2p1. 994 995- ``ERRATA_X2_2017096``: This applies errata 2017096 workaround to Cortex-X2 996 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 997 CPU, it is fixed in r2p1. 998 999- ``ERRATA_X2_2081180``: This applies errata 2081180 workaround to Cortex-X2 1000 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1001 CPU, it is fixed in r2p1. 1002 1003- ``ERRATA_X2_2083908``: This applies errata 2083908 workaround to Cortex-X2 1004 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed 1005 in r2p1. 1006 1007- ``ERRATA_X2_2136059``: This applies errata 2136059 workaround to Cortex-X2 1008 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1009 CPU, it is fixed in r2p1. 1010 1011- ``ERRATA_X2_2147715``: This applies errata 2147715 workaround to Cortex-X2 1012 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed 1013 in r2p1. 1014 1015- ``ERRATA_X2_2216384``: This applies errata 2216384 workaround to Cortex-X2 1016 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1017 CPU, it is fixed in r2p1. 1018 1019- ``ERRATA_X2_2267065``: This applies errata 2267065 workaround to Cortex-X2 1020 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1021 CPU, it is fixed in r2p1. 1022 1023- ``ERRATA_X2_2282622``: This applies errata 2282622 workaround to Cortex-X2 1024 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1025 CPU and is still open. 1026 1027- ``ERRATA_X2_2291219``: This applies errata 2291219 workaround to Cortex-X2 1028 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1029 CPU, it is fixed in r2p1. 1030 1031- ``ERRATA_X2_2371105``: This applies errata 2371105 workaround to Cortex-X2 1032 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 1033 CPU, it is fixed in r2p1. 1034 1035- ``ERRATA_X2_2701952``: This applies errata 2701952 workaround to Cortex-X2 1036 CPU and affects system configurations that do not use an Arm interconnect IP. 1037 This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 and is 1038 still open. 1039 1040- ``ERRATA_X2_2742423``: This applies errata 2742423 workaround to Cortex-X2 1041 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1042 CPU and is still open. 1043 1044- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to Cortex-X2 1045 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1046 CPU and is still open. 1047 1048- ``ERRATA_X2_2778471``: This applies errata 2778471 workaround to Cortex-X2 1049 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1050 CPU and is still open. 1051 1052- ``ERRATA_X2_3324338``: This applies errata 3324338 workaround to Cortex-X2 1053 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1054 CPU and is still open. 1055 1056- ``ERRATA_X2_3701772``: This applies errata 3701772 workaround to Cortex-X2 1057 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1058 CPU and is still open. 1059 1060- ``ERRATA_X2_3888122``: This applies errata 3888122 workaround to Cortex-X2 1061 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1062 CPU and is still open. 1063 1064- ``ERRATA_X2_4302969``: This applies errata 4302969 workaround to Cortex-X2 1065 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 1066 CPU and is still open. 1067 1068For Cortex-X3, the following errata build flags are defined : 1069 1070- ``ERRATA_X3_2266875``: This applies errata 2266875 workaround to the Cortex-X3 1071 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 1072 is fixed in r1p1. 1073 1074- ``ERRATA_X3_2302506``: This applies errata 2302506 workaround to the Cortex-X3 1075 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1, it is 1076 fixed in r1p2. 1077 1078- ``ERRATA_X3_2313909``: This applies errata 2313909 workaround to 1079 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 1080 of the CPU, it is fixed in r1p1. 1081 1082- ``ERRATA_X3_2372204``: This applies errata 2372204 workaround to 1083 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 1084 of the CPU, it is fixed in r1p1. 1085 1086- ``ERRATA_X3_2615812``: This applies errata 2615812 workaround to Cortex-X3 1087 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the 1088 CPU, it is fixed in r1p2. 1089 1090- ``ERRATA_X3_2641945``: This applies errata 2641945 workaround to Cortex-X3 1091 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU. 1092 It is fixed in r1p1. 1093 1094- ``ERRATA_X3_2701951``: This applies erratum 2701951 workaround to Cortex-X3 1095 CPU and affects system configurations that do not use an ARM interconnect 1096 IP. This needs to be applied to revisions r0p0, r1p0 and r1p1. It is fixed 1097 in r1p2. 1098 1099- ``ERRATA_X3_2742421``: This applies errata 2742421 workaround to 1100 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 1101 r1p1. It is fixed in r1p2. 1102 1103- ``ERRATA_X3_2743088``: This applies errata 2743088 workaround to Cortex-X3 1104 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1. It is 1105 fixed in r1p2. 1106 1107- ``ERRATA_X3_2779509``: This applies errata 2779509 workaround to Cortex-X3 1108 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the 1109 CPU. It is fixed in r1p2. 1110 1111- ``ERRATA_X3_3213672``: This applies errata 3213672 workaround to Cortex-X3 1112 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1113 of the CPU. It is still open. 1114 1115- ``ERRATA_X3_3692984``: This applies errata 3692984 workaround to Cortex-X3 1116 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1117 of the CPU. It is still open. 1118 1119- ``ERRATA_X3_3701769``: This applies errata 3701769 workaround to Cortex-X3 1120 CPU. This needs to be enabled only for revisions r0p0, r1p0, r1p1 and r1p2 1121 of the CPU and it is still open. 1122 1123- ``ERRATA_X3_3827463``: This applies errata 3827463 workaround to Cortex-X3 1124 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of 1125 the CPU. It is fixed in r1p2. 1126 1127- ``ERRATA_X3_3888125``: This applies errata 3888125 workaround to Cortex-X3 1128 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1129 of the CPU. It is still open. 1130 1131- ``ERRATA_X3_4302966``: This applies errata 4302966 workaround to Cortex-X3 1132 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1133 of the CPU. It is still open. 1134 1135For Cortex-X4, the following errata build flags are defined : 1136 1137- ``ERRATA_X4_2701112``: This applies erratum 2701112 workaround to Cortex-X4 1138 CPU and affects system configurations that do not use an Arm interconnect IP. 1139 This needs to be enabled for revisions r0p0 and is fixed in r0p1. 1140 The workaround for this erratum is not implemented in EL3, but the flag can 1141 be enabled/disabled at the platform level. The flag is used when the errata ABI 1142 feature is enabled and can assist the Kernel in the process of 1143 mitigation of the erratum. 1144 1145- ``ERRATA_X4_2726228``: This applies erratum 2726228 workaround to Cortex-X4 1146 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 1147 r0p2. 1148 1149- ``ERRATA_X4_2740089``: This applies errata 2740089 workaround to Cortex-X4 1150 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed 1151 in r0p2. 1152 1153- ``ERRATA_X4_2763018``: This applies errata 2763018 workaround to Cortex-X4 1154 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1155 1156- ``ERRATA_X4_2816013``: This applies errata 2816013 workaround to Cortex-X4 1157 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1158 1159- ``ERRATA_X4_2897503``: This applies errata 2897503 workaround to Cortex-X4 1160 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1161 1162- ``ERRATA_X4_2923985``: This applies errata 2923985 workaround to Cortex-X4 1163 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1164 1165- ``ERRATA_X4_2957258``: This applies errata 2957258 workaround to Cortex-X4 1166 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1167 1168- ``ERRATA_X4_3076789``: This applies errata 3076789 workaround to Cortex-X4 1169 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1170 1171- ``ERRATA_X4_3133195``: This applies errata 3133195 workaround to Cortex-X4 1172 CPU. This needs to be enabled for revision r0p2. It is fixed in r0p3. 1173 1174- ``ERRATA_X4_3701758``: This applies errata 3701758 workaround to Cortex-X4 1175 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3. 1176 It is still open. 1177 1178- ``ERRATA_X4_3887999``: This applies errata 3887999 workaround to Cortex-X4 1179 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2 and r0p3. 1180 It is still open. 1181 1182For Cortex-X925, the following errata build flags are defined : 1183 1184- ``ERRATA_X925_2921199``: This applies errata 2921199 workaround to Cortex-X925 1185 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1186 1187- ``ERRATA_X925_2922378``: This applies errata 2922378 workaround to Cortex-X925 1188 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1189 1190- ``ERRATA_X925_2933290``: This applies errata 2933290 workaround to Cortex-X925 1191 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1192 1193- ``ERRATA_X925_2963999``: This applies errata 2963999 workaround to Cortex-X925 1194 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1195 1196- ``ERRATA_X925_3324334``: This applies errata 3324334 workaround to Cortex-X925 1197 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1198 1199- ``ERRATA_X925_3692980``: This applies errata 3692980 workaround to Cortex-X925 1200 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1201 1202- ``ERRATA_X925_3730893``: This applies errata 3730893 workaround to Cortex-X925 1203 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1204 1205- ``ERRATA_X925_3865185``: This applies errata 3865185 workaround to Cortex-X925 1206 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1207 1208- ``ERRATA_X925_3701747``: This applies errata 3701747 workaround to Cortex-X925 1209 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is still open. 1210 1211For Cortex-A510, the following errata build flags are defined : 1212 1213- ``ERRATA_A510_2008766``: This applies errata 2008766 workaround to 1214 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1215 r0p3, r1p0, r1p1, r1p2 and r1p3. It is still open. 1216 1217- ``ERRATA_A510_2288014``: This applies errata 2288014 workaround to 1218 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1, 1219 r0p2, r0p3 and r1p0, it is fixed in r1p1. 1220 1221- ``ERRATA_A510_2042739``: This applies errata 2042739 workaround to 1222 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1 and 1223 r0p2, it is fixed in r0p3. 1224 1225- ``ERRATA_A510_2041909``: This applies errata 2041909 workaround to 1226 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is fixed 1227 in r0p3. The issue is also present in r0p0 and r0p1 but there is no 1228 workaround for those revisions. 1229 1230- ``ERRATA_A510_2080326``: This applies errata 2080326 workaround to 1231 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is 1232 fixed in r0p3. This issue is also present in r0p0 and r0p1 but there is no 1233 workaround for those revisions. 1234 1235- ``ERRATA_A510_2169012``: This applies errata 2169012 workaround to 1236 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1, 1237 r0p2, r0p3 and r1p0, it is fixed in r1p1. 1238 1239- ``ERRATA_A510_2218134``: This applies errata 2218134 workaround to 1240 Cortex-A510 CPU. This needs to be enabled only for revision r1p0 and is fixed 1241 in r1p1. 1242 1243- ``ERRATA_A510_2250311``: This applies errata 2250311 workaround to 1244 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1245 r0p3 and r1p0, it is fixed in r1p1. This workaround disables MPMM even if 1246 ENABLE_MPMM=1. 1247 1248- ``ERRATA_A510_2218950``: This applies errata 2218950 workaround to 1249 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1250 r0p3 and r1p0, it is fixed in r1p1. 1251 1252- ``ERRATA_A510_2172148``: This applies errata 2172148 workaround to 1253 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1254 r0p3 and r1p0, it is fixed in r1p1. 1255 1256- ``ERRATA_A510_2347730``: This applies errata 2347730 workaround to 1257 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1258 r0p3, r1p0 and r1p1. It is fixed in r1p2. 1259 1260- ``ERRATA_A510_2371937``: This applies errata 2371937 workaround to 1261 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2, 1262 r0p3, r1p0, r1p1, and is fixed in r1p2. 1263 1264- ``ERRATA_A510_2420992``: This applies errata 2420992 workaround to 1265 Cortex-A510 CPU. This needs to applied for revisions r1p0 and r1p1, and is 1266 fixed in r1p2. 1267 1268- ``ERRATA_A510_2666669``: This applies errata 2666669 workaround to 1269 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2, 1270 r0p3, r1p0, r1p1. It is fixed in r1p2. 1271 1272- ``ERRATA_A510_2684597``: This applies erratum 2684597 workaround to 1273 Cortex-A510 CPU. This needs to be applied to revision r0p0, r0p1, r0p2, 1274 r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. 1275 1276- ``ERRATA_A510_2971420``: This applies erratum 2971420 workaround to 1277 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1278 r1p0, r1p1, r1p2 and r1p3 and is still open. 1279 1280- ``ERRATA_A510_3672349``: This applies erratum 3672349 workaround to 1281 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1282 r1p0, r1p1, r1p2 and r1p3 and is still open. 1283 1284- ``ERRATA_A510_3704847``: This applies erratum 3704847 workaround to 1285 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1286 r1p0, r1p1, r1p2 and r1p3 and is still open. 1287 1288For Cortex-A520, the following errata build flags are defined : 1289 1290- ``ERRATA_A520_2630792``: This applies errata 2630792 workaround to 1291 Cortex-A520 CPU. This needs to applied for revisions r0p0, r0p1 of the 1292 CPU and is still open. 1293 1294- ``ERRATA_A520_2858100``: This applies errata 2858100 workaround to 1295 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1296 It is still open. 1297 1298- ``ERRATA_A520_2938996``: This applies errata 2938996 workaround to 1299 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1300 It is fixed in r0p2. 1301 1302For Cortex-A715, the following errata build flags are defined : 1303 1304- ``ERRATA_A715_2238661``: This applies erratum 2238661 workaround to 1305 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1306 fixed in r1p0. 1307 1308- ``ERRATA_A715_2239006``: This applies erratum 2239006 workaround to 1309 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1310 fixed in r1p0. 1311 1312- ``ERRATA_A715_2275754``: This applies erratum 2275754 workaround to 1313 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1314 fixed in r1p0. 1315 1316- ``ERRATA_A715_2284544``: This applies erratum 2284544 workaround to 1317 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1318 fixed in r1p0. 1319 1320- ``ERRATA_A715_2285473``: This applies erratum 2285473 workaround to 1321 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1322 fixed in r1p0. 1323 1324- ``ERRATA_A715_2292761``: This applies erratum 2292761 workaround to 1325 Cortex-A715 CPU. This needs to be enabled for revision r0p0 of the CPU. It is 1326 fixed in r1p0. 1327 1328- ``ERRATA_A715_2331818``: This applies errata 2331818 workaround to 1329 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. 1330 It is fixed in r1p1. 1331 1332- ``ERRATA_A715_2344187``: This applies errata 2344187 workaround to 1333 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is 1334 fixed in r1p1. 1335 1336- ``ERRATA_A715_2376701``: This applies errata 2376701 workaround to 1337 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is 1338 fixed in r1p1. 1339 1340- ``ERRATA_A715_2409570``: This applies errata 2409570 workaround to 1341 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1342 It is fixed in r1p1. This errata also applies to r0p0 but that revision has a 1343 different workaround, and since r0p0 is not used in production hardware it is 1344 not implemented. 1345 1346- ``ERRATA_A715_2413290``: This applies errata 2413290 workaround to 1347 Cortex-A715 CPU. This needs to be enabled only for revision r1p0 and 1348 when SPE(Statistical profiling extension)=True. The errata is fixed 1349 in r1p1. 1350 1351- ``ERRATA_A715_2420947``: This applies errata 2420947 workaround to 1352 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1353 It is fixed in r1p1. 1354 1355- ``ERRATA_A715_2429384``: This applies errata 2429384 workaround to 1356 Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no 1357 workaround for revision r0p0. It is fixed in r1p1. 1358 1359- ``ERRATA_A715_2561034``: This applies errata 2561034 workaround to 1360 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1361 It is fixed in r1p1. 1362 1363- ``ERRATA_A715_2728106``: This applies errata 2728106 workaround to 1364 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0 1365 and r1p1. It is fixed in r1p2. 1366 1367- ``ERRATA_A715_2804830``: This applies errata 2804830 workaround to 1368 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1369 r1p1 and r1p2. It is fixed in r1p3. 1370 1371- ``ERRATA_A715_3456084``: This applies errata 3456084 workaround to 1372 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1373 r1p1, r1p2 and r1p3. It is still open. 1374 1375- ``ERRATA_A715_3699560``: This applies errata 3699560 workaround to 1376 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1377 r1p2 and r1p3. It is still open. 1378 1379- ``ERRATA_A715_3711916``: This applies errata 3711916 workaround to 1380 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1381 r1p1, r1p2 and r1p3. It is still open. 1382 1383For Cortex-A720, the following errata build flags are defined : 1384 1385- ``ERRATA_A720_2729604``: This applies errata 2729604 workaround to 1386 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1387 It is fixed in r0p2. 1388 1389- ``ERRATA_A720_2792132``: This applies errata 2792132 workaround to 1390 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1391 It is fixed in r0p2. 1392 1393- ``ERRATA_A720_2844092``: This applies errata 2844092 workaround to 1394 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1395 It is fixed in r0p2. 1396 1397- ``ERRATA_A720_2926083``: This applies errata 2926083 workaround to 1398 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1399 It is fixed in r0p2. 1400 1401- ``ERRATA_A720_2940794``: This applies errata 2940794 workaround to 1402 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1403 It is fixed in r0p2. 1404 1405- ``ERRATA_A720_3456091``: This applies errata 3456091 workaround to 1406 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1407 and r0p2. It is still open. 1408 1409- ``ERRATA_A720_3699561``: This applies errata 3699561 workaround to 1410 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1411 and r0p2. It is still open. 1412 1413- ``ERRATA_A720_3711910``: This applies errata 3711910 workaround to 1414 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1415 and r0p2. It is still open. 1416 1417For Cortex-A720_AE, the following errata build flags are defined : 1418 1419- ``ERRATA_A720_AE_3456103``: This applies errata 3456103 workaround to 1420 Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0 and r0p1. It 1421 is still open. 1422 1423- ``ERRATA_A720_AE_3699562``: This applies errata 3699562 workaround 1424 to Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0. 1425 It is still open. 1426 1427For Cortex-A725, the following errata build flags are defined : 1428 1429- ``ERRATA_A725_2874943``: This applies errata 2874943 workaround to 1430 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 when 1431 FEAT_SPE is enabled. It is fixed in r0p1. 1432 1433- ``ERRATA_A725_2936490``: This applies errata 2936490 workaround to 1434 Cortex-A725 CPU. This needs to be enabled for revisions r0p0. 1435 It is fixed in r0p1. 1436 1437- ``ERRATA_A725_3456106``: This applies errata 3456106 workaround to 1438 Cortex-A725 CPU. This needs to be enabled for revisions r0p0, r0p1 1439 and r0p2. It is still open. 1440 1441- ``ERRATA_A725_3699564``: This applies errata 3699564 workaround to 1442 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1443 It is fixed in r0p2. 1444 1445- ``ERRATA_A725_3711914``: This applies errata 3711914 workaround to 1446 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1447 It is fixed in r0p2. 1448 1449For C1-Ultra, the following errata build flags are defined : 1450 1451- ``ERRATA_C1ULTRA_3324333``: This applies erratum 3324333 workaround to 1452 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is fixed 1453 in r1p0. 1454 1455- ``ERRATA_C1ULTRA_3502731``: This applies erratum 3502731 workaround to 1456 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is 1457 fixed in r1p0. 1458 1459- ``ERRATA_C1ULTRA_3658374``: This applies erratum 3658374 workaround to 1460 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1461 is still open. 1462 1463- ``ERRATA_C1ULTRA_3684152``: This applies erratum 3684152 workaround to 1464 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is 1465 fixed in r1p0. 1466 1467- ``ERRATA_C1ULTRA_3705939``: This applies erratum 3705939 workaround to 1468 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1469 is still open. 1470 1471- ``ERRATA_C1ULTRA_3815514``: This applies erratum 3815514 workaround to 1472 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1473 is still open. 1474 1475- ``ERRATA_C1ULTRA_3865171``: This applies erratum 3865171 workaround to 1476 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1477 is still open. 1478 1479- ``ERRATA_C1ULTRA_3926381``: This applies erratum 3926381 workaround to 1480 C1-Ultra CPU. This needs to be enabled for revision r1p0 and is still 1481 open. 1482 1483- ``ERRATA_C1ULTRA_4102704``: This applies erratum 4102704 workaround to 1484 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1485 is still open. 1486 1487For C1-Premium, the following errata build flags are defined : 1488 1489- ``ERRATA_C1PREMIUM_3324333``: This applies errata 3324333 workaround to 1490 C1-Premium CPU. This needs to be enabled for revision r0p0, and is 1491 fixed in r1p0. 1492 1493- ``ERRATA_C1PREMIUM_3502731``: This applies errata 3502731 workaround to 1494 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1495 in r1p0. 1496 1497- ``ERRATA_C1PREMIUM_3684152``: This applies errata 3684152 workaround to 1498 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1499 in r1p0. 1500 1501- ``ERRATA_C1PREMIUM_3705939``: This applies errata 3705939 workaround to 1502 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1503 is still open. 1504 1505- ``ERRATA_C1PREMIUM_3815514``: This applies errata 3815514 workaround to 1506 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1507 is still open. 1508 1509- ``ERRATA_C1PREMIUM_3865171``: This applies errata 3865171 workaround to 1510 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1511 is still open. 1512 1513- ``ERRATA_C1PREMIUM_3926381``: This applies errata 3926381 workaround to 1514 C1-Premium CPU. This needs to be enabled for revision r1p0 and is 1515 still open. 1516 1517- ``ERRATA_C1PREMIUM_4102704``: This applies errata 4102704 workaround to 1518 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1519 is still open. 1520 1521For C1-Pro, the following errata build flags are defined : 1522 1523- ``ERRATA_C1PRO_3619847``: This applies errata 3619847 workaround to C1-Pro 1524 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1525 1526- ``ERRATA_C1PRO_3338470``: This applies errata 3338470 workaround to C1-Pro 1527 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1528 1529- ``ERRATA_C1PRO_3362007``: This applies errata 3362007 workaround to C1-Pro 1530 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1531 1532- ``ERRATA_C1PRO_3686597``: This applies errata 3686597 workaround to C1-Pro 1533 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1534 is fixed in r1p1. 1535 1536- ``ERRATA_C1PRO_3694158``: This applies errata 3694158 workaround to C1-Pro 1537 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 and is 1538 fixed in r1p2. 1539 1540- ``ERRATA_C1PRO_3706576``: This applies errata 3706576 workaround to C1-Pro 1541 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1542 is fixed in r1p1. 1543 1544- ``ERRATA_C1PRO_3300099``: This applies errata 3300099 workaround to C1-Pro 1545 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1546 is fixed in r1p1. 1547 1548For C1-Nano, the following errata build flags are defined : 1549 1550- ``ERRATA_C1NANO_3392149``: This applies errata 3392149 workaround to 1551 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1552 in r0p1. 1553 1554- ``ERRATA_C1NANO_3419531``: This applies errata 3419531 workaround to 1555 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1556 in r0p1. 1557 1558- ``ERRATA_C1NANO_3437202``: This applies errata 3437202 workaround to 1559 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1560 in r0p1. 1561 1562- ``ERRATA_C1NANO_3516455``: This applies errata 3516455 workaround to 1563 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1564 in r0p1. 1565 1566- ``ERRATA_C1NANO_3616450``: This applies errata 3616450 workaround to 1567 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1568 in r0p1. 1569 1570- ``ERRATA_C1NANO_3630925``: This applies errata 3630925 workaround to 1571 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1572 in r0p1. 1573 1574- ``ERRATA_C1NANO_3754876``: This applies errata 3754876 workaround to 1575 C1-Nano CPU. This needs to be enabled for revisions r0p0 and r0p1, and 1576 is fixed in r0p2. 1577 1578DSU Errata Workarounds 1579---------------------- 1580 1581Similar to CPU errata, TF-A also implements workarounds for DSU (DynamIQ 1582Shared Unit) errata. The DSU errata details can be found in the respective Arm 1583documentation: 1584 1585- `Arm DSU Software Developers Errata Notice`_. 1586 1587Each erratum is identified by an ``ID``, as defined in the DSU errata notice 1588document. Thus, the build flags which enable/disable the errata workarounds 1589have the format ``ERRATA_DSU_<ID>``. The implementation and application logic 1590of DSU errata workarounds are similar to `CPU errata workarounds`_. 1591 1592For DSU errata, the following build flags are defined: 1593 1594- ``ERRATA_DSU_798953``: This applies errata 798953 workaround for the 1595 affected DSU configurations. This errata applies only for those DSUs that 1596 revision is r0p0 (on r0p1 it is fixed). However, please note that this 1597 workaround results in increased DSU power consumption on idle. 1598 1599- ``ERRATA_DSU_936184``: This applies errata 936184 workaround for the 1600 affected DSU configurations. This errata applies only for those DSUs that 1601 contain the ACP interface **and** the DSU revision is older than r2p0 (on 1602 r2p0 it is fixed). However, please note that this workaround results in 1603 increased DSU power consumption on idle. 1604 1605- ``ERRATA_DSU_2313941``: This applies errata 2313941 workaround for the 1606 affected DSU configurations. This errata applies for those DSUs with 1607 revisions r0p0, r1p0, r2p0, r2p1, r3p0, r3p1 and is still open. However, 1608 please note that this workaround results in increased DSU power consumption 1609 on idle. 1610 1611- ``ERRATA_DSU_2900952``: This applies errata 2900952 workaround for the 1612 affected DSU-120 configurations. This erratum applies to some r2p0 1613 implementations and is fixed in r2p1. The affected r2p0 implementations 1614 are determined by reading the IMP_CLUSTERREVIDR_EL1[1] register bit 1615 and making sure it's clear. 1616 1617CPU Specific optimizations 1618-------------------------- 1619 1620This section describes some of the optimizations allowed by the CPU micro 1621architecture that can be enabled by the platform as desired. 1622 1623- ``SKIP_A57_L1_FLUSH_PWR_DWN``: This flag enables an optimization in the 1624 Cortex-A57 cluster power down sequence by not flushing the Level 1 data 1625 cache. The L1 data cache and the L2 unified cache are inclusive. A flush 1626 of the L2 by set/way flushes any dirty lines from the L1 as well. This 1627 is a known safe deviation from the Cortex-A57 TRM defined power down 1628 sequence. Each Cortex-A57 based platform must make its own decision on 1629 whether to use the optimization. 1630 1631- ``A53_DISABLE_NON_TEMPORAL_HINT``: This flag disables the cache non-temporal 1632 hint. The LDNP/STNP instructions as implemented on Cortex-A53 do not behave 1633 in a way most programmers expect, and will most probably result in a 1634 significant speed degradation to any code that employs them. The Armv8-A 1635 architecture (see Arm DDI 0487A.h, section D3.4.3) allows cores to ignore 1636 the non-temporal hint and treat LDNP/STNP as LDP/STP instead. Enabling this 1637 flag enforces this behaviour. This needs to be enabled only for revisions 1638 <= r0p3 of the CPU and is enabled by default. 1639 1640- ``A57_DISABLE_NON_TEMPORAL_HINT``: This flag has the same behaviour as 1641 ``A53_DISABLE_NON_TEMPORAL_HINT`` but for Cortex-A57. This needs to be 1642 enabled only for revisions <= r1p2 of the CPU and is enabled by default, 1643 as recommended in section "4.7 Non-Temporal Loads/Stores" of the 1644 `Cortex-A57 Software Optimization Guide`_. 1645 1646- ''A57_ENABLE_NON_CACHEABLE_LOAD_FWD'': This flag enables non-cacheable 1647 streaming enhancement feature for Cortex-A57 CPUs. Platforms can set 1648 this bit only if their memory system meets the requirement that cache 1649 line fill requests from the Cortex-A57 processor are atomic. Each 1650 Cortex-A57 based platform must make its own decision on whether to use 1651 the optimization. This flag is disabled by default. 1652 1653- ``NEOVERSE_Nx_EXTERNAL_LLC``: This flag indicates that an external last 1654 level cache(LLC) is present in the system, and that the DataSource field 1655 on the master CHI interface indicates when data is returned from the LLC. 1656 This is used to control how the LL_CACHE* PMU events count. 1657 Default value is 0 (Disabled). 1658 1659- ``NEOVERSE_Vx_EXTERNAL_LLC``: This flag has the same behaviour as 1660 ``NEOVERSE_Nx_EXTERNAL_LLC`` but for Neoverse-V2. This is disabled 1661 by default. Default value is 0 (Disabled). 1662 1663- ``NEOVERSE_N2_PREFETCHER_DISABLE``: This flag disables the region prefetcher 1664 on the Neoverse N2 core. This is used during performance analysis to get clean 1665 and repeatable measurements of the cache by preventing speculative data fetches 1666 from interfering with benchmark results. 1667 Default value is 0 (Disabled). 1668 1669GIC Errata Workarounds 1670---------------------- 1671- ``GIC600_ERRATA_WA_2384374``: This flag applies part 2 of errata 2384374 1672 workaround for the affected GIC600 and GIC600-AE implementations. It applies 1673 to implementations of GIC600 and GIC600-AE with revisions less than or equal 1674 to r1p6 and r0p2 respectively. If the platform sets GICV3_SUPPORT_GIC600, 1675 then this flag is enabled; otherwise, it is 0 (Disabled). 1676 1677-------------- 1678 1679*Copyright (c) 2014-2026, Arm Limited and Contributors. All rights reserved.* 1680 1681.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715 1682.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639 1683.. _CVE-2022-23960: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2022-23960 1684.. _CVE-2024-5660: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-5660 1685.. _CVE-2024-7881: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-7881 1686.. _Cortex-A72 MPCore Software Developers Errata Notice: https://developer.arm.com/documentation/epm012079/latest 1687.. _Cortex-A57 Software Optimization Guide: https://developer.arm.com/documentation/uan0015 1688.. _Arm DSU Software Developers Errata Notice: https://developer.arm.com/documentation/SDEN854652 1689