1Arm CPU Specific Build Macros 2============================= 3 4This document describes the various build options present in the CPU specific 5operations framework to enable errata workarounds and to enable optimizations 6for a specific CPU on a platform. 7 8Security Vulnerability Workarounds 9---------------------------------- 10 11TF-A exports a series of build flags which control which security 12vulnerability workarounds should be applied at runtime. 13 14- ``WORKAROUND_CVE_2017_5715``: Enables the security workaround for 15 `CVE-2017-5715`_. This flag can be set to 0 by the platform if none 16 of the PEs in the system need the workaround. Setting this flag to 0 provides 17 no performance benefit for non-affected platforms, it just helps to comply 18 with the recommendation in the spec regarding workaround discovery. 19 Defaults to 1. 20 21- ``WORKAROUND_CVE_2018_3639``: Enables the security workaround for 22 `CVE-2018-3639`_. Defaults to 1. The TF-A project recommends to keep 23 the default value of 1 even on platforms that are unaffected by 24 CVE-2018-3639, in order to comply with the recommendation in the spec 25 regarding workaround discovery. 26 27- ``DYNAMIC_WORKAROUND_CVE_2018_3639``: Enables dynamic mitigation for 28 `CVE-2018-3639`_. This build option should be set to 1 if the target 29 platform contains at least 1 CPU that requires dynamic mitigation. 30 Defaults to 0. 31 32- ``WORKAROUND_CVE_2022_23960``: Enables mitigation for `CVE-2022-23960`_. 33 This build option should be set to 1 if the target platform contains at 34 least 1 CPU that requires this mitigation. Defaults to 1. 35 36- ``WORKAROUND_CVE_2024_5660``: Enables mitigation for `CVE-2024-5660`. 37 The fix is to disable hardware page aggregation by setting CPUECTLR_EL1[46] 38 in EL3 FW. This build option should be set to 1 if the target platform contains 39 at least 1 CPU that requires this mitigation. Defaults to 1. 40 41- ``WORKAROUND_CVE_2024_7881``: Enables mitigation for `CVE-2024-7881`. 42 This build option should be set to 1 if the target platform contains at 43 least 1 CPU that requires this mitigation. Defaults to 1. 44 45- ``WORKAROUND_CVE_2025_0647``: Enables mitigation for `CVE-2025-0647`. 46 This build option should be set to 1 if the target platform contains at 47 least 1 CPU that requires this mitigation. Defaults to 1. 48 49.. _arm_cpu_macros_errata_workarounds: 50 51CPU Errata Workarounds 52---------------------- 53 54TF-A exports a series of build flags which control the errata workarounds that 55are applied to each CPU by the reset handler. The errata details can be found 56in the CPU specific errata documents published by Arm: 57For example: `Cortex-A72 MPCore Software Developers Errata Notice`_ 58 59The errata workarounds are implemented for a particular revision or a set of 60processor revisions. This is checked by the reset handler at runtime. Each 61errata workaround is identified by its ``ID`` as specified in the processor's 62errata notice document. The format of the define used to enable/disable the 63errata workaround is ``ERRATA_<Processor name>_<ID>``, where the ``Processor name`` 64is for example ``A57`` for the ``Cortex_A57`` CPU. 65 66Refer to :ref:`firmware_design_cpu_errata_implementation` for information on how to 67write errata workaround functions. 68 69All workarounds are disabled by default. The platform is responsible for 70enabling these workarounds according to its requirement by defining the 71errata workaround build flags in the platform specific makefile. In case 72these workarounds are enabled for the wrong CPU revision then the errata 73workaround is not applied. In the DEBUG build, this is indicated by 74printing a warning to the crash console. 75 76In the current implementation, a platform which has more than 1 variant 77with different revisions of a processor has no runtime mechanism available 78for it to specify which errata workarounds should be enabled or not. 79 80The value of the build flags is 0 by default, that is, disabled. A value of 1 81will enable it. 82 83For Cortex-A9, the following errata build flags are defined : 84 85- ``ERRATA_A9_794073``: This applies errata 794073 workaround to Cortex-A9 86 CPU. This needs to be enabled for all revisions of the CPU. 87 88For Cortex-A15, the following errata build flags are defined : 89 90- ``ERRATA_A15_816470``: This applies errata 816470 workaround to Cortex-A15 91 CPU. This needs to be enabled only for revision >= r3p0 of the CPU. 92 93- ``ERRATA_A15_827671``: This applies errata 827671 workaround to Cortex-A15 94 CPU. This needs to be enabled only for revision >= r3p0 of the CPU. 95 96For Cortex-A17, the following errata build flags are defined : 97 98- ``ERRATA_A17_852421``: This applies errata 852421 workaround to Cortex-A17 99 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 100 101- ``ERRATA_A17_852423``: This applies errata 852423 workaround to Cortex-A17 102 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 103 104For Cortex-A35, the following errata build flags are defined : 105 106- ``ERRATA_A35_855472``: This applies errata 855472 workaround to Cortex-A35 107 CPUs. This needs to be enabled only for revision r0p0 of Cortex-A35. 108 109For Cortex-A53, the following errata build flags are defined : 110 111- ``ERRATA_A53_819472``: This applies errata 819472 workaround to all 112 CPUs. This needs to be enabled only for revision <= r0p1 of Cortex-A53. 113 114- ``ERRATA_A53_824069``: This applies errata 824069 workaround to all 115 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53. 116 117- ``ERRATA_A53_826319``: This applies errata 826319 workaround to Cortex-A53 118 CPU. This needs to be enabled only for revision <= r0p2 of the CPU. 119 120- ``ERRATA_A53_827319``: This applies errata 827319 workaround to all 121 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53. 122 123- ``ERRATA_A53_835769``: This applies erratum 835769 workaround at compile and 124 link time to Cortex-A53 CPU. This needs to be enabled for some variants of 125 revision <= r0p4. This workaround can lead the linker to create ``*.stub`` 126 sections. 127 128- ``ERRATA_A53_836870``: This applies errata 836870 workaround to Cortex-A53 129 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From 130 r0p4 and onwards, this errata is enabled by default in hardware. Identical to 131 ``A53_DISABLE_NON_TEMPORAL_HINT``. 132 133- ``ERRATA_A53_843419``: This applies erratum 843419 workaround at link time 134 to Cortex-A53 CPU. This needs to be enabled for some variants of revision 135 <= r0p4. This workaround can lead the linker to emit ``*.stub`` sections 136 which are 4kB aligned. 137 138- ``ERRATA_A53_855873``: This applies errata 855873 workaround to Cortex-A53 139 CPUs. Though the erratum is present in every revision of the CPU, 140 this workaround is only applied to CPUs from r0p3 onwards, which feature 141 a chicken bit in CPUACTLR_EL1 to enable a hardware workaround. 142 Earlier revisions of the CPU have other errata which require the same 143 workaround in software, so they should be covered anyway. 144 145- ``ERRATA_A53_1530924``: This applies errata 1530924 workaround to all 146 revisions of Cortex-A53 CPU. 147 148For Cortex-A55, the following errata build flags are defined : 149 150- ``ERRATA_A55_768277``: This applies errata 768277 workaround to Cortex-A55 151 CPU. This needs to be enabled only for revision r0p0 of the CPU. 152 153- ``ERRATA_A55_778703``: This applies errata 778703 workaround to Cortex-A55 154 CPU. This needs to be enabled only for revision r0p0 of the CPU. 155 156- ``ERRATA_A55_798797``: This applies errata 798797 workaround to Cortex-A55 157 CPU. This needs to be enabled only for revision r0p0 of the CPU. 158 159- ``ERRATA_A55_846532``: This applies errata 846532 workaround to Cortex-A55 160 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 161 162- ``ERRATA_A55_903758``: This applies errata 903758 workaround to Cortex-A55 163 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 164 165- ``ERRATA_A55_1221012``: This applies errata 1221012 workaround to Cortex-A55 166 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 167 168- ``ERRATA_A55_1530923``: This applies errata 1530923 workaround to all 169 revisions of Cortex-A55 CPU. 170 171For Cortex-A57, the following errata build flags are defined : 172 173- ``ERRATA_A57_806969``: This applies errata 806969 workaround to Cortex-A57 174 CPU. This needs to be enabled only for revision r0p0 of the CPU. 175 176- ``ERRATA_A57_813419``: This applies errata 813419 workaround to Cortex-A57 177 CPU. This needs to be enabled only for revision r0p0 of the CPU. 178 179- ``ERRATA_A57_813420``: This applies errata 813420 workaround to Cortex-A57 180 CPU. This needs to be enabled only for revision r0p0 of the CPU. 181 182- ``ERRATA_A57_814670``: This applies errata 814670 workaround to Cortex-A57 183 CPU. This needs to be enabled only for revision r0p0 of the CPU. 184 185- ``ERRATA_A57_817169``: This applies errata 817169 workaround to Cortex-A57 186 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 187 188- ``ERRATA_A57_826974``: This applies errata 826974 workaround to Cortex-A57 189 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 190 191- ``ERRATA_A57_826977``: This applies errata 826977 workaround to Cortex-A57 192 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 193 194- ``ERRATA_A57_828024``: This applies errata 828024 workaround to Cortex-A57 195 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 196 197- ``ERRATA_A57_829520``: This applies errata 829520 workaround to Cortex-A57 198 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 199 200- ``ERRATA_A57_833471``: This applies errata 833471 workaround to Cortex-A57 201 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 202 203- ``ERRATA_A57_859972``: This applies errata 859972 workaround to Cortex-A57 204 CPU. This needs to be enabled only for revision <= r1p3 of the CPU. 205 206- ``ERRATA_A57_1319537``: This applies errata 1319537 workaround to all 207 revisions of Cortex-A57 CPU. 208 209For Cortex-A65, the following errata build flags are defined : 210 211- ``ERRATA_A65_1179935``: This applies errata 1179935 workaround to Cortex-A65 212 CPU. This needs to be enabled only for revision r0p0 of the CPU, and is fixed 213 in r1p0. 214 215- ``ERRATA_A65_1227419``: This applies errata 1227419 workaround to Cortex-A65 216 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU and 217 is fixed in r1p1. 218 219- ``ERRATA_A65_1541130``: This applies errata 1541130 workaround to r0p0, r1p0, 220 r1p1, r1p2 revisions of the CPU and is still open. 221 222For Cortex-A65AE, the following errata build flags are defined : 223 224- ``ERRATA_A65AE_1638571``: This applies errata 1638571 workaround to Cortex-A65AE 225 CPU. This needs to be enabled r0p0, r1p0, r1p1 revisions of the CPU and is still 226 open. 227 228For Cortex-A72, the following errata build flags are defined : 229 230- ``ERRATA_A72_859971``: This applies errata 859971 workaround to Cortex-A72 231 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. 232 233- ``ERRATA_A72_1319367``: This applies errata 1319367 workaround to all 234 revisions of Cortex-A72 CPU. 235 236For Cortex-A73, the following errata build flags are defined : 237 238- ``ERRATA_A73_852427``: This applies errata 852427 workaround to Cortex-A73 239 CPU. This needs to be enabled only for revision r0p0 of the CPU. 240 241- ``ERRATA_A73_855423``: This applies errata 855423 workaround to Cortex-A73 242 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 243 244For Cortex-A75, the following errata build flags are defined : 245 246- ``ERRATA_A75_764081``: This applies errata 764081 workaround to Cortex-A75 247 CPU. This needs to be enabled only for revision r0p0 of the CPU. 248 249- ``ERRATA_A75_790748``: This applies errata 790748 workaround to Cortex-A75 250 CPU. This needs to be enabled only for revision r0p0 of the CPU. 251 252For Cortex-A76, the following errata build flags are defined : 253 254- ``ERRATA_A76_1073348``: This applies errata 1073348 workaround to Cortex-A76 255 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 256 257- ``ERRATA_A76_1130799``: This applies errata 1130799 workaround to Cortex-A76 258 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 259 260- ``ERRATA_A76_1165347``: This applies errata 1165347 workaround to Cortex-A76 261 CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU. 262 It is fixed in r3p0. 263 264- ``ERRATA_A76_1165522``: This applies errata 1165522 workaround to all 265 revisions of Cortex-A76 CPU. This errata is fixed in r3p0 but due to 266 limitation of errata framework this errata is applied to all revisions 267 of Cortex-A76 CPU. 268 269- ``ERRATA_A76_1207823``: This applies errata 1207823 workaround to Cortex-A76 270 CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU. 271 It is fixed in r3p0. 272 273- ``ERRATA_A76_1220197``: This applies errata 1220197 workaround to Cortex-A76 274 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 275 276- ``ERRATA_A76_1257314``: This applies errata 1257314 workaround to Cortex-A76 277 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 278 279- ``ERRATA_A76_1262606``: This applies errata 1262606 workaround to Cortex-A76 280 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 281 282- ``ERRATA_A76_1262888``: This applies errata 1262888 workaround to Cortex-A76 283 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 284 285- ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76 286 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 287 288- ``ERRATA_A76_1791580``: This applies errata 1791580 workaround to Cortex-A76 289 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 290 291- ``ERRATA_A76_1868343``: This applies errata 1868343 workaround to Cortex-A76 292 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 293 294- ``ERRATA_A76_1946160``: This applies errata 1946160 workaround to Cortex-A76 295 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r3p0, r3p1, r4p0, 296 and r4p1 of the CPU. It is still open. 297 298- ``ERRATA_A76_2743102``: This applies errata 2743102 workaround to Cortex-A76 299 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 300 still open. 301 302For Cortex-A76AE, the following errata build flags are defined : 303 304- ``ERRATA_A76AE_1931427``: This applies errata 1931427 workaround to Cortex-A76AE 305 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 306 fixed in r1p1. 307 308- ``ERRATA_A76AE_1931435``: This applies errata 1931435 workaround to Cortex-A76AE 309 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 310 fixed in r1p1. 311 312- ``ERRATA_A76AE_1969401``: This applies errata 1969401 workaround to Cortex-A76AE 313 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 314 fixed in r1p1. 315 316- ``ERRATA_A76AE_2371140``: This applies errata 2371140 workaround to Cortex-A76AE 317 CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is 318 still open. 319 320- ``ERRATA_A76AE_2753838``: This applies errata 2753838 workaround to Cortex-A76AE 321 CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is 322 still open. 323 324For Cortex-A77, the following errata build flags are defined : 325 326- ``ERRATA_A77_1508412``: This applies errata 1508412 workaround to Cortex-A77 327 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 328 329- ``ERRATA_A77_1925769``: This applies errata 1925769 workaround to Cortex-A77 330 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 331 332- ``ERRATA_A77_1946167``: This applies errata 1946167 workaround to Cortex-A77 333 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 334 335- ``ERRATA_A77_1791578``: This applies errata 1791578 workaround to Cortex-A77 336 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 337 338- ``ERRATA_A77_2356587``: This applies errata 2356587 workaround to Cortex-A77 339 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 340 341 - ``ERRATA_A77_1800714``: This applies errata 1800714 workaround to Cortex-A77 342 CPU. This needs to be enabled for revisions <= r1p1 of the CPU. 343 344 - ``ERRATA_A77_2743100``: This applies errata 2743100 workaround to Cortex-A77 345 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 346 347For Cortex-A78, the following errata build flags are defined : 348 349- ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78 350 CPU. This needs to be enabled only for revision r0p0 - r1p0 of the CPU. 351 352- ``ERRATA_A78_1941498``: This applies errata 1941498 workaround to Cortex-A78 353 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the CPU. 354 355- ``ERRATA_A78_1951500``: This applies errata 1951500 workaround to Cortex-A78 356 CPU. This needs to be enabled for revisions r1p0 and r1p1, r0p0 has the same 357 issue but there is no workaround for that revision. 358 359- ``ERRATA_A78_1821534``: This applies errata 1821534 workaround to Cortex-A78 360 CPU. This needs to be enabled for revisions r0p0 and r1p0. 361 362- ``ERRATA_A78_1952683``: This applies errata 1952683 workaround to Cortex-A78 363 CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0. 364 365- ``ERRATA_A78_2242635``: This applies errata 2242635 workaround to Cortex-A78 366 CPU. This needs to be enabled for revisions r1p0, r1p1, and r1p2. The issue 367 is present in r0p0 but there is no workaround. It is still open. 368 369- ``ERRATA_A78_2376745``: This applies errata 2376745 workaround to Cortex-A78 370 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 371 it is still open. 372 373- ``ERRATA_A78_2395406``: This applies errata 2395406 workaround to Cortex-A78 374 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 375 it is still open. 376 377- ``ERRATA_A78_2712571``: This applies erratum 2712571 workaround to Cortex-A78 378 CPU, this erratum affects system configurations that do not use an ARM 379 interconnect IP. This needs to be enabled for revisions r0p0, r1p0, r1p1 380 and r1p2 and it is still open. 381 382- ``ERRATA_A78_2742426``: This applies erratum 2742426 workaround to Cortex-A78 383 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and 384 it is still open. 385 386- ``ERRATA_A78_2772019``: This applies errata 2772019 workaround to Cortex-A78 387 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 388 it is still open. 389 390- ``ERRATA_A78_2779479``: This applies erratum 2779479 workaround to Cortex-A78 391 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and 392 it is still open. 393 394For Cortex-A78AE, the following errata build flags are defined : 395 396- ``ERRATA_A78_AE_1941500`` : This applies errata 1941500 workaround to 397 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. 398 This erratum is still open. 399 400- ``ERRATA_A78_AE_1951502`` : This applies errata 1951502 workaround to 401 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This 402 erratum is still open. 403 404- ``ERRATA_A78_AE_2376748`` : This applies errata 2376748 workaround to 405 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 406 This erratum is still open. 407 408- ``ERRATA_A78_AE_2395408`` : This applies errata 2395408 workaround to 409 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This 410 erratum is still open. 411 412- ``ERRATA_A78_AE_2712574`` : This applies erratum 2712574 workaround to 413 Cortex-A78AE CPU. This erratum affects system configurations that do not use 414 an ARM interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and 415 r0p2. This erratum is still open. 416 417For Cortex-A78C, the following errata build flags are defined : 418 419- ``ERRATA_A78C_1827430`` : This applies errata 1827430 workaround to 420 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is 421 fixed in r0p1. 422 423- ``ERRATA_A78C_1827440`` : This applies errata 1827440 workaround to 424 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is 425 fixed in r0p1. 426 427- ``ERRATA_A78C_2242638`` : This applies errata 2242638 workaround to 428 Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and 429 it is still open. 430 431- ``ERRATA_A78C_2376749`` : This applies errata 2376749 workaround to 432 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 433 erratum is still open. 434 435- ``ERRATA_A78C_2395411`` : This applies errata 2395411 workaround to 436 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 437 erratum is still open. 438 439- ``ERRATA_A78C_2683027`` : This applies errata 2683027 workaround to 440 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 441 erratum is still open. 442 443- ``ERRATA_A78C_2712575`` : This applies erratum 2712575 workaround to 444 Cortex-A78C CPU, this erratum affects system configurations that do not use 445 an ARM interconnect IP. This needs to be enabled for revisions r0p1 and r0p2 446 and is still open. 447 448- ``ERRATA_A78C_2743232`` : This applies erratum 2743232 workaround to 449 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. 450 This erratum is still open. 451 452- ``ERRATA_A78C_2772121`` : This applies errata 2772121 workaround to 453 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 454 This erratum is still open. 455 456- ``ERRATA_A78C_2779484`` : This applies errata 2779484 workaround to 457 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. 458 This erratum is still open. 459 460For Cortex-X1 CPU, the following errata build flags are defined: 461 462- ``ERRATA_X1_1821534`` : This applies errata 1821534 workaround to Cortex-X1 463 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 464 465- ``ERRATA_X1_1688305`` : This applies errata 1688305 workaround to Cortex-X1 466 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 467 468- ``ERRATA_X1_1827429`` : This applies errata 1827429 workaround to Cortex-X1 469 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 470 471For Neoverse N1, the following errata build flags are defined : 472 473- ``ERRATA_N1_1073348``: This applies errata 1073348 workaround to Neoverse-N1 474 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU. 475 476- ``ERRATA_N1_1130799``: This applies errata 1130799 workaround to Neoverse-N1 477 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 478 479- ``ERRATA_N1_1165347``: This applies errata 1165347 workaround to Neoverse-N1 480 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 481 482- ``ERRATA_N1_1207823``: This applies errata 1207823 workaround to Neoverse-N1 483 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 484 485- ``ERRATA_N1_1220197``: This applies errata 1220197 workaround to Neoverse-N1 486 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 487 488- ``ERRATA_N1_1257314``: This applies errata 1257314 workaround to Neoverse-N1 489 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 490 491- ``ERRATA_N1_1262606``: This applies errata 1262606 workaround to Neoverse-N1 492 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 493 494- ``ERRATA_N1_1262888``: This applies errata 1262888 workaround to Neoverse-N1 495 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 496 497- ``ERRATA_N1_1275112``: This applies errata 1275112 workaround to Neoverse-N1 498 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 499 500- ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1 501 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 502 503- ``ERRATA_N1_1542419``: This applies errata 1542419 workaround to Neoverse-N1 504 CPU. This needs to be enabled only for revisions r3p0 - r4p0 of the CPU. 505 506- ``ERRATA_N1_1868343``: This applies errata 1868343 workaround to Neoverse-N1 507 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 508 509- ``ERRATA_N1_1946160``: This applies errata 1946160 workaround to Neoverse-N1 510 CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for 511 revisions r0p0, r1p0, and r2p0 there is no workaround. 512 513- ``ERRATA_N1_2743102``: This applies errata 2743102 workaround to Neoverse-N1 514 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 515 still open. 516 517- ``ERRATA_N1_3324349``: This applies errata 3324349 workaround to Neoverse-N1 518 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 519 still open. 520 521For Neoverse V1, the following errata build flags are defined : 522 523- ``ERRATA_V1_1618635``: This applies errata 1618635 workaround to Neoverse-V1 524 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 525 r1p0. 526 527- ``ERRATA_V1_1774420``: This applies errata 1774420 workaround to Neoverse-V1 528 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 529 in r1p1. 530 531- ``ERRATA_V1_1791573``: This applies errata 1791573 workaround to Neoverse-V1 532 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 533 in r1p1. 534 535- ``ERRATA_V1_1852267``: This applies errata 1852267 workaround to Neoverse-V1 536 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 537 in r1p1. 538 539- ``ERRATA_V1_1925756``: This applies errata 1925756 workaround to Neoverse-V1 540 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 541 542- ``ERRATA_V1_1940577``: This applies errata 1940577 workaround to Neoverse-V1 543 CPU. This needs to be enabled only for revision r1p0 and r1p1 of the 544 CPU. 545 546- ``ERRATA_V1_1966096``: This applies errata 1966096 workaround to Neoverse-V1 547 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the 548 issue is present in r0p0 as well but there is no workaround for that 549 revision. It is still open. 550 551- ``ERRATA_V1_2139242``: This applies errata 2139242 workaround to Neoverse-V1 552 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the 553 CPU. It is still open. 554 555- ``ERRATA_V1_2216392``: This applies errata 2216392 workaround to Neoverse-V1 556 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the 557 issue is present in r0p0 as well but there is no workaround for that 558 revision. It is still open. 559 560- ``ERRATA_V1_2294912``: This applies errata 2294912 workaround to Neoverse-V1 561 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 and r1p2 of 562 the CPU. 563 564- ``ERRATA_V1_2348377``: This applies errata 2348377 workaroud to Neoverse-V1 565 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU. 566 It has been fixed in r1p2. 567 568- ``ERRATA_V1_2372203``: This applies errata 2372203 workaround to Neoverse-V1 569 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU. 570 It is still open. 571 572- ``ERRATA_V1_2701953``: This applies erratum 2701953 workaround to Neoverse-V1 573 CPU, this erratum affects system configurations that do not use an ARM 574 interconnect IP. This needs to be enabled for revisions r0p0, r1p0 and r1p1. 575 It has been fixed in r1p2. 576 577- ``ERRATA_V1_2743093``: This applies errata 2743093 workaround to Neoverse-V1 578 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 of the 579 CPU. It is still open. 580 581- ``ERRATA_V1_2743233``: This applies erratum 2743233 workaround to Neoverse-V1 582 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2 of the 583 CPU. It is still open. 584 585- ``ERRATA_V1_2779461``: This applies erratum 2779461 workaround to Neoverse-V1 586 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the 587 CPU. It is still open. 588 589For Neoverse V2, the following errata build flags are defined : 590 591- ``ERRATA_V2_2618597``: This applies errata 2618597 workaround to Neoverse-V2 592 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 593 r0p2. 594 595- ``ERRATA_V2_2662553``: This applies errata 2662553 workaround to Neoverse-V2 596 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 597 r0p2. 598 599- ``ERRATA_V2_2719103``: This applies errata 2719103 workaround to Neoverse-V2 600 CPU, this affects system configurations that do not use and ARM interconnect 601 IP. This needs to be enabled for revisions r0p0 and r0p1. It has been fixed 602 in r0p2. 603 604- ``ERRATA_V2_2719105``: This applies errata 2719105 workaround to Neoverse-V2 605 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 606 r0p2. 607 608- ``ERRATA_V2_2743011``: This applies errata 2743011 workaround to Neoverse-V2 609 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 610 r0p2. 611 612- ``ERRATA_V2_2779510``: This applies errata 2779510 workaround to Neoverse-V2 613 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 614 r0p2. 615 616- ``ERRATA_V2_2801372``: This applies errata 2801372 workaround to Neoverse-V2 617 CPU, this affects all configurations. This needs to be enabled for revisions 618 r0p0 and r0p1. It has been fixed in r0p2. 619 620- ``ERRATA_V2_3442699``: This applies errata 3442699 workaround to Neoverse-V2 621 CPU. This needs to be enabled for revision r0p0 - r0p2 and is still open. 622 623- ``ERRATA_V2_3701771``: This applies errata 3701771 workaround to Neoverse-V2 624 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 and is 625 still open. 626 627- ``ERRATA_V2_3841324``: This applies errata 3841324 workaround to Neoverse-V2 628 CPU. This needs to be enabled only for revisions r0p0 and r0p1 of 629 the CPU. It is fixed in r0p2. 630 631- ``ERRATA_V2_3888126``: This applies errata 3888126 workaround to Neoverse-V2 632 CPU. This needs to be enabled only for revisions r0p0, r0p1, r0p2 of 633 the CPU. It is still open. 634 635- ``ERRATA_V2_4302968``: This applies errata 4302968 workaround to Neoverse-V2 636 CPU. This needs to be enabled only for revisions r0p0, r0p1, r0p2 of 637 the CPU. It is still open. 638 639For Neoverse V3, the following errata build flags are defined : 640 641- ``ERRATA_V3_2970647``: This applies errata 2970647 workaround to Neoverse-V3 642 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 643 644- ``ERRATA_V3_3312417``: This applies errata 3312417 workaround to Neoverse-V3 645 CPU. This needs to be enabled for revisions r0p0 and r0p1 of the CPU and is 646 fixed in r0p2. 647 648- ``ERRATA_V3_3696307``: This applies errata 3696307 workaround to Neoverse-V3 649 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 650 r0p2. 651 652- ``ERRATA_V3_3701767``: This applies errata 3701767 workaround to Neoverse-V3 653 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the CPU and 654 is still open. 655 656- ``ERRATA_V3_3734562``: This applies errata 3734562 workaround to Neoverse-V3 657 CPU. This needs to be enabled for revisions r0p0 and r0p1 of the CPU and 658 is fixed in r0p2. 659 660- ``ERRATA_V3_3782181``: This applies errata 3782181 workaround to Neoverse-V3 661 CPU. This needs to be enabled for revision r0p1 of the CPU and is fixed in 662 r0p2. 663 664- ``ERRATA_V3_3864536``: This applies errata 3864536 workaround to Neoverse-V3 665 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU and 666 is still open. 667 668- ``ERRATA_V3_3878291``: This applies errata 3878291 workaround to Neoverse-V3 669 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU and 670 is still open. 671 672For Cortex-A710, the following errata build flags are defined : 673 674- ``ERRATA_A710_1901946``: This applies errata 1901946 workaround to 675 Cortex-A710 CPU. This needs to be enabled only for revision r1p0. It has 676 been fixed in r2p0. 677 678- ``ERRATA_A710_1916945``: This applies errata 1916945 workaround to 679 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 680 It has been fixed in r2p0. 681 682- ``ERRATA_A710_1917258``: This applies errata 1917258 workaround to 683 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 684 It has been fixed in r2p0. 685 686- ``ERRATA_A710_1927200``: This applies errata 1927200 workaround to 687 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 688 It has been fixed in r2p0. 689 690- ``ERRATA_A710_1987031``: This applies errata 1987031 workaround to 691 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 692 r2p0 of the CPU. It is still open. 693 694- ``ERRATA_A710_2081180``: This applies errata 2081180 workaround to 695 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 696 r2p0 of the CPU. It is still open. 697 698- ``ERRATA_A710_2055002``: This applies errata 2055002 workaround to 699 Cortex-A710 CPU. This needs to be enabled for revisions r1p0, r2p0 of the CPU 700 and is still open. 701 702- ``ERRATA_A710_2017096``: This applies errata 2017096 workaround to 703 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 704 of the CPU and is still open. 705 706- ``ERRATA_A710_2083908``: This applies errata 2083908 workaround to 707 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU and 708 is still open. 709 710- ``ERRATA_A710_2267065``: This applies errata 2267065 workaround to 711 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 712 of the CPU and is fixed in r2p1. 713 714- ``ERRATA_A710_2136059``: This applies errata 2136059 workaround to 715 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 716 of the CPU and is fixed in r2p1. 717 718- ``ERRATA_A710_2147715``: This applies errata 2147715 workaround to 719 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU 720 and is fixed in r2p1. 721 722- ``ERRATA_A710_2216384``: This applies errata 2216384 workaround to 723 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 724 of the CPU and is fixed in r2p1. 725 726- ``ERRATA_A710_2282622``: This applies errata 2282622 workaround to 727 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 728 r2p1 of the CPU and is still open. 729 730- ``ERRATA_A710_2291219``: This applies errata 2291219 workaround to 731 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 732 of the CPU and is fixed in r2p1. 733 734- ``ERRATA_A710_2008768``: This applies errata 2008768 workaround to 735 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 736 of the CPU and is fixed in r2p1. 737 738- ``ERRATA_A710_2371105``: This applies errata 2371105 workaround to 739 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 740 of the CPU and is fixed in r2p1. 741 742- ``ERRATA_A710_2701952``: This applies erratum 2701952 workaround to Cortex-A710 743 CPU, and applies to system configurations that do not use and ARM 744 interconnect IP. This needs to be enabled for r0p0, r1p0, r2p0 and r2p1 and 745 is still open. 746 747- ``ERRATA_A710_2742423``: This applies errata 2742423 workaround to 748 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 749 r2p1 of the CPU and is still open. 750 751- ``ERRATA_A710_2768515``: This applies errata 2768515 workaround to 752 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 753 r2p1 of the CPU and is still open. 754 755- ``ERRATA_A710_2778471``: This applies errata 2778471 workaround to Cortex-A710 756 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 757 CPU and is still open. 758 759- ``ERRATA_A710_3324338``: This applies errata 3324338 workaround to 760 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 761 r2p1 of the CPU and is still open. 762 763- ``ERRATA_A710_3701772``: This applies errata 3701772 workaround to Cortex-A710 764 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 of the 765 CPU and is still open. 766 767For Neoverse N2, the following errata build flags are defined : 768 769- ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2 770 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 771 772- ``ERRATA_N2_2009478``: This applies errata 2009478 workaround to Neoverse-N2 773 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 774 775- ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2 776 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 777 778- ``ERRATA_N2_2025414``: This applies errata 2025414 workaround to Neoverse-N2 779 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 780 781- ``ERRATA_N2_2138953``: This applies errata 2138953 workaround to Neoverse-N2 782 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3 of the 783 Neoverse N2 cpu and is still open. 784 785- ``ERRATA_N2_2138956``: This applies errata 2138956 workaround to Neoverse-N2 786 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 787 788- ``ERRATA_N2_2138958``: This applies errata 2138958 workaround to Neoverse-N2 789 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 790 791- ``ERRATA_N2_2189731``: This applies errata 2189731 workaround to Neoverse-N2 792 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 793 794- ``ERRATA_N2_2242400``: This applies errata 2242400 workaround to Neoverse-N2 795 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 796 797- ``ERRATA_N2_2242415``: This applies errata 2242415 workaround to Neoverse-N2 798 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 799 800- ``ERRATA_N2_2280757``: This applies errata 2280757 workaround to Neoverse-N2 801 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 802 803- ``ERRATA_N2_2326639``: This applies errata 2326639 workaround to Neoverse-N2 804 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 805 r0p1. 806 807- ``ERRATA_N2_2340933``: This applies errata 2340933 workaround to Neoverse-N2 808 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 809 r0p1. 810 811- ``ERRATA_N2_2346952``: This applies errata 2346952 workaround to Neoverse-N2 812 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU, 813 it is fixed in r0p3. 814 815- ``ERRATA_N2_2376738``: This applies errata 2376738 workaround to Neoverse-N2 816 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open. 817 818- ``ERRATA_N2_2388450``: This applies errata 2388450 workaround to Neoverse-N2 819 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 820 r0p1. 821 822- ``ERRATA_N2_2743014``: This applies errata 2743014 workaround to Neoverse-N2 823 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 824 in r0p3. 825 826- ``ERRATA_N2_2743089``: This applies errata 2743089 workaround to Neoverse-N2 827 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 828 in r0p3. 829 830- ``ERRATA_N2_2728475``: This applies erratum 2728475 workaround to Neoverse-N2 831 CPU, this erratum affects system configurations that do not use and ARM 832 interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 833 It is fixed in r0p3. 834 835- ``ERRATA_N2_2779511``: This applies errata 2779511 workaround to Neoverse-N2 836 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 837 in r0p3. 838 839- ``ERRATA_N2_3324339``: This applies errata 3324339 workaround to Neoverse-N2 840 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 841 still open. 842 843- ``ERRATA_N2_3701773``: This applies errata 3701773 workaround to Neoverse-N2 844 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 845 still open. 846 847- ``ERRATA_N2_3888123``: This applies errata 3888123 workaround to Neoverse-N2 848 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 849 still open. 850 851- ``ERRATA_N2_4302970``: This applies errata 4302970 workaround to Neoverse-N2 852 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 853 still open. 854 855For Neoverse N3, the following errata build flags are defined : 856 857- ``ERRATA_N3_3456111``: This applies errata 3456111 workaround to Neoverse-N3 858 CPU. This needs to be enabled for revisions r0p0 and r0p1 and is still open. 859 860- ``ERRATA_N3_3699563``: This applies errata 3699563 workaround to Neoverse-N3 861 CPU. This needs to be enabled for revisions r0p0 and is still open. 862 863For Cortex-X2, the following errata build flags are defined : 864 865- ``ERRATA_X2_1901946``: This applies errata 1901946 workaround to Cortex-X2 866 CPU. This needs to be enabled only for r1p0, it is fixed in r2p0. 867 868- ``ERRATA_X2_1916945``: This applies errata 1916945 workaround to Cortex-X2 869 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 870 is fixed in r2p0. 871 872- ``ERRATA_X2_1917258``: This applies errata 1917258 workaround to Cortex-X2 873 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 874 is fixed in r2p0. 875 876- ``ERRATA_X2_1927200``: This applies errata 1927200 workaround to Cortex-X2 877 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 878 is fixed in r2p0. 879 880- ``ERRATA_X2_1934260``: This applies errata 1934260 workaround to Cortex-X2 881 CPU. This needs to be enabled only for revision r1p0 of the CPU, it is fixed 882 in r2p0. 883 884- ``ERRATA_X2_2002765``: This applies errata 2002765 workaround to Cortex-X2 885 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 886 CPU, it is fixed in r2p1. 887 888- ``ERRATA_X2_2017096``: This applies errata 2017096 workaround to Cortex-X2 889 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 890 CPU, it is fixed in r2p1. 891 892- ``ERRATA_X2_2081180``: This applies errata 2081180 workaround to Cortex-X2 893 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 894 CPU, it is fixed in r2p1. 895 896- ``ERRATA_X2_2083908``: This applies errata 2083908 workaround to Cortex-X2 897 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed 898 in r2p1. 899 900- ``ERRATA_X2_2136059``: This applies errata 2136059 workaround to Cortex-X2 901 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 902 CPU, it is fixed in r2p1. 903 904- ``ERRATA_X2_2147715``: This applies errata 2147715 workaround to Cortex-X2 905 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed 906 in r2p1. 907 908- ``ERRATA_X2_2216384``: This applies errata 2216384 workaround to Cortex-X2 909 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 910 CPU, it is fixed in r2p1. 911 912- ``ERRATA_X2_2267065``: This applies errata 2267065 workaround to Cortex-X2 913 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 914 CPU, it is fixed in r2p1. 915 916- ``ERRATA_X2_2282622``: This applies errata 2282622 workaround to Cortex-X2 917 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 918 CPU and is still open. 919 920- ``ERRATA_X2_2291219``: This applies errata 2291219 workaround to Cortex-X2 921 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 922 CPU, it is fixed in r2p1. 923 924- ``ERRATA_X2_2371105``: This applies errata 2371105 workaround to Cortex-X2 925 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 926 CPU, it is fixed in r2p1. 927 928- ``ERRATA_X2_2701952``: This applies errata 2701952 workaround to Cortex-X2 929 CPU and affects system configurations that do not use an Arm interconnect IP. 930 This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 and is 931 still open. 932 933- ``ERRATA_X2_2742423``: This applies errata 2742423 workaround to Cortex-X2 934 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 935 CPU and is still open. 936 937- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to Cortex-X2 938 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 939 CPU and is still open. 940 941- ``ERRATA_X2_2778471``: This applies errata 2778471 workaround to Cortex-X2 942 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 943 CPU and is still open. 944 945- ``ERRATA_X2_3324338``: This applies errata 3324338 workaround to Cortex-X2 946 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 947 CPU and is still open. 948 949- ``ERRATA_X2_3701772``: This applies errata 3701772 workaround to Cortex-X2 950 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 951 CPU and is still open. 952 953- ``ERRATA_X2_3888122``: This applies errata 3888122 workaround to Cortex-X2 954 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 955 CPU and is still open. 956 957- ``ERRATA_X2_4302969``: This applies errata 4302969 workaround to Cortex-X2 958 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 959 CPU and is still open. 960 961For Cortex-X3, the following errata build flags are defined : 962 963- ``ERRATA_X3_2266875``: This applies errata 2266875 workaround to the Cortex-X3 964 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 965 is fixed in r1p1. 966 967- ``ERRATA_X3_2302506``: This applies errata 2302506 workaround to the Cortex-X3 968 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1, it is 969 fixed in r1p2. 970 971- ``ERRATA_X3_2313909``: This applies errata 2313909 workaround to 972 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 973 of the CPU, it is fixed in r1p1. 974 975- ``ERRATA_X3_2372204``: This applies errata 2372204 workaround to 976 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 977 of the CPU, it is fixed in r1p1. 978 979- ``ERRATA_X3_2615812``: This applies errata 2615812 workaround to Cortex-X3 980 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the 981 CPU, it is fixed in r1p2. 982 983- ``ERRATA_X3_2641945``: This applies errata 2641945 workaround to Cortex-X3 984 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU. 985 It is fixed in r1p1. 986 987- ``ERRATA_X3_2701951``: This applies erratum 2701951 workaround to Cortex-X3 988 CPU and affects system configurations that do not use an ARM interconnect 989 IP. This needs to be applied to revisions r0p0, r1p0 and r1p1. It is fixed 990 in r1p2. 991 992- ``ERRATA_X3_2742421``: This applies errata 2742421 workaround to 993 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 994 r1p1. It is fixed in r1p2. 995 996- ``ERRATA_X3_2743088``: This applies errata 2743088 workaround to Cortex-X3 997 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1. It is 998 fixed in r1p2. 999 1000- ``ERRATA_X3_2779509``: This applies errata 2779509 workaround to Cortex-X3 1001 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the 1002 CPU. It is fixed in r1p2. 1003 1004- ``ERRATA_X3_3213672``: This applies errata 3213672 workaround to Cortex-X3 1005 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1006 of the CPU. It is still open. 1007 1008- ``ERRATA_X3_3692984``: This applies errata 3692984 workaround to Cortex-X3 1009 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1010 of the CPU. It is still open. 1011 1012- ``ERRATA_X3_3701769``: This applies errata 3701769 workaround to Cortex-X3 1013 CPU. This needs to be enabled only for revisions r0p0, r1p0, r1p1 and r1p2 1014 of the CPU and it is still open. 1015 1016- ``ERRATA_X3_3827463``: This applies errata 3827463 workaround to Cortex-X3 1017 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of 1018 the CPU. It is fixed in r1p2. 1019 1020- ``ERRATA_X3_3888125``: This applies errata 3888125 workaround to Cortex-X3 1021 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1022 of the CPU. It is still open. 1023 1024- ``ERRATA_X3_4302966``: This applies errata 4302966 workaround to Cortex-X3 1025 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1026 of the CPU. It is still open. 1027 1028For Cortex-X4, the following errata build flags are defined : 1029 1030- ``ERRATA_X4_2701112``: This applies erratum 2701112 workaround to Cortex-X4 1031 CPU and affects system configurations that do not use an Arm interconnect IP. 1032 This needs to be enabled for revisions r0p0 and is fixed in r0p1. 1033 The workaround for this erratum is not implemented in EL3, but the flag can 1034 be enabled/disabled at the platform level. The flag is used when the errata ABI 1035 feature is enabled and can assist the Kernel in the process of 1036 mitigation of the erratum. 1037 1038- ``ERRATA_X4_2726228``: This applies erratum 2726228 workaround to Cortex-X4 1039 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 1040 r0p2. 1041 1042- ``ERRATA_X4_2740089``: This applies errata 2740089 workaround to Cortex-X4 1043 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed 1044 in r0p2. 1045 1046- ``ERRATA_X4_2763018``: This applies errata 2763018 workaround to Cortex-X4 1047 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1048 1049- ``ERRATA_X4_2816013``: This applies errata 2816013 workaround to Cortex-X4 1050 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1051 1052- ``ERRATA_X4_2897503``: This applies errata 2897503 workaround to Cortex-X4 1053 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1054 1055- ``ERRATA_X4_2923985``: This applies errata 2923985 workaround to Cortex-X4 1056 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1057 1058- ``ERRATA_X4_2957258``: This applies errata 2957258 workaround to Cortex-X4 1059 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1060 1061- ``ERRATA_X4_3076789``: This applies errata 3076789 workaround to Cortex-X4 1062 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1063 1064- ``ERRATA_X4_3133195``: This applies errata 3133195 workaround to Cortex-X4 1065 CPU. This needs to be enabled for revision r0p2. It is fixed in r0p3. 1066 1067- ``ERRATA_X4_3701758``: This applies errata 3701758 workaround to Cortex-X4 1068 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3. 1069 It is still open. 1070 1071- ``ERRATA_X4_3887999``: This applies errata 3887999 workaround to Cortex-X4 1072 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2 and r0p3. 1073 It is still open. 1074 1075For Cortex-X925, the following errata build flags are defined : 1076 1077- ``ERRATA_X925_2921199``: This applies errata 2921199 workaround to Cortex-X925 1078 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1079 1080- ``ERRATA_X925_2922378``: This applies errata 2922378 workaround to Cortex-X925 1081 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1082 1083- ``ERRATA_X925_2933290``: This applies errata 2933290 workaround to Cortex-X925 1084 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1085 1086- ``ERRATA_X925_2963999``: This applies errata 2963999 workaround to Cortex-X925 1087 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1088 1089- ``ERRATA_X925_3324334``: This applies errata 3324334 workaround to Cortex-X925 1090 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1091 1092- ``ERRATA_X925_3692980``: This applies errata 3692980 workaround to Cortex-X925 1093 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1094 1095- ``ERRATA_X925_3730893``: This applies errata 3730893 workaround to Cortex-X925 1096 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1097 1098- ``ERRATA_X925_3865185``: This applies errata 3865185 workaround to Cortex-X925 1099 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1100 1101- ``ERRATA_X925_3701747``: This applies errata 3701747 workaround to Cortex-X925 1102 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is still open. 1103 1104For Cortex-A510, the following errata build flags are defined : 1105 1106- ``ERRATA_A510_2008766``: This applies errata 2008766 workaround to 1107 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1108 r0p3, r1p0, r1p1, r1p2 and r1p3. It is still open. 1109 1110- ``ERRATA_A510_2288014``: This applies errata 2288014 workaround to 1111 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1, 1112 r0p2, r0p3 and r1p0, it is fixed in r1p1. 1113 1114- ``ERRATA_A510_2042739``: This applies errata 2042739 workaround to 1115 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1 and 1116 r0p2, it is fixed in r0p3. 1117 1118- ``ERRATA_A510_2041909``: This applies errata 2041909 workaround to 1119 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is fixed 1120 in r0p3. The issue is also present in r0p0 and r0p1 but there is no 1121 workaround for those revisions. 1122 1123- ``ERRATA_A510_2080326``: This applies errata 2080326 workaround to 1124 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is 1125 fixed in r0p3. This issue is also present in r0p0 and r0p1 but there is no 1126 workaround for those revisions. 1127 1128- ``ERRATA_A510_2169012``: This applies errata 2169012 workaround to 1129 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1, 1130 r0p2, r0p3 and r1p0, it is fixed in r1p1. 1131 1132- ``ERRATA_A510_2218134``: This applies errata 2218134 workaround to 1133 Cortex-A510 CPU. This needs to be enabled only for revision r1p0 and is fixed 1134 in r1p1. 1135 1136- ``ERRATA_A510_2250311``: This applies errata 2250311 workaround to 1137 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1138 r0p3 and r1p0, it is fixed in r1p1. This workaround disables MPMM even if 1139 ENABLE_MPMM=1. 1140 1141- ``ERRATA_A510_2218950``: This applies errata 2218950 workaround to 1142 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1143 r0p3 and r1p0, it is fixed in r1p1. 1144 1145- ``ERRATA_A510_2172148``: This applies errata 2172148 workaround to 1146 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1147 r0p3 and r1p0, it is fixed in r1p1. 1148 1149- ``ERRATA_A510_2347730``: This applies errata 2347730 workaround to 1150 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1151 r0p3, r1p0 and r1p1. It is fixed in r1p2. 1152 1153- ``ERRATA_A510_2371937``: This applies errata 2371937 workaround to 1154 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2, 1155 r0p3, r1p0, r1p1, and is fixed in r1p2. 1156 1157- ``ERRATA_A510_2420992``: This applies errata 2420992 workaround to 1158 Cortex-A510 CPU. This needs to applied for revisions r1p0 and r1p1, and is 1159 fixed in r1p2. 1160 1161- ``ERRATA_A510_2666669``: This applies errata 2666669 workaround to 1162 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2, 1163 r0p3, r1p0, r1p1. It is fixed in r1p2. 1164 1165- ``ERRATA_A510_2684597``: This applies erratum 2684597 workaround to 1166 Cortex-A510 CPU. This needs to be applied to revision r0p0, r0p1, r0p2, 1167 r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. 1168 1169- ``ERRATA_A510_2971420``: This applies erratum 2971420 workaround to 1170 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1171 r1p0, r1p1, r1p2 and r1p3 and is still open. 1172 1173- ``ERRATA_A510_3672349``: This applies erratum 3672349 workaround to 1174 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1175 r1p0, r1p1, r1p2 and r1p3 and is still open. 1176 1177- ``ERRATA_A510_3704847``: This applies erratum 3704847 workaround to 1178 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1179 r1p0, r1p1, r1p2 and r1p3 and is still open. 1180 1181For Cortex-A520, the following errata build flags are defined : 1182 1183- ``ERRATA_A520_2630792``: This applies errata 2630792 workaround to 1184 Cortex-A520 CPU. This needs to applied for revisions r0p0, r0p1 of the 1185 CPU and is still open. 1186 1187- ``ERRATA_A520_2858100``: This applies errata 2858100 workaround to 1188 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1189 It is still open. 1190 1191- ``ERRATA_A520_2938996``: This applies errata 2938996 workaround to 1192 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1193 It is fixed in r0p2. 1194 1195For Cortex-A715, the following errata build flags are defined : 1196 1197- ``ERRATA_A715_2331818``: This applies errata 2331818 workaround to 1198 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. 1199 It is fixed in r1p1. 1200 1201- ``ERRATA_A715_2344187``: This applies errata 2344187 workaround to 1202 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is 1203 fixed in r1p1. 1204 1205- ``ERRATA_A715_2376701``: This applies errata 2376701 workaround to 1206 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is 1207 fixed in r1p1. 1208 1209- ``ERRATA_A715_2409570``: This applies errata 2409570 workaround to 1210 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1211 It is fixed in r1p1. This errata also applies to r0p0 but that revision has a 1212 different workaround, and since r0p0 is not used in production hardware it is 1213 not implemented. 1214 1215- ``ERRATA_A715_2413290``: This applies errata 2413290 workaround to 1216 Cortex-A715 CPU. This needs to be enabled only for revision r1p0 and 1217 when SPE(Statistical profiling extension)=True. The errata is fixed 1218 in r1p1. 1219 1220- ``ERRATA_A715_2420947``: This applies errata 2420947 workaround to 1221 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1222 It is fixed in r1p1. 1223 1224- ``ERRATA_A715_2429384``: This applies errata 2429384 workaround to 1225 Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no 1226 workaround for revision r0p0. It is fixed in r1p1. 1227 1228- ``ERRATA_A715_2561034``: This applies errata 2561034 workaround to 1229 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1230 It is fixed in r1p1. 1231 1232- ``ERRATA_A715_2728106``: This applies errata 2728106 workaround to 1233 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0 1234 and r1p1. It is fixed in r1p2. 1235 1236- ``ERRATA_A715_2804830``: This applies errata 2804830 workaround to 1237 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1238 r1p1 and r1p2. It is fixed in r1p3. 1239 1240- ``ERRATA_A715_3456084``: This applies errata 3456084 workaround to 1241 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1242 r1p1, r1p2 and r1p3. It is still open. 1243 1244- ``ERRATA_A715_3699560``: This applies errata 3699560 workaround to 1245 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1246 r1p2 and r1p3. It is still open. 1247 1248- ``ERRATA_A715_3711916``: This applies errata 3711916 workaround to 1249 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1250 r1p1, r1p2 and r1p3. It is still open. 1251 1252For Cortex-A720, the following errata build flags are defined : 1253 1254- ``ERRATA_A720_2729604``: This applies errata 2729604 workaround to 1255 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1256 It is fixed in r0p2. 1257 1258- ``ERRATA_A720_2792132``: This applies errata 2792132 workaround to 1259 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1260 It is fixed in r0p2. 1261 1262- ``ERRATA_A720_2844092``: This applies errata 2844092 workaround to 1263 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1264 It is fixed in r0p2. 1265 1266- ``ERRATA_A720_2926083``: This applies errata 2926083 workaround to 1267 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1268 It is fixed in r0p2. 1269 1270- ``ERRATA_A720_2940794``: This applies errata 2940794 workaround to 1271 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1272 It is fixed in r0p2. 1273 1274- ``ERRATA_A720_3456091``: This applies errata 3456091 workaround to 1275 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1276 and r0p2. It is still open. 1277 1278- ``ERRATA_A720_3699561``: This applies errata 3699561 workaround to 1279 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1280 and r0p2. It is still open. 1281 1282- ``ERRATA_A720_3711910``: This applies errata 3711910 workaround to 1283 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1284 and r0p2. It is still open. 1285 1286For Cortex-A720_AE, the following errata build flags are defined : 1287 1288- ``ERRATA_A720_AE_3456103``: This applies errata 3456103 workaround to 1289 Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0 and r0p1. It 1290 is still open. 1291 1292- ``ERRATA_A720_AE_3699562``: This applies errata 3699562 workaround 1293 to Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0. 1294 It is still open. 1295 1296For Cortex-A725, the following errata build flags are defined : 1297 1298- ``ERRATA_A725_2874943``: This applies errata 2874943 workaround to 1299 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 when 1300 FEAT_SPE is enabled. It is fixed in r0p1. 1301 1302- ``ERRATA_A725_2936490``: This applies errata 2936490 workaround to 1303 Cortex-A725 CPU. This needs to be enabled for revisions r0p0. 1304 It is fixed in r0p1. 1305 1306- ``ERRATA_A725_3456106``: This applies errata 3456106 workaround to 1307 Cortex-A725 CPU. This needs to be enabled for revisions r0p0, r0p1 1308 and r0p2. It is still open. 1309 1310- ``ERRATA_A725_3699564``: This applies errata 3699564 workaround to 1311 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1312 It is fixed in r0p2. 1313 1314- ``ERRATA_A725_3711914``: This applies errata 3711914 workaround to 1315 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1316 It is fixed in r0p2. 1317 1318For C1-Ultra, the following errata build flags are defined : 1319 1320- ``ERRATA_C1ULTRA_3324333``: This applies erratum 3324333 workaround to 1321 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is fixed 1322 in r1p0. 1323 1324- ``ERRATA_C1ULTRA_3502731``: This applies erratum 3502731 workaround to 1325 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is 1326 fixed in r1p0. 1327 1328- ``ERRATA_C1ULTRA_3658374``: This applies erratum 3658374 workaround to 1329 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1330 is still open. 1331 1332- ``ERRATA_C1ULTRA_3684152``: This applies erratum 3684152 workaround to 1333 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is 1334 fixed in r1p0. 1335 1336- ``ERRATA_C1ULTRA_3705939``: This applies erratum 3705939 workaround to 1337 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1338 is still open. 1339 1340- ``ERRATA_C1ULTRA_3815514``: This applies erratum 3815514 workaround to 1341 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1342 is still open. 1343 1344- ``ERRATA_C1ULTRA_3865171``: This applies erratum 3865171 workaround to 1345 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1346 is still open. 1347 1348- ``ERRATA_C1ULTRA_3926381``: This applies erratum 3926381 workaround to 1349 C1-Ultra CPU. This needs to be enabled for revision r1p0 and is still 1350 open. 1351 1352- ``ERRATA_C1ULTRA_4102704``: This applies erratum 4102704 workaround to 1353 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1354 is still open. 1355 1356For C1-Premium, the following errata build flags are defined : 1357 1358- ``ERRATA_C1PREMIUM_3324333``: This applies errata 3324333 workaround to 1359 C1-Premium CPU. This needs to be enabled for revision r0p0, and is 1360 fixed in r1p0. 1361 1362- ``ERRATA_C1PREMIUM_3502731``: This applies errata 3502731 workaround to 1363 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1364 in r1p0. 1365 1366- ``ERRATA_C1PREMIUM_3684152``: This applies errata 3684152 workaround to 1367 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1368 in r1p0. 1369 1370- ``ERRATA_C1PREMIUM_3705939``: This applies errata 3705939 workaround to 1371 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1372 is still open. 1373 1374- ``ERRATA_C1PREMIUM_3815514``: This applies errata 3815514 workaround to 1375 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1376 is still open. 1377 1378- ``ERRATA_C1PREMIUM_3865171``: This applies errata 3865171 workaround to 1379 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1380 is still open. 1381 1382- ``ERRATA_C1PREMIUM_3926381``: This applies errata 3926381 workaround to 1383 C1-Premium CPU. This needs to be enabled for revision r1p0 and is 1384 still open. 1385 1386- ``ERRATA_C1PREMIUM_4102704``: This applies errata 4102704 workaround to 1387 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1388 is still open. 1389 1390For C1-Pro, the following errata build flags are defined : 1391 1392- ``ERRATA_C1PRO_3619847``: This applies errata 3619847 workaround to C1-Pro 1393 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1394 1395- ``ERRATA_C1PRO_3338470``: This applies errata 3338470 workaround to C1-Pro 1396 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1397 1398- ``ERRATA_C1PRO_3362007``: This applies errata 3362007 workaround to C1-Pro 1399 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1400 1401- ``ERRATA_C1PRO_3686597``: This applies errata 3686597 workaround to C1-Pro 1402 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1403 is fixed in r1p1. 1404 1405- ``ERRATA_C1PRO_3694158``: This applies errata 3694158 workaround to C1-Pro 1406 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 and is 1407 fixed in r1p2. 1408 1409- ``ERRATA_C1PRO_3706576``: This applies errata 3706576 workaround to C1-Pro 1410 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1411 is fixed in r1p1. 1412 1413- ``ERRATA_C1PRO_3300099``: This applies errata 3300099 workaround to C1-Pro 1414 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1415 is fixed in r1p1. 1416 1417For C1-Nano, the following errata build flags are defined : 1418 1419- ``ERRATA_C1NANO_3392149``: This applies errata 3392149 workaround to 1420 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1421 in r0p1. 1422 1423- ``ERRATA_C1NANO_3419531``: This applies errata 3419531 workaround to 1424 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1425 in r0p1. 1426 1427- ``ERRATA_C1NANO_3437202``: This applies errata 3437202 workaround to 1428 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1429 in r0p1. 1430 1431- ``ERRATA_C1NANO_3516455``: This applies errata 3516455 workaround to 1432 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1433 in r0p1. 1434 1435- ``ERRATA_C1NANO_3616450``: This applies errata 3616450 workaround to 1436 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1437 in r0p1. 1438 1439- ``ERRATA_C1NANO_3630925``: This applies errata 3630925 workaround to 1440 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1441 in r0p1. 1442 1443- ``ERRATA_C1NANO_3754876``: This applies errata 3754876 workaround to 1444 C1-Nano CPU. This needs to be enabled for revisions r0p0 and r0p1, and 1445 is fixed in r0p2. 1446 1447DSU Errata Workarounds 1448---------------------- 1449 1450Similar to CPU errata, TF-A also implements workarounds for DSU (DynamIQ 1451Shared Unit) errata. The DSU errata details can be found in the respective Arm 1452documentation: 1453 1454- `Arm DSU Software Developers Errata Notice`_. 1455 1456Each erratum is identified by an ``ID``, as defined in the DSU errata notice 1457document. Thus, the build flags which enable/disable the errata workarounds 1458have the format ``ERRATA_DSU_<ID>``. The implementation and application logic 1459of DSU errata workarounds are similar to `CPU errata workarounds`_. 1460 1461For DSU errata, the following build flags are defined: 1462 1463- ``ERRATA_DSU_798953``: This applies errata 798953 workaround for the 1464 affected DSU configurations. This errata applies only for those DSUs that 1465 revision is r0p0 (on r0p1 it is fixed). However, please note that this 1466 workaround results in increased DSU power consumption on idle. 1467 1468- ``ERRATA_DSU_936184``: This applies errata 936184 workaround for the 1469 affected DSU configurations. This errata applies only for those DSUs that 1470 contain the ACP interface **and** the DSU revision is older than r2p0 (on 1471 r2p0 it is fixed). However, please note that this workaround results in 1472 increased DSU power consumption on idle. 1473 1474- ``ERRATA_DSU_2313941``: This applies errata 2313941 workaround for the 1475 affected DSU configurations. This errata applies for those DSUs with 1476 revisions r0p0, r1p0, r2p0, r2p1, r3p0, r3p1 and is still open. However, 1477 please note that this workaround results in increased DSU power consumption 1478 on idle. 1479 1480- ``ERRATA_DSU_2900952``: This applies errata 2900952 workaround for the 1481 affected DSU-120 configurations. This erratum applies to some r2p0 1482 implementations and is fixed in r2p1. The affected r2p0 implementations 1483 are determined by reading the IMP_CLUSTERREVIDR_EL1[1] register bit 1484 and making sure it's clear. 1485 1486CPU Specific optimizations 1487-------------------------- 1488 1489This section describes some of the optimizations allowed by the CPU micro 1490architecture that can be enabled by the platform as desired. 1491 1492- ``SKIP_A57_L1_FLUSH_PWR_DWN``: This flag enables an optimization in the 1493 Cortex-A57 cluster power down sequence by not flushing the Level 1 data 1494 cache. The L1 data cache and the L2 unified cache are inclusive. A flush 1495 of the L2 by set/way flushes any dirty lines from the L1 as well. This 1496 is a known safe deviation from the Cortex-A57 TRM defined power down 1497 sequence. Each Cortex-A57 based platform must make its own decision on 1498 whether to use the optimization. 1499 1500- ``A53_DISABLE_NON_TEMPORAL_HINT``: This flag disables the cache non-temporal 1501 hint. The LDNP/STNP instructions as implemented on Cortex-A53 do not behave 1502 in a way most programmers expect, and will most probably result in a 1503 significant speed degradation to any code that employs them. The Armv8-A 1504 architecture (see Arm DDI 0487A.h, section D3.4.3) allows cores to ignore 1505 the non-temporal hint and treat LDNP/STNP as LDP/STP instead. Enabling this 1506 flag enforces this behaviour. This needs to be enabled only for revisions 1507 <= r0p3 of the CPU and is enabled by default. 1508 1509- ``A57_DISABLE_NON_TEMPORAL_HINT``: This flag has the same behaviour as 1510 ``A53_DISABLE_NON_TEMPORAL_HINT`` but for Cortex-A57. This needs to be 1511 enabled only for revisions <= r1p2 of the CPU and is enabled by default, 1512 as recommended in section "4.7 Non-Temporal Loads/Stores" of the 1513 `Cortex-A57 Software Optimization Guide`_. 1514 1515- ''A57_ENABLE_NON_CACHEABLE_LOAD_FWD'': This flag enables non-cacheable 1516 streaming enhancement feature for Cortex-A57 CPUs. Platforms can set 1517 this bit only if their memory system meets the requirement that cache 1518 line fill requests from the Cortex-A57 processor are atomic. Each 1519 Cortex-A57 based platform must make its own decision on whether to use 1520 the optimization. This flag is disabled by default. 1521 1522- ``NEOVERSE_Nx_EXTERNAL_LLC``: This flag indicates that an external last 1523 level cache(LLC) is present in the system, and that the DataSource field 1524 on the master CHI interface indicates when data is returned from the LLC. 1525 This is used to control how the LL_CACHE* PMU events count. 1526 Default value is 0 (Disabled). 1527 1528- ``NEOVERSE_Vx_EXTERNAL_LLC``: This flag has the same behaviour as 1529 ``NEOVERSE_Nx_EXTERNAL_LLC`` but for Neoverse-V2. This is disabled 1530 by default. Default value is 0 (Disabled). 1531 1532- ``NEOVERSE_N2_PREFETCHER_DISABLE``: This flag disables the region prefetcher 1533 on the Neoverse N2 core. This is used during performance analysis to get clean 1534 and repeatable measurements of the cache by preventing speculative data fetches 1535 from interfering with benchmark results. 1536 Default value is 0 (Disabled). 1537 1538GIC Errata Workarounds 1539---------------------- 1540- ``GIC600_ERRATA_WA_2384374``: This flag applies part 2 of errata 2384374 1541 workaround for the affected GIC600 and GIC600-AE implementations. It applies 1542 to implementations of GIC600 and GIC600-AE with revisions less than or equal 1543 to r1p6 and r0p2 respectively. If the platform sets GICV3_SUPPORT_GIC600, 1544 then this flag is enabled; otherwise, it is 0 (Disabled). 1545 1546-------------- 1547 1548*Copyright (c) 2014-2026, Arm Limited and Contributors. All rights reserved.* 1549 1550.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715 1551.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639 1552.. _CVE-2022-23960: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2022-23960 1553.. _CVE-2024-5660: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-5660 1554.. _CVE-2024-7881: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-7881 1555.. _Cortex-A72 MPCore Software Developers Errata Notice: https://developer.arm.com/documentation/epm012079/latest 1556.. _Cortex-A57 Software Optimization Guide: https://developer.arm.com/documentation/uan0015 1557.. _Arm DSU Software Developers Errata Notice: https://developer.arm.com/documentation/SDEN854652 1558