1Arm CPU Specific Build Macros 2============================= 3 4This document describes the various build options present in the CPU specific 5operations framework to enable errata workarounds and to enable optimizations 6for a specific CPU on a platform. 7 8Security Vulnerability Workarounds 9---------------------------------- 10 11TF-A exports a series of build flags which control which security 12vulnerability workarounds should be applied at runtime. 13 14- ``WORKAROUND_CVE_2017_5715``: Enables the security workaround for 15 `CVE-2017-5715`_. This flag can be set to 0 by the platform if none 16 of the PEs in the system need the workaround. Setting this flag to 0 provides 17 no performance benefit for non-affected platforms, it just helps to comply 18 with the recommendation in the spec regarding workaround discovery. 19 Defaults to 1. 20 21- ``WORKAROUND_CVE_2018_3639``: Enables the security workaround for 22 `CVE-2018-3639`_. Defaults to 1. The TF-A project recommends to keep 23 the default value of 1 even on platforms that are unaffected by 24 CVE-2018-3639, in order to comply with the recommendation in the spec 25 regarding workaround discovery. 26 27- ``DYNAMIC_WORKAROUND_CVE_2018_3639``: Enables dynamic mitigation for 28 `CVE-2018-3639`_. This build option should be set to 1 if the target 29 platform contains at least 1 CPU that requires dynamic mitigation. 30 Defaults to 0. 31 32- ``WORKAROUND_CVE_2022_23960``: Enables mitigation for `CVE-2022-23960`_. 33 This build option should be set to 1 if the target platform contains at 34 least 1 CPU that requires this mitigation. Defaults to 1. 35 36- ``WORKAROUND_CVE_2024_5660``: Enables mitigation for `CVE-2024-5660`. 37 The fix is to disable hardware page aggregation by setting CPUECTLR_EL1[46] 38 in EL3 FW. This build option should be set to 1 if the target platform contains 39 at least 1 CPU that requires this mitigation. Defaults to 1. 40 41- ``WORKAROUND_CVE_2024_7881``: Enables mitigation for `CVE-2024-7881`. 42 This build option should be set to 1 if the target platform contains at 43 least 1 CPU that requires this mitigation. Defaults to 1. 44 45- ``WORKAROUND_CVE_2025_0647``: Enables mitigation for `CVE-2025-0647`. 46 This build option should be set to 1 if the target platform contains at 47 least 1 CPU that requires this mitigation. Defaults to 1. 48 49.. _arm_cpu_macros_errata_workarounds: 50 51CPU Errata Workarounds 52---------------------- 53 54TF-A exports a series of build flags which control the errata workarounds that 55are applied to each CPU by the reset handler. The errata details can be found 56in the CPU specific errata documents published by Arm: 57For example: `Cortex-A72 MPCore Software Developers Errata Notice`_ 58 59The errata workarounds are implemented for a particular revision or a set of 60processor revisions. This is checked by the reset handler at runtime. Each 61errata workaround is identified by its ``ID`` as specified in the processor's 62errata notice document. The format of the define used to enable/disable the 63errata workaround is ``ERRATA_<Processor name>_<ID>``, where the ``Processor name`` 64is for example ``A57`` for the ``Cortex_A57`` CPU. 65 66Refer to :ref:`firmware_design_cpu_errata_implementation` for information on how to 67write errata workaround functions. 68 69All workarounds are disabled by default. The platform is responsible for 70enabling these workarounds according to its requirement by defining the 71errata workaround build flags in the platform specific makefile. In case 72these workarounds are enabled for the wrong CPU revision then the errata 73workaround is not applied. In the DEBUG build, this is indicated by 74printing a warning to the crash console. 75 76In the current implementation, a platform which has more than 1 variant 77with different revisions of a processor has no runtime mechanism available 78for it to specify which errata workarounds should be enabled or not. 79 80The value of the build flags is 0 by default, that is, disabled. A value of 1 81will enable it. 82 83For Cortex-A9, the following errata build flags are defined : 84 85- ``ERRATA_A9_794073``: This applies errata 794073 workaround to Cortex-A9 86 CPU. This needs to be enabled for all revisions of the CPU. 87 88For Cortex-A15, the following errata build flags are defined : 89 90- ``ERRATA_A15_816470``: This applies errata 816470 workaround to Cortex-A15 91 CPU. This needs to be enabled only for revision >= r3p0 of the CPU. 92 93- ``ERRATA_A15_827671``: This applies errata 827671 workaround to Cortex-A15 94 CPU. This needs to be enabled only for revision >= r3p0 of the CPU. 95 96For Cortex-A17, the following errata build flags are defined : 97 98- ``ERRATA_A17_852421``: This applies errata 852421 workaround to Cortex-A17 99 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 100 101- ``ERRATA_A17_852423``: This applies errata 852423 workaround to Cortex-A17 102 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 103 104For Cortex-A35, the following errata build flags are defined : 105 106- ``ERRATA_A35_855472``: This applies errata 855472 workaround to Cortex-A35 107 CPUs. This needs to be enabled only for revision r0p0 of Cortex-A35. 108 109For Cortex-A53, the following errata build flags are defined : 110 111- ``ERRATA_A53_819472``: This applies errata 819472 workaround to all 112 CPUs. This needs to be enabled only for revision <= r0p1 of Cortex-A53. 113 114- ``ERRATA_A53_824069``: This applies errata 824069 workaround to all 115 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53. 116 117- ``ERRATA_A53_826319``: This applies errata 826319 workaround to Cortex-A53 118 CPU. This needs to be enabled only for revision <= r0p2 of the CPU. 119 120- ``ERRATA_A53_827319``: This applies errata 827319 workaround to all 121 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53. 122 123- ``ERRATA_A53_835769``: This applies erratum 835769 workaround at compile and 124 link time to Cortex-A53 CPU. This needs to be enabled for some variants of 125 revision <= r0p4. This workaround can lead the linker to create ``*.stub`` 126 sections. 127 128- ``ERRATA_A53_836870``: This applies errata 836870 workaround to Cortex-A53 129 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From 130 r0p4 and onwards, this errata is enabled by default in hardware. Identical to 131 ``A53_DISABLE_NON_TEMPORAL_HINT``. 132 133- ``ERRATA_A53_843419``: This applies erratum 843419 workaround at link time 134 to Cortex-A53 CPU. This needs to be enabled for some variants of revision 135 <= r0p4. This workaround can lead the linker to emit ``*.stub`` sections 136 which are 4kB aligned. 137 138- ``ERRATA_A53_855873``: This applies errata 855873 workaround to Cortex-A53 139 CPUs. Though the erratum is present in every revision of the CPU, 140 this workaround is only applied to CPUs from r0p3 onwards, which feature 141 a chicken bit in CPUACTLR_EL1 to enable a hardware workaround. 142 Earlier revisions of the CPU have other errata which require the same 143 workaround in software, so they should be covered anyway. 144 145- ``ERRATA_A53_1530924``: This applies errata 1530924 workaround to all 146 revisions of Cortex-A53 CPU. 147 148For Cortex-A55, the following errata build flags are defined : 149 150- ``ERRATA_A55_768277``: This applies errata 768277 workaround to Cortex-A55 151 CPU. This needs to be enabled only for revision r0p0 of the CPU. 152 153- ``ERRATA_A55_778703``: This applies errata 778703 workaround to Cortex-A55 154 CPU. This needs to be enabled only for revision r0p0 of the CPU. 155 156- ``ERRATA_A55_798797``: This applies errata 798797 workaround to Cortex-A55 157 CPU. This needs to be enabled only for revision r0p0 of the CPU. 158 159- ``ERRATA_A55_846532``: This applies errata 846532 workaround to Cortex-A55 160 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 161 162- ``ERRATA_A55_903758``: This applies errata 903758 workaround to Cortex-A55 163 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 164 165- ``ERRATA_A55_1221012``: This applies errata 1221012 workaround to Cortex-A55 166 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 167 168- ``ERRATA_A55_1530923``: This applies errata 1530923 workaround to all 169 revisions of Cortex-A55 CPU. 170 171For Cortex-A57, the following errata build flags are defined : 172 173- ``ERRATA_A57_806969``: This applies errata 806969 workaround to Cortex-A57 174 CPU. This needs to be enabled only for revision r0p0 of the CPU. 175 176- ``ERRATA_A57_813419``: This applies errata 813419 workaround to Cortex-A57 177 CPU. This needs to be enabled only for revision r0p0 of the CPU. 178 179- ``ERRATA_A57_813420``: This applies errata 813420 workaround to Cortex-A57 180 CPU. This needs to be enabled only for revision r0p0 of the CPU. 181 182- ``ERRATA_A57_814670``: This applies errata 814670 workaround to Cortex-A57 183 CPU. This needs to be enabled only for revision r0p0 of the CPU. 184 185- ``ERRATA_A57_817169``: This applies errata 817169 workaround to Cortex-A57 186 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 187 188- ``ERRATA_A57_826974``: This applies errata 826974 workaround to Cortex-A57 189 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 190 191- ``ERRATA_A57_826977``: This applies errata 826977 workaround to Cortex-A57 192 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 193 194- ``ERRATA_A57_828024``: This applies errata 828024 workaround to Cortex-A57 195 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 196 197- ``ERRATA_A57_829520``: This applies errata 829520 workaround to Cortex-A57 198 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 199 200- ``ERRATA_A57_833471``: This applies errata 833471 workaround to Cortex-A57 201 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. 202 203- ``ERRATA_A57_859972``: This applies errata 859972 workaround to Cortex-A57 204 CPU. This needs to be enabled only for revision <= r1p3 of the CPU. 205 206- ``ERRATA_A57_1319537``: This applies errata 1319537 workaround to all 207 revisions of Cortex-A57 CPU. 208 209For Cortex-A65, the following errata build flags are defined : 210 211- ``ERRATA_A65_1179935``: This applies errata 1179935 workaround to Cortex-A65 212 CPU. This needs to be enabled only for revision r0p0 of the CPU, and is fixed 213 in r1p0. 214 215- ``ERRATA_A65_1227419``: This applies errata 1227419 workaround to Cortex-A65 216 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU and 217 is fixed in r1p1. 218 219- ``ERRATA_A65_1541130``: This applies errata 1541130 workaround to r0p0, r1p0, 220 r1p1, r1p2 revisions of the CPU and is still open. 221 222For Cortex-A72, the following errata build flags are defined : 223 224- ``ERRATA_A72_859971``: This applies errata 859971 workaround to Cortex-A72 225 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. 226 227- ``ERRATA_A72_1319367``: This applies errata 1319367 workaround to all 228 revisions of Cortex-A72 CPU. 229 230For Cortex-A73, the following errata build flags are defined : 231 232- ``ERRATA_A73_852427``: This applies errata 852427 workaround to Cortex-A73 233 CPU. This needs to be enabled only for revision r0p0 of the CPU. 234 235- ``ERRATA_A73_855423``: This applies errata 855423 workaround to Cortex-A73 236 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. 237 238For Cortex-A75, the following errata build flags are defined : 239 240- ``ERRATA_A75_764081``: This applies errata 764081 workaround to Cortex-A75 241 CPU. This needs to be enabled only for revision r0p0 of the CPU. 242 243- ``ERRATA_A75_790748``: This applies errata 790748 workaround to Cortex-A75 244 CPU. This needs to be enabled only for revision r0p0 of the CPU. 245 246For Cortex-A76, the following errata build flags are defined : 247 248- ``ERRATA_A76_1073348``: This applies errata 1073348 workaround to Cortex-A76 249 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 250 251- ``ERRATA_A76_1130799``: This applies errata 1130799 workaround to Cortex-A76 252 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 253 254- ``ERRATA_A76_1220197``: This applies errata 1220197 workaround to Cortex-A76 255 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 256 257- ``ERRATA_A76_1257314``: This applies errata 1257314 workaround to Cortex-A76 258 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 259 260- ``ERRATA_A76_1262606``: This applies errata 1262606 workaround to Cortex-A76 261 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 262 263- ``ERRATA_A76_1262888``: This applies errata 1262888 workaround to Cortex-A76 264 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 265 266- ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76 267 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 268 269- ``ERRATA_A76_1791580``: This applies errata 1791580 workaround to Cortex-A76 270 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 271 272- ``ERRATA_A76_1165522``: This applies errata 1165522 workaround to all 273 revisions of Cortex-A76 CPU. This errata is fixed in r3p0 but due to 274 limitation of errata framework this errata is applied to all revisions 275 of Cortex-A76 CPU. 276 277- ``ERRATA_A76_1868343``: This applies errata 1868343 workaround to Cortex-A76 278 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 279 280- ``ERRATA_A76_1946160``: This applies errata 1946160 workaround to Cortex-A76 281 CPU. This needs to be enabled only for revisions r3p0 - r4p1 of the CPU. 282 283- ``ERRATA_A76_2743102``: This applies errata 2743102 workaround to Cortex-A76 284 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 285 still open. 286 287For Cortex-A76AE, the following errata build flags are defined : 288 289- ``ERRATA_A76AE_1931427``: This applies errata 1931427 workaround to Cortex-A76AE 290 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 291 fixed in r1p1. 292 293- ``ERRATA_A76AE_1931435``: This applies errata 1931435 workaround to Cortex-A76AE 294 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 295 fixed in r1p1. 296 297- ``ERRATA_A76AE_1969401``: This applies errata 1969401 workaround to Cortex-A76AE 298 CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is 299 fixed in r1p1. 300 301- ``ERRATA_A76AE_2371140``: This applies errata 2371140 workaround to Cortex-A76AE 302 CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is 303 still open. 304 305- ``ERRATA_A76AE_2753838``: This applies errata 2753838 workaround to Cortex-A76AE 306 CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is 307 still open. 308 309For Cortex-A77, the following errata build flags are defined : 310 311- ``ERRATA_A77_1508412``: This applies errata 1508412 workaround to Cortex-A77 312 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 313 314- ``ERRATA_A77_1925769``: This applies errata 1925769 workaround to Cortex-A77 315 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 316 317- ``ERRATA_A77_1946167``: This applies errata 1946167 workaround to Cortex-A77 318 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. 319 320- ``ERRATA_A77_1791578``: This applies errata 1791578 workaround to Cortex-A77 321 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 322 323- ``ERRATA_A77_2356587``: This applies errata 2356587 workaround to Cortex-A77 324 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 325 326 - ``ERRATA_A77_1800714``: This applies errata 1800714 workaround to Cortex-A77 327 CPU. This needs to be enabled for revisions <= r1p1 of the CPU. 328 329 - ``ERRATA_A77_2743100``: This applies errata 2743100 workaround to Cortex-A77 330 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 331 332For Cortex-A78, the following errata build flags are defined : 333 334- ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78 335 CPU. This needs to be enabled only for revision r0p0 - r1p0 of the CPU. 336 337- ``ERRATA_A78_1941498``: This applies errata 1941498 workaround to Cortex-A78 338 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the CPU. 339 340- ``ERRATA_A78_1951500``: This applies errata 1951500 workaround to Cortex-A78 341 CPU. This needs to be enabled for revisions r1p0 and r1p1, r0p0 has the same 342 issue but there is no workaround for that revision. 343 344- ``ERRATA_A78_1821534``: This applies errata 1821534 workaround to Cortex-A78 345 CPU. This needs to be enabled for revisions r0p0 and r1p0. 346 347- ``ERRATA_A78_1952683``: This applies errata 1952683 workaround to Cortex-A78 348 CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0. 349 350- ``ERRATA_A78_2242635``: This applies errata 2242635 workaround to Cortex-A78 351 CPU. This needs to be enabled for revisions r1p0, r1p1, and r1p2. The issue 352 is present in r0p0 but there is no workaround. It is still open. 353 354- ``ERRATA_A78_2376745``: This applies errata 2376745 workaround to Cortex-A78 355 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 356 it is still open. 357 358- ``ERRATA_A78_2395406``: This applies errata 2395406 workaround to Cortex-A78 359 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 360 it is still open. 361 362- ``ERRATA_A78_2712571``: This applies erratum 2712571 workaround to Cortex-A78 363 CPU, this erratum affects system configurations that do not use an ARM 364 interconnect IP. This needs to be enabled for revisions r0p0, r1p0, r1p1 365 and r1p2 and it is still open. 366 367- ``ERRATA_A78_2742426``: This applies erratum 2742426 workaround to Cortex-A78 368 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and 369 it is still open. 370 371- ``ERRATA_A78_2772019``: This applies errata 2772019 workaround to Cortex-A78 372 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and 373 it is still open. 374 375- ``ERRATA_A78_2779479``: This applies erratum 2779479 workaround to Cortex-A78 376 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and 377 it is still open. 378 379For Cortex-A78AE, the following errata build flags are defined : 380 381- ``ERRATA_A78_AE_1941500`` : This applies errata 1941500 workaround to 382 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. 383 This erratum is still open. 384 385- ``ERRATA_A78_AE_1951502`` : This applies errata 1951502 workaround to 386 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This 387 erratum is still open. 388 389- ``ERRATA_A78_AE_2376748`` : This applies errata 2376748 workaround to 390 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 391 This erratum is still open. 392 393- ``ERRATA_A78_AE_2395408`` : This applies errata 2395408 workaround to 394 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This 395 erratum is still open. 396 397- ``ERRATA_A78_AE_2712574`` : This applies erratum 2712574 workaround to 398 Cortex-A78AE CPU. This erratum affects system configurations that do not use 399 an ARM interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and 400 r0p2. This erratum is still open. 401 402For Cortex-A78C, the following errata build flags are defined : 403 404- ``ERRATA_A78C_1827430`` : This applies errata 1827430 workaround to 405 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is 406 fixed in r0p1. 407 408- ``ERRATA_A78C_1827440`` : This applies errata 1827440 workaround to 409 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is 410 fixed in r0p1. 411 412- ``ERRATA_A78C_2242638`` : This applies errata 2242638 workaround to 413 Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and 414 it is still open. 415 416- ``ERRATA_A78C_2376749`` : This applies errata 2376749 workaround to 417 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 418 erratum is still open. 419 420- ``ERRATA_A78C_2395411`` : This applies errata 2395411 workaround to 421 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 422 erratum is still open. 423 424- ``ERRATA_A78C_2683027`` : This applies errata 2683027 workaround to 425 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This 426 erratum is still open. 427 428- ``ERRATA_A78C_2712575`` : This applies erratum 2712575 workaround to 429 Cortex-A78C CPU, this erratum affects system configurations that do not use 430 an ARM interconnect IP. This needs to be enabled for revisions r0p1 and r0p2 431 and is still open. 432 433- ``ERRATA_A78C_2743232`` : This applies erratum 2743232 workaround to 434 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. 435 This erratum is still open. 436 437- ``ERRATA_A78C_2772121`` : This applies errata 2772121 workaround to 438 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 439 This erratum is still open. 440 441- ``ERRATA_A78C_2779484`` : This applies errata 2779484 workaround to 442 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. 443 This erratum is still open. 444 445For Cortex-X1 CPU, the following errata build flags are defined: 446 447- ``ERRATA_X1_1821534`` : This applies errata 1821534 workaround to Cortex-X1 448 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 449 450- ``ERRATA_X1_1688305`` : This applies errata 1688305 workaround to Cortex-X1 451 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 452 453- ``ERRATA_X1_1827429`` : This applies errata 1827429 workaround to Cortex-X1 454 CPU. This needs to be enabled only for revision <= r1p0 of the CPU. 455 456For Neoverse N1, the following errata build flags are defined : 457 458- ``ERRATA_N1_1073348``: This applies errata 1073348 workaround to Neoverse-N1 459 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU. 460 461- ``ERRATA_N1_1130799``: This applies errata 1130799 workaround to Neoverse-N1 462 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 463 464- ``ERRATA_N1_1165347``: This applies errata 1165347 workaround to Neoverse-N1 465 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 466 467- ``ERRATA_N1_1207823``: This applies errata 1207823 workaround to Neoverse-N1 468 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 469 470- ``ERRATA_N1_1220197``: This applies errata 1220197 workaround to Neoverse-N1 471 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. 472 473- ``ERRATA_N1_1257314``: This applies errata 1257314 workaround to Neoverse-N1 474 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 475 476- ``ERRATA_N1_1262606``: This applies errata 1262606 workaround to Neoverse-N1 477 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 478 479- ``ERRATA_N1_1262888``: This applies errata 1262888 workaround to Neoverse-N1 480 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 481 482- ``ERRATA_N1_1275112``: This applies errata 1275112 workaround to Neoverse-N1 483 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 484 485- ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1 486 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. 487 488- ``ERRATA_N1_1542419``: This applies errata 1542419 workaround to Neoverse-N1 489 CPU. This needs to be enabled only for revisions r3p0 - r4p0 of the CPU. 490 491- ``ERRATA_N1_1868343``: This applies errata 1868343 workaround to Neoverse-N1 492 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. 493 494- ``ERRATA_N1_1946160``: This applies errata 1946160 workaround to Neoverse-N1 495 CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for 496 revisions r0p0, r1p0, and r2p0 there is no workaround. 497 498- ``ERRATA_N1_2743102``: This applies errata 2743102 workaround to Neoverse-N1 499 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 500 still open. 501 502- ``ERRATA_N1_3324349``: This applies errata 3324349 workaround to Neoverse-N1 503 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is 504 still open. 505 506For Neoverse V1, the following errata build flags are defined : 507 508- ``ERRATA_V1_1618635``: This applies errata 1618635 workaround to Neoverse-V1 509 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 510 r1p0. 511 512- ``ERRATA_V1_1774420``: This applies errata 1774420 workaround to Neoverse-V1 513 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 514 in r1p1. 515 516- ``ERRATA_V1_1791573``: This applies errata 1791573 workaround to Neoverse-V1 517 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 518 in r1p1. 519 520- ``ERRATA_V1_1852267``: This applies errata 1852267 workaround to Neoverse-V1 521 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed 522 in r1p1. 523 524- ``ERRATA_V1_1925756``: This applies errata 1925756 workaround to Neoverse-V1 525 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open. 526 527- ``ERRATA_V1_1940577``: This applies errata 1940577 workaround to Neoverse-V1 528 CPU. This needs to be enabled only for revision r1p0 and r1p1 of the 529 CPU. 530 531- ``ERRATA_V1_1966096``: This applies errata 1966096 workaround to Neoverse-V1 532 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the 533 issue is present in r0p0 as well but there is no workaround for that 534 revision. It is still open. 535 536- ``ERRATA_V1_2139242``: This applies errata 2139242 workaround to Neoverse-V1 537 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the 538 CPU. It is still open. 539 540- ``ERRATA_V1_2216392``: This applies errata 2216392 workaround to Neoverse-V1 541 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the 542 issue is present in r0p0 as well but there is no workaround for that 543 revision. It is still open. 544 545- ``ERRATA_V1_2294912``: This applies errata 2294912 workaround to Neoverse-V1 546 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 and r1p2 of 547 the CPU. 548 549- ``ERRATA_V1_2348377``: This applies errata 2348377 workaroud to Neoverse-V1 550 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU. 551 It has been fixed in r1p2. 552 553- ``ERRATA_V1_2372203``: This applies errata 2372203 workaround to Neoverse-V1 554 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU. 555 It is still open. 556 557- ``ERRATA_V1_2701953``: This applies erratum 2701953 workaround to Neoverse-V1 558 CPU, this erratum affects system configurations that do not use an ARM 559 interconnect IP. This needs to be enabled for revisions r0p0, r1p0 and r1p1. 560 It has been fixed in r1p2. 561 562- ``ERRATA_V1_2743093``: This applies errata 2743093 workaround to Neoverse-V1 563 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 of the 564 CPU. It is still open. 565 566- ``ERRATA_V1_2743233``: This applies erratum 2743233 workaround to Neoverse-V1 567 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2 of the 568 CPU. It is still open. 569 570- ``ERRATA_V1_2779461``: This applies erratum 2779461 workaround to Neoverse-V1 571 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the 572 CPU. It is still open. 573 574For Neoverse V2, the following errata build flags are defined : 575 576- ``ERRATA_V2_2618597``: This applies errata 2618597 workaround to Neoverse-V2 577 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 578 r0p2. 579 580- ``ERRATA_V2_2662553``: This applies errata 2662553 workaround to Neoverse-V2 581 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 582 r0p2. 583 584- ``ERRATA_V2_2719103``: This applies errata 2719103 workaround to Neoverse-V2 585 CPU, this affects system configurations that do not use and ARM interconnect 586 IP. This needs to be enabled for revisions r0p0 and r0p1. It has been fixed 587 in r0p2. 588 589- ``ERRATA_V2_2719105``: This applies errata 2719105 workaround to Neoverse-V2 590 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 591 r0p2. 592 593- ``ERRATA_V2_2743011``: This applies errata 2743011 workaround to Neoverse-V2 594 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 595 r0p2. 596 597- ``ERRATA_V2_2779510``: This applies errata 2779510 workaround to Neoverse-V2 598 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 599 r0p2. 600 601- ``ERRATA_V2_2801372``: This applies errata 2801372 workaround to Neoverse-V2 602 CPU, this affects all configurations. This needs to be enabled for revisions 603 r0p0 and r0p1. It has been fixed in r0p2. 604 605- ``ERRATA_V2_3442699``: This applies errata 3442699 workaround to Neoverse-V2 606 CPU. This needs to be enabled for revision r0p0 - r0p2 and is still open. 607 608- ``ERRATA_V2_3701771``: This applies errata 3701771 workaround to Neoverse-V2 609 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 and is 610 still open. 611 612- ``ERRATA_V2_3841324``: This applies errata 3841324 workaround to Neoverse-V2 613 CPU. This needs to be enabled only for revisions r0p0 and r0p1 of 614 the CPU. It is fixed in r0p2. 615 616- ``ERRATA_V2_3888126``: This applies errata 3888126 workaround to Neoverse-V2 617 CPU. This needs to be enabled only for revisions r0p0, r0p1, r0p2 of 618 the CPU. It is still open. 619 620- ``ERRATA_V2_4302968``: This applies errata 4302968 workaround to Neoverse-V2 621 CPU. This needs to be enabled only for revisions r0p0, r0p1, r0p2 of 622 the CPU. It is still open. 623 624For Neoverse V3, the following errata build flags are defined : 625 626- ``ERRATA_V3_2970647``: This applies errata 2970647 workaround to Neoverse-V3 627 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 628 629- ``ERRATA_V3_3312417``: This applies errata 3312417 workaround to Neoverse-V3 630 CPU. This needs to be enabled for revisions r0p0 and r0p1 of the CPU and is 631 fixed in r0p2. 632 633- ``ERRATA_V3_3696307``: This applies errata 3696307 workaround to Neoverse-V3 634 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 635 r0p2. 636 637- ``ERRATA_V3_3701767``: This applies errata 3701767 workaround to Neoverse-V3 638 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the CPU and 639 is still open. 640 641- ``ERRATA_V3_3734562``: This applies errata 3734562 workaround to Neoverse-V3 642 CPU. This needs to be enabled for revisions r0p0 and r0p1 of the CPU and 643 is fixed in r0p2. 644 645- ``ERRATA_V3_3782181``: This applies errata 3782181 workaround to Neoverse-V3 646 CPU. This needs to be enabled for revision r0p1 of the CPU and is fixed in 647 r0p2. 648 649- ``ERRATA_V3_3864536``: This applies errata 3864536 workaround to Neoverse-V3 650 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU and 651 is still open. 652 653- ``ERRATA_V3_3878291``: This applies errata 3878291 workaround to Neoverse-V3 654 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU and 655 is still open. 656 657For Cortex-A710, the following errata build flags are defined : 658 659- ``ERRATA_A710_1901946``: This applies errata 1901946 workaround to 660 Cortex-A710 CPU. This needs to be enabled only for revision r1p0. It has 661 been fixed in r2p0. 662 663- ``ERRATA_A710_1916945``: This applies errata 1916945 workaround to 664 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 665 It has been fixed in r2p0. 666 667- ``ERRATA_A710_1917258``: This applies errata 1917258 workaround to 668 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 669 It has been fixed in r2p0. 670 671- ``ERRATA_A710_1927200``: This applies errata 1927200 workaround to 672 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0. 673 It has been fixed in r2p0. 674 675- ``ERRATA_A710_1987031``: This applies errata 1987031 workaround to 676 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 677 r2p0 of the CPU. It is still open. 678 679- ``ERRATA_A710_2081180``: This applies errata 2081180 workaround to 680 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 681 r2p0 of the CPU. It is still open. 682 683- ``ERRATA_A710_2055002``: This applies errata 2055002 workaround to 684 Cortex-A710 CPU. This needs to be enabled for revisions r1p0, r2p0 of the CPU 685 and is still open. 686 687- ``ERRATA_A710_2017096``: This applies errata 2017096 workaround to 688 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 689 of the CPU and is still open. 690 691- ``ERRATA_A710_2083908``: This applies errata 2083908 workaround to 692 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU and 693 is still open. 694 695- ``ERRATA_A710_2267065``: This applies errata 2267065 workaround to 696 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 697 of the CPU and is fixed in r2p1. 698 699- ``ERRATA_A710_2136059``: This applies errata 2136059 workaround to 700 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 701 of the CPU and is fixed in r2p1. 702 703- ``ERRATA_A710_2147715``: This applies errata 2147715 workaround to 704 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU 705 and is fixed in r2p1. 706 707- ``ERRATA_A710_2216384``: This applies errata 2216384 workaround to 708 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 709 of the CPU and is fixed in r2p1. 710 711- ``ERRATA_A710_2282622``: This applies errata 2282622 workaround to 712 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 713 r2p1 of the CPU and is still open. 714 715- ``ERRATA_A710_2291219``: This applies errata 2291219 workaround to 716 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 717 of the CPU and is fixed in r2p1. 718 719- ``ERRATA_A710_2008768``: This applies errata 2008768 workaround to 720 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 721 of the CPU and is fixed in r2p1. 722 723- ``ERRATA_A710_2371105``: This applies errata 2371105 workaround to 724 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 725 of the CPU and is fixed in r2p1. 726 727- ``ERRATA_A710_2701952``: This applies erratum 2701952 workaround to Cortex-A710 728 CPU, and applies to system configurations that do not use and ARM 729 interconnect IP. This needs to be enabled for r0p0, r1p0, r2p0 and r2p1 and 730 is still open. 731 732- ``ERRATA_A710_2742423``: This applies errata 2742423 workaround to 733 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 734 r2p1 of the CPU and is still open. 735 736- ``ERRATA_A710_2768515``: This applies errata 2768515 workaround to 737 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 738 r2p1 of the CPU and is still open. 739 740- ``ERRATA_A710_2778471``: This applies errata 2778471 workaround to Cortex-A710 741 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 742 CPU and is still open. 743 744- ``ERRATA_A710_3324338``: This applies errata 3324338 workaround to 745 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and 746 r2p1 of the CPU and is still open. 747 748- ``ERRATA_A710_3701772``: This applies errata 3701772 workaround to Cortex-A710 749 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 of the 750 CPU and is still open. 751 752For Neoverse N2, the following errata build flags are defined : 753 754- ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2 755 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 756 757- ``ERRATA_N2_2009478``: This applies errata 2009478 workaround to Neoverse-N2 758 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 759 760- ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2 761 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 762 763- ``ERRATA_N2_2025414``: This applies errata 2025414 workaround to Neoverse-N2 764 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 765 766- ``ERRATA_N2_2138953``: This applies errata 2138953 workaround to Neoverse-N2 767 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3 of the 768 Neoverse N2 cpu and is still open. 769 770- ``ERRATA_N2_2138956``: This applies errata 2138956 workaround to Neoverse-N2 771 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 772 773- ``ERRATA_N2_2138958``: This applies errata 2138958 workaround to Neoverse-N2 774 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 775 776- ``ERRATA_N2_2189731``: This applies errata 2189731 workaround to Neoverse-N2 777 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 778 779- ``ERRATA_N2_2242400``: This applies errata 2242400 workaround to Neoverse-N2 780 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 781 782- ``ERRATA_N2_2242415``: This applies errata 2242415 workaround to Neoverse-N2 783 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 784 785- ``ERRATA_N2_2280757``: This applies errata 2280757 workaround to Neoverse-N2 786 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. 787 788- ``ERRATA_N2_2326639``: This applies errata 2326639 workaround to Neoverse-N2 789 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 790 r0p1. 791 792- ``ERRATA_N2_2340933``: This applies errata 2340933 workaround to Neoverse-N2 793 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 794 r0p1. 795 796- ``ERRATA_N2_2346952``: This applies errata 2346952 workaround to Neoverse-N2 797 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU, 798 it is fixed in r0p3. 799 800- ``ERRATA_N2_2376738``: This applies errata 2376738 workaround to Neoverse-N2 801 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open. 802 803- ``ERRATA_N2_2388450``: This applies errata 2388450 workaround to Neoverse-N2 804 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in 805 r0p1. 806 807- ``ERRATA_N2_2743014``: This applies errata 2743014 workaround to Neoverse-N2 808 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 809 in r0p3. 810 811- ``ERRATA_N2_2743089``: This applies errata 2743089 workaround to Neoverse-N2 812 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 813 in r0p3. 814 815- ``ERRATA_N2_2728475``: This applies erratum 2728475 workaround to Neoverse-N2 816 CPU, this erratum affects system configurations that do not use and ARM 817 interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and r0p2. 818 It is fixed in r0p3. 819 820- ``ERRATA_N2_2779511``: This applies errata 2779511 workaround to Neoverse-N2 821 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed 822 in r0p3. 823 824- ``ERRATA_N2_3324339``: This applies errata 3324339 workaround to Neoverse-N2 825 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 826 still open. 827 828- ``ERRATA_N2_3701773``: This applies errata 3701773 workaround to Neoverse-N2 829 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 830 still open. 831 832- ``ERRATA_N2_3888123``: This applies errata 3888123 workaround to Neoverse-N2 833 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 834 still open. 835 836- ``ERRATA_N2_4302970``: This applies errata 4302970 workaround to Neoverse-N2 837 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is 838 still open. 839 840For Neoverse N3, the following errata build flags are defined : 841 842- ``ERRATA_N3_3456111``: This applies errata 3456111 workaround to Neoverse-N3 843 CPU. This needs to be enabled for revisions r0p0 and r0p1 and is still open. 844 845- ``ERRATA_N3_3699563``: This applies errata 3699563 workaround to Neoverse-N3 846 CPU. This needs to be enabled for revisions r0p0 and is still open. 847 848For Cortex-X2, the following errata build flags are defined : 849 850- ``ERRATA_X2_1901946``: This applies errata 1901946 workaround to Cortex-X2 851 CPU. This needs to be enabled only for r1p0, it is fixed in r2p0. 852 853- ``ERRATA_X2_1916945``: This applies errata 1916945 workaround to Cortex-X2 854 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 855 is fixed in r2p0. 856 857- ``ERRATA_X2_1917258``: This applies errata 1917258 workaround to Cortex-X2 858 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 859 is fixed in r2p0. 860 861- ``ERRATA_X2_1927200``: This applies errata 1927200 workaround to Cortex-X2 862 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 863 is fixed in r2p0. 864 865- ``ERRATA_X2_1934260``: This applies errata 1934260 workaround to Cortex-X2 866 CPU. This needs to be enabled only for revision r1p0 of the CPU, it is fixed 867 in r2p0. 868 869- ``ERRATA_X2_2002765``: This applies errata 2002765 workaround to Cortex-X2 870 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 871 CPU, it is fixed in r2p1. 872 873- ``ERRATA_X2_2017096``: This applies errata 2017096 workaround to Cortex-X2 874 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 875 CPU, it is fixed in r2p1. 876 877- ``ERRATA_X2_2081180``: This applies errata 2081180 workaround to Cortex-X2 878 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 879 CPU, it is fixed in r2p1. 880 881- ``ERRATA_X2_2083908``: This applies errata 2083908 workaround to Cortex-X2 882 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed 883 in r2p1. 884 885- ``ERRATA_X2_2136059``: This applies errata 2136059 workaround to Cortex-X2 886 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 887 CPU, it is fixed in r2p1. 888 889- ``ERRATA_X2_2147715``: This applies errata 2147715 workaround to Cortex-X2 890 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed 891 in r2p1. 892 893- ``ERRATA_X2_2216384``: This applies errata 2216384 workaround to Cortex-X2 894 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 895 CPU, it is fixed in r2p1. 896 897- ``ERRATA_X2_2267065``: This applies errata 2267065 workaround to Cortex-X2 898 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 899 CPU, it is fixed in r2p1. 900 901- ``ERRATA_X2_2282622``: This applies errata 2282622 workaround to Cortex-X2 902 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 903 CPU and is still open. 904 905- ``ERRATA_X2_2291219``: This applies errata 2291219 workaround to Cortex-X2 906 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 907 CPU, it is fixed in r2p1. 908 909- ``ERRATA_X2_2371105``: This applies errata 2371105 workaround to Cortex-X2 910 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the 911 CPU, it is fixed in r2p1. 912 913- ``ERRATA_X2_2701952``: This applies errata 2701952 workaround to Cortex-X2 914 CPU and affects system configurations that do not use an Arm interconnect IP. 915 This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 and is 916 still open. 917 918- ``ERRATA_X2_2742423``: This applies errata 2742423 workaround to Cortex-X2 919 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 920 CPU and is still open. 921 922- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to Cortex-X2 923 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 924 CPU and is still open. 925 926- ``ERRATA_X2_2778471``: This applies errata 2778471 workaround to Cortex-X2 927 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 928 CPU and is still open. 929 930- ``ERRATA_X2_3324338``: This applies errata 3324338 workaround to Cortex-X2 931 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 932 CPU and is still open. 933 934- ``ERRATA_X2_3701772``: This applies errata 3701772 workaround to Cortex-X2 935 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 936 CPU and is still open. 937 938- ``ERRATA_X2_3888122``: This applies errata 3888122 workaround to Cortex-X2 939 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 940 CPU and is still open. 941 942- ``ERRATA_X2_4302969``: This applies errata 4302969 workaround to Cortex-X2 943 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the 944 CPU and is still open. 945 946For Cortex-X3, the following errata build flags are defined : 947 948- ``ERRATA_X3_2266875``: This applies errata 2266875 workaround to the Cortex-X3 949 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it 950 is fixed in r1p1. 951 952- ``ERRATA_X3_2302506``: This applies errata 2302506 workaround to the Cortex-X3 953 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1, it is 954 fixed in r1p2. 955 956- ``ERRATA_X3_2313909``: This applies errata 2313909 workaround to 957 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 958 of the CPU, it is fixed in r1p1. 959 960- ``ERRATA_X3_2372204``: This applies errata 2372204 workaround to 961 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 962 of the CPU, it is fixed in r1p1. 963 964- ``ERRATA_X3_2615812``: This applies errata 2615812 workaround to Cortex-X3 965 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the 966 CPU, it is fixed in r1p2. 967 968- ``ERRATA_X3_2641945``: This applies errata 2641945 workaround to Cortex-X3 969 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU. 970 It is fixed in r1p1. 971 972- ``ERRATA_X3_2701951``: This applies erratum 2701951 workaround to Cortex-X3 973 CPU and affects system configurations that do not use an ARM interconnect 974 IP. This needs to be applied to revisions r0p0, r1p0 and r1p1. It is fixed 975 in r1p2. 976 977- ``ERRATA_X3_2742421``: This applies errata 2742421 workaround to 978 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and 979 r1p1. It is fixed in r1p2. 980 981- ``ERRATA_X3_2743088``: This applies errata 2743088 workaround to Cortex-X3 982 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1. It is 983 fixed in r1p2. 984 985- ``ERRATA_X3_2779509``: This applies errata 2779509 workaround to Cortex-X3 986 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the 987 CPU. It is fixed in r1p2. 988 989- ``ERRATA_X3_3213672``: This applies errata 3213672 workaround to Cortex-X3 990 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 991 of the CPU. It is still open. 992 993- ``ERRATA_X3_3692984``: This applies errata 3692984 workaround to Cortex-X3 994 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 995 of the CPU. It is still open. 996 997- ``ERRATA_X3_3701769``: This applies errata 3701769 workaround to Cortex-X3 998 CPU. This needs to be enabled only for revisions r0p0, r1p0, r1p1 and r1p2 999 of the CPU and it is still open. 1000 1001- ``ERRATA_X3_3827463``: This applies errata 3827463 workaround to Cortex-X3 1002 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of 1003 the CPU. It is fixed in r1p2. 1004 1005- ``ERRATA_X3_3888125``: This applies errata 3888125 workaround to Cortex-X3 1006 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1007 of the CPU. It is still open. 1008 1009- ``ERRATA_X3_4302966``: This applies errata 4302966 workaround to Cortex-X3 1010 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 1011 of the CPU. It is still open. 1012 1013For Cortex-X4, the following errata build flags are defined : 1014 1015- ``ERRATA_X4_2701112``: This applies erratum 2701112 workaround to Cortex-X4 1016 CPU and affects system configurations that do not use an Arm interconnect IP. 1017 This needs to be enabled for revisions r0p0 and is fixed in r0p1. 1018 The workaround for this erratum is not implemented in EL3, but the flag can 1019 be enabled/disabled at the platform level. The flag is used when the errata ABI 1020 feature is enabled and can assist the Kernel in the process of 1021 mitigation of the erratum. 1022 1023- ``ERRATA_X4_2726228``: This applies erratum 2726228 workaround to Cortex-X4 1024 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in 1025 r0p2. 1026 1027- ``ERRATA_X4_2740089``: This applies errata 2740089 workaround to Cortex-X4 1028 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed 1029 in r0p2. 1030 1031- ``ERRATA_X4_2763018``: This applies errata 2763018 workaround to Cortex-X4 1032 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1033 1034- ``ERRATA_X4_2816013``: This applies errata 2816013 workaround to Cortex-X4 1035 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1036 1037- ``ERRATA_X4_2897503``: This applies errata 2897503 workaround to Cortex-X4 1038 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1039 1040- ``ERRATA_X4_2923985``: This applies errata 2923985 workaround to Cortex-X4 1041 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1042 1043- ``ERRATA_X4_2957258``: This applies errata 2957258 workaround to Cortex-X4 1044 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1045 1046- ``ERRATA_X4_3076789``: This applies errata 3076789 workaround to Cortex-X4 1047 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1048 1049- ``ERRATA_X4_3133195``: This applies errata 3133195 workaround to Cortex-X4 1050 CPU. This needs to be enabled for revision r0p2. It is fixed in r0p3. 1051 1052- ``ERRATA_X4_3701758``: This applies errata 3701758 workaround to Cortex-X4 1053 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3. 1054 It is still open. 1055 1056- ``ERRATA_X4_3887999``: This applies errata 3887999 workaround to Cortex-X4 1057 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2 and r0p3. 1058 It is still open. 1059 1060For Cortex-X925, the following errata build flags are defined : 1061 1062- ``ERRATA_X925_2921199``: This applies errata 2921199 workaround to Cortex-X925 1063 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1064 1065- ``ERRATA_X925_2922378``: This applies errata 2922378 workaround to Cortex-X925 1066 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1067 1068- ``ERRATA_X925_2933290``: This applies errata 2933290 workaround to Cortex-X925 1069 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1070 1071- ``ERRATA_X925_2963999``: This applies errata 2963999 workaround to Cortex-X925 1072 CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1. 1073 1074- ``ERRATA_X925_3324334``: This applies errata 3324334 workaround to Cortex-X925 1075 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1076 1077- ``ERRATA_X925_3692980``: This applies errata 3692980 workaround to Cortex-X925 1078 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1079 1080- ``ERRATA_X925_3730893``: This applies errata 3730893 workaround to Cortex-X925 1081 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1082 1083- ``ERRATA_X925_3865185``: This applies errata 3865185 workaround to Cortex-X925 1084 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2. 1085 1086- ``ERRATA_X925_3701747``: This applies errata 3701747 workaround to Cortex-X925 1087 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is still open. 1088 1089For Cortex-A510, the following errata build flags are defined : 1090 1091- ``ERRATA_A510_2008766``: This applies errata 2008766 workaround to 1092 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1093 r0p3, r1p0, r1p1, r1p2 and r1p3. It is still open. 1094 1095- ``ERRATA_A510_2288014``: This applies errata 2288014 workaround to 1096 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1, 1097 r0p2, r0p3 and r1p0, it is fixed in r1p1. 1098 1099- ``ERRATA_A510_2042739``: This applies errata 2042739 workaround to 1100 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1 and 1101 r0p2, it is fixed in r0p3. 1102 1103- ``ERRATA_A510_2041909``: This applies errata 2041909 workaround to 1104 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is fixed 1105 in r0p3. The issue is also present in r0p0 and r0p1 but there is no 1106 workaround for those revisions. 1107 1108- ``ERRATA_A510_2080326``: This applies errata 2080326 workaround to 1109 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is 1110 fixed in r0p3. This issue is also present in r0p0 and r0p1 but there is no 1111 workaround for those revisions. 1112 1113- ``ERRATA_A510_2169012``: This applies errata 2169012 workaround to 1114 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1, 1115 r0p2, r0p3 and r1p0, it is fixed in r1p1. 1116 1117- ``ERRATA_A510_2218134``: This applies errata 2218134 workaround to 1118 Cortex-A510 CPU. This needs to be enabled only for revision r1p0 and is fixed 1119 in r1p1. 1120 1121- ``ERRATA_A510_2250311``: This applies errata 2250311 workaround to 1122 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1123 r0p3 and r1p0, it is fixed in r1p1. This workaround disables MPMM even if 1124 ENABLE_MPMM=1. 1125 1126- ``ERRATA_A510_2218950``: This applies errata 2218950 workaround to 1127 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1128 r0p3 and r1p0, it is fixed in r1p1. 1129 1130- ``ERRATA_A510_2172148``: This applies errata 2172148 workaround to 1131 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1132 r0p3 and r1p0, it is fixed in r1p1. 1133 1134- ``ERRATA_A510_2347730``: This applies errata 2347730 workaround to 1135 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, 1136 r0p3, r1p0 and r1p1. It is fixed in r1p2. 1137 1138- ``ERRATA_A510_2371937``: This applies errata 2371937 workaround to 1139 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2, 1140 r0p3, r1p0, r1p1, and is fixed in r1p2. 1141 1142- ``ERRATA_A510_2420992``: This applies errata 2420992 workaround to 1143 Cortex-A510 CPU. This needs to applied for revisions r1p0 and r1p1, and is 1144 fixed in r1p2. 1145 1146- ``ERRATA_A510_2666669``: This applies errata 2666669 workaround to 1147 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2, 1148 r0p3, r1p0, r1p1. It is fixed in r1p2. 1149 1150- ``ERRATA_A510_2684597``: This applies erratum 2684597 workaround to 1151 Cortex-A510 CPU. This needs to be applied to revision r0p0, r0p1, r0p2, 1152 r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. 1153 1154- ``ERRATA_A510_2971420``: This applies erratum 2971420 workaround to 1155 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1156 r1p0, r1p1, r1p2 and r1p3 and is still open. 1157 1158- ``ERRATA_A510_3672349``: This applies erratum 3672349 workaround to 1159 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1160 r1p0, r1p1, r1p2 and r1p3 and is still open. 1161 1162- ``ERRATA_A510_3704847``: This applies erratum 3704847 workaround to 1163 Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3, 1164 r1p0, r1p1, r1p2 and r1p3 and is still open. 1165 1166For Cortex-A520, the following errata build flags are defined : 1167 1168- ``ERRATA_A520_2630792``: This applies errata 2630792 workaround to 1169 Cortex-A520 CPU. This needs to applied for revisions r0p0, r0p1 of the 1170 CPU and is still open. 1171 1172- ``ERRATA_A520_2858100``: This applies errata 2858100 workaround to 1173 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1174 It is still open. 1175 1176- ``ERRATA_A520_2938996``: This applies errata 2938996 workaround to 1177 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1178 It is fixed in r0p2. 1179 1180For Cortex-A715, the following errata build flags are defined : 1181 1182- ``ERRATA_A715_2331818``: This applies errata 2331818 workaround to 1183 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. 1184 It is fixed in r1p1. 1185 1186- ``ERRATA_A715_2344187``: This applies errata 2344187 workaround to 1187 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is 1188 fixed in r1p1. 1189 1190- ``ERRATA_A715_2376701``: This applies errata 2376701 workaround to 1191 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is 1192 fixed in r1p1. 1193 1194- ``ERRATA_A715_2409570``: This applies errata 2409570 workaround to 1195 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1196 It is fixed in r1p1. This errata also applies to r0p0 but that revision has a 1197 different workaround, and since r0p0 is not used in production hardware it is 1198 not implemented. 1199 1200- ``ERRATA_A715_2413290``: This applies errata 2413290 workaround to 1201 Cortex-A715 CPU. This needs to be enabled only for revision r1p0 and 1202 when SPE(Statistical profiling extension)=True. The errata is fixed 1203 in r1p1. 1204 1205- ``ERRATA_A715_2420947``: This applies errata 2420947 workaround to 1206 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1207 It is fixed in r1p1. 1208 1209- ``ERRATA_A715_2429384``: This applies errata 2429384 workaround to 1210 Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no 1211 workaround for revision r0p0. It is fixed in r1p1. 1212 1213- ``ERRATA_A715_2561034``: This applies errata 2561034 workaround to 1214 Cortex-A715 CPU. This needs to be enabled only for revision r1p0. 1215 It is fixed in r1p1. 1216 1217- ``ERRATA_A715_2728106``: This applies errata 2728106 workaround to 1218 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0 1219 and r1p1. It is fixed in r1p2. 1220 1221- ``ERRATA_A715_2804830``: This applies errata 2804830 workaround to 1222 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1223 r1p1 and r1p2. It is fixed in r1p3. 1224 1225- ``ERRATA_A715_3456084``: This applies errata 3456084 workaround to 1226 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1227 r1p1, r1p2 and r1p3. It is still open. 1228 1229- ``ERRATA_A715_3699560``: This applies errata 3699560 workaround to 1230 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1231 r1p2 and r1p3. It is still open. 1232 1233- ``ERRATA_A715_3711916``: This applies errata 3711916 workaround to 1234 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0, 1235 r1p1, r1p2 and r1p3. It is still open. 1236 1237For Cortex-A720, the following errata build flags are defined : 1238 1239- ``ERRATA_A720_2729604``: This applies errata 2729604 workaround to 1240 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1241 It is fixed in r0p2. 1242 1243- ``ERRATA_A720_2792132``: This applies errata 2792132 workaround to 1244 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1245 It is fixed in r0p2. 1246 1247- ``ERRATA_A720_2844092``: This applies errata 2844092 workaround to 1248 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1249 It is fixed in r0p2. 1250 1251- ``ERRATA_A720_2926083``: This applies errata 2926083 workaround to 1252 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1253 It is fixed in r0p2. 1254 1255- ``ERRATA_A720_2940794``: This applies errata 2940794 workaround to 1256 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1257 It is fixed in r0p2. 1258 1259- ``ERRATA_A720_3456091``: This applies errata 3456091 workaround to 1260 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1261 and r0p2. It is still open. 1262 1263- ``ERRATA_A720_3699561``: This applies errata 3699561 workaround to 1264 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1265 and r0p2. It is still open. 1266 1267- ``ERRATA_A720_3711910``: This applies errata 3711910 workaround to 1268 Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1 1269 and r0p2. It is still open. 1270 1271For Cortex-A720_AE, the following errata build flags are defined : 1272 1273- ``ERRATA_A720_AE_3456103``: This applies errata 3456103 workaround to 1274 Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0 and r0p1. It 1275 is still open. 1276 1277- ``ERRATA_A720_AE_3699562``: This applies errata 3699562 workaround 1278 to Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0. 1279 It is still open. 1280 1281For Cortex-A725, the following errata build flags are defined : 1282 1283- ``ERRATA_A725_2874943``: This applies errata 2874943 workaround to 1284 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 when 1285 FEAT_SPE is enabled. It is fixed in r0p1. 1286 1287- ``ERRATA_A725_2936490``: This applies errata 2936490 workaround to 1288 Cortex-A725 CPU. This needs to be enabled for revisions r0p0. 1289 It is fixed in r0p1. 1290 1291- ``ERRATA_A725_3456106``: This applies errata 3456106 workaround to 1292 Cortex-A725 CPU. This needs to be enabled for revisions r0p0, r0p1 1293 and r0p2. It is still open. 1294 1295- ``ERRATA_A725_3699564``: This applies errata 3699564 workaround to 1296 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1297 It is fixed in r0p2. 1298 1299- ``ERRATA_A725_3711914``: This applies errata 3711914 workaround to 1300 Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1. 1301 It is fixed in r0p2. 1302 1303For C1-Ultra, the following errata build flags are defined : 1304 1305- ``ERRATA_C1ULTRA_3324333``: This applies erratum 3324333 workaround to 1306 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is fixed 1307 in r1p0. 1308 1309- ``ERRATA_C1ULTRA_3502731``: This applies erratum 3502731 workaround to 1310 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is 1311 fixed in r1p0. 1312 1313- ``ERRATA_C1ULTRA_3658374``: This applies erratum 3658374 workaround to 1314 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1315 is still open. 1316 1317- ``ERRATA_C1ULTRA_3684152``: This applies erratum 3684152 workaround to 1318 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is 1319 fixed in r1p0. 1320 1321- ``ERRATA_C1ULTRA_3705939``: This applies erratum 3705939 workaround to 1322 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1323 is still open. 1324 1325- ``ERRATA_C1ULTRA_3815514``: This applies erratum 3815514 workaround to 1326 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1327 is still open. 1328 1329- ``ERRATA_C1ULTRA_3865171``: This applies erratum 3865171 workaround to 1330 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1331 is still open. 1332 1333- ``ERRATA_C1ULTRA_3926381``: This applies erratum 3926381 workaround to 1334 C1-Ultra CPU. This needs to be enabled for revision r1p0 and is still 1335 open. 1336 1337- ``ERRATA_C1ULTRA_4102704``: This applies erratum 4102704 workaround to 1338 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and 1339 is still open. 1340 1341For C1-Premium, the following errata build flags are defined : 1342 1343- ``ERRATA_C1PREMIUM_3324333``: This applies errata 3324333 workaround to 1344 C1-Premium CPU. This needs to be enabled for revision r0p0, and is 1345 fixed in r1p0. 1346 1347- ``ERRATA_C1PREMIUM_3502731``: This applies errata 3502731 workaround to 1348 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1349 in r1p0. 1350 1351- ``ERRATA_C1PREMIUM_3651221``: This applies errata 3651221 workaround to 1352 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1353 in r1p0. 1354 1355- ``ERRATA_C1PREMIUM_3684152``: This applies errata 3684152 workaround to 1356 C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed 1357 in r1p0. 1358 1359- ``ERRATA_C1PREMIUM_3705939``: This applies errata 3705939 workaround to 1360 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1361 is still open. 1362 1363- ``ERRATA_C1PREMIUM_3815514``: This applies errata 3815514 workaround to 1364 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1365 is still open. 1366 1367- ``ERRATA_C1PREMIUM_3865171``: This applies errata 3865171 workaround to 1368 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1369 is still open. 1370 1371- ``ERRATA_C1PREMIUM_3926381``: This applies errata 3926381 workaround to 1372 C1-Premium CPU. This needs to be enabled for revision r1p0 and is 1373 still open. 1374 1375- ``ERRATA_C1PREMIUM_4102704``: This applies errata 4102704 workaround to 1376 C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and 1377 is still open. 1378 1379For C1-Pro, the following errata build flags are defined : 1380 1381- ``ERRATA_C1PRO_3619847``: This applies errata 3619847 workaround to C1-Pro 1382 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1383 1384- ``ERRATA_C1PRO_3338470``: This applies errata 3338470 workaround to C1-Pro 1385 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1386 1387- ``ERRATA_C1PRO_3362007``: This applies errata 3362007 workaround to C1-Pro 1388 CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0. 1389 1390- ``ERRATA_C1PRO_3686597``: This applies errata 3686597 workaround to C1-Pro 1391 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1392 is fixed in r1p1. 1393 1394- ``ERRATA_C1PRO_3694158``: This applies errata 3694158 workaround to C1-Pro 1395 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 and is 1396 fixed in r1p2. 1397 1398- ``ERRATA_C1PRO_3706576``: This applies errata 3706576 workaround to C1-Pro 1399 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1400 is fixed in r1p1. 1401 1402- ``ERRATA_C1PRO_3300099``: This applies errata 3300099 workaround to C1-Pro 1403 CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it 1404 is fixed in r1p1. 1405 1406For C1-Nano, the following errata build flags are defined : 1407 1408- ``ERRATA_C1NANO_3392149``: This applies errata 3392149 workaround to 1409 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1410 in r0p1. 1411 1412- ``ERRATA_C1NANO_3419531``: This applies errata 3419531 workaround to 1413 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1414 in r0p1. 1415 1416- ``ERRATA_C1NANO_3437202``: This applies errata 3437202 workaround to 1417 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1418 in r0p1. 1419 1420- ``ERRATA_C1NANO_3516455``: This applies errata 3516455 workaround to 1421 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1422 in r0p1. 1423 1424- ``ERRATA_C1NANO_3616450``: This applies errata 3616450 workaround to 1425 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1426 in r0p1. 1427 1428- ``ERRATA_C1NANO_3630925``: This applies errata 3630925 workaround to 1429 C1-Nano CPU. This needs to be enabled for revision r0p0 and is fixed 1430 in r0p1. 1431 1432- ``ERRATA_C1NANO_3754876``: This applies errata 3754876 workaround to 1433 C1-Nano CPU. This needs to be enabled for revisions r0p0 and r0p1, and 1434 is fixed in r0p2. 1435 1436DSU Errata Workarounds 1437---------------------- 1438 1439Similar to CPU errata, TF-A also implements workarounds for DSU (DynamIQ 1440Shared Unit) errata. The DSU errata details can be found in the respective Arm 1441documentation: 1442 1443- `Arm DSU Software Developers Errata Notice`_. 1444 1445Each erratum is identified by an ``ID``, as defined in the DSU errata notice 1446document. Thus, the build flags which enable/disable the errata workarounds 1447have the format ``ERRATA_DSU_<ID>``. The implementation and application logic 1448of DSU errata workarounds are similar to `CPU errata workarounds`_. 1449 1450For DSU errata, the following build flags are defined: 1451 1452- ``ERRATA_DSU_798953``: This applies errata 798953 workaround for the 1453 affected DSU configurations. This errata applies only for those DSUs that 1454 revision is r0p0 (on r0p1 it is fixed). However, please note that this 1455 workaround results in increased DSU power consumption on idle. 1456 1457- ``ERRATA_DSU_936184``: This applies errata 936184 workaround for the 1458 affected DSU configurations. This errata applies only for those DSUs that 1459 contain the ACP interface **and** the DSU revision is older than r2p0 (on 1460 r2p0 it is fixed). However, please note that this workaround results in 1461 increased DSU power consumption on idle. 1462 1463- ``ERRATA_DSU_2313941``: This applies errata 2313941 workaround for the 1464 affected DSU configurations. This errata applies for those DSUs with 1465 revisions r0p0, r1p0, r2p0, r2p1, r3p0, r3p1 and is still open. However, 1466 please note that this workaround results in increased DSU power consumption 1467 on idle. 1468 1469- ``ERRATA_DSU_2900952``: This applies errata 2900952 workaround for the 1470 affected DSU-120 configurations. This erratum applies to some r2p0 1471 implementations and is fixed in r2p1. The affected r2p0 implementations 1472 are determined by reading the IMP_CLUSTERREVIDR_EL1[1] register bit 1473 and making sure it's clear. 1474 1475CPU Specific optimizations 1476-------------------------- 1477 1478This section describes some of the optimizations allowed by the CPU micro 1479architecture that can be enabled by the platform as desired. 1480 1481- ``SKIP_A57_L1_FLUSH_PWR_DWN``: This flag enables an optimization in the 1482 Cortex-A57 cluster power down sequence by not flushing the Level 1 data 1483 cache. The L1 data cache and the L2 unified cache are inclusive. A flush 1484 of the L2 by set/way flushes any dirty lines from the L1 as well. This 1485 is a known safe deviation from the Cortex-A57 TRM defined power down 1486 sequence. Each Cortex-A57 based platform must make its own decision on 1487 whether to use the optimization. 1488 1489- ``A53_DISABLE_NON_TEMPORAL_HINT``: This flag disables the cache non-temporal 1490 hint. The LDNP/STNP instructions as implemented on Cortex-A53 do not behave 1491 in a way most programmers expect, and will most probably result in a 1492 significant speed degradation to any code that employs them. The Armv8-A 1493 architecture (see Arm DDI 0487A.h, section D3.4.3) allows cores to ignore 1494 the non-temporal hint and treat LDNP/STNP as LDP/STP instead. Enabling this 1495 flag enforces this behaviour. This needs to be enabled only for revisions 1496 <= r0p3 of the CPU and is enabled by default. 1497 1498- ``A57_DISABLE_NON_TEMPORAL_HINT``: This flag has the same behaviour as 1499 ``A53_DISABLE_NON_TEMPORAL_HINT`` but for Cortex-A57. This needs to be 1500 enabled only for revisions <= r1p2 of the CPU and is enabled by default, 1501 as recommended in section "4.7 Non-Temporal Loads/Stores" of the 1502 `Cortex-A57 Software Optimization Guide`_. 1503 1504- ''A57_ENABLE_NON_CACHEABLE_LOAD_FWD'': This flag enables non-cacheable 1505 streaming enhancement feature for Cortex-A57 CPUs. Platforms can set 1506 this bit only if their memory system meets the requirement that cache 1507 line fill requests from the Cortex-A57 processor are atomic. Each 1508 Cortex-A57 based platform must make its own decision on whether to use 1509 the optimization. This flag is disabled by default. 1510 1511- ``NEOVERSE_Nx_EXTERNAL_LLC``: This flag indicates that an external last 1512 level cache(LLC) is present in the system, and that the DataSource field 1513 on the master CHI interface indicates when data is returned from the LLC. 1514 This is used to control how the LL_CACHE* PMU events count. 1515 Default value is 0 (Disabled). 1516 1517- ``NEOVERSE_Vx_EXTERNAL_LLC``: This flag has the same behaviour as 1518 ``NEOVERSE_Nx_EXTERNAL_LLC`` but for Neoverse-V2. This is disabled 1519 by default. Default value is 0 (Disabled). 1520 1521- ``NEOVERSE_N2_PREFETCHER_DISABLE``: This flag disables the region prefetcher 1522 on the Neoverse N2 core. This is used during performance analysis to get clean 1523 and repeatable measurements of the cache by preventing speculative data fetches 1524 from interfering with benchmark results. 1525 Default value is 0 (Disabled). 1526 1527GIC Errata Workarounds 1528---------------------- 1529- ``GIC600_ERRATA_WA_2384374``: This flag applies part 2 of errata 2384374 1530 workaround for the affected GIC600 and GIC600-AE implementations. It applies 1531 to implementations of GIC600 and GIC600-AE with revisions less than or equal 1532 to r1p6 and r0p2 respectively. If the platform sets GICV3_SUPPORT_GIC600, 1533 then this flag is enabled; otherwise, it is 0 (Disabled). 1534 1535-------------- 1536 1537*Copyright (c) 2014-2026, Arm Limited and Contributors. All rights reserved.* 1538 1539.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715 1540.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639 1541.. _CVE-2022-23960: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2022-23960 1542.. _CVE-2024-5660: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-5660 1543.. _CVE-2024-7881: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2024-7881 1544.. _Cortex-A72 MPCore Software Developers Errata Notice: https://developer.arm.com/documentation/epm012079/latest 1545.. _Cortex-A57 Software Optimization Guide: https://developer.arm.com/documentation/uan0015 1546.. _Arm DSU Software Developers Errata Notice: https://developer.arm.com/documentation/SDEN854652 1547