1Feature Overview 2================ 3 4This page provides an overview of the current |TF-A| feature set. For a full 5description of these features and their implementation details, please see 6the documents that are part of the *Components* and *System Design* chapters. 7 8The :ref:`Change Log & Release Notes` provides details of changes made since the 9last release. 10 11Current features 12---------------- 13 14- Initialization of the secure world, for example exception vectors, control 15 registers and interrupts for the platform. 16 17- Library support for CPU specific reset and power down sequences. This 18 includes support for errata workarounds and the latest Arm DynamIQ CPUs. 19 20- Drivers to enable standard initialization of Arm System IP, for example 21 Generic Interrupt Controller (GIC), Cache Coherent Interconnect (CCI), 22 Cache Coherent Network (CCN), Network Interconnect (NIC) and TrustZone 23 Controller (TZC). 24 25- Secure Monitor library code such as world switching, EL2/EL1 context 26 management and interrupt routing. 27 28- SMC (Secure Monitor Call) handling, conforming to the `SMC Calling 29 Convention`_ using an EL3 runtime services framework. 30 31- |PSCI| library support for CPU, cluster and system power management 32 use-cases. 33 This library is pre-integrated with the AArch64 EL3 Runtime Software, and 34 is also suitable for integration with other AArch32 EL3 Runtime Software, 35 for example an AArch32 Secure OS. 36 37- A generic |SCMI| driver to interface with conforming power controllers, for 38 example the Arm System Control Processor (SCP). 39 40- A minimal AArch32 Secure Payload (*SP_MIN*) to demonstrate |PSCI| library 41 integration with AArch32 EL3 Runtime Software. 42 43- Secure partition manager dispatcher(SPMD) with following two configurations: 44 45 - S-EL2 SPMC implementation, widely compliant with FF-A v1.1 EAC0 and initial 46 support of FF-A v1.2. 47 48 - EL3 SPMC implementation, compliant with a subset of FF-A v1.1 EAC0. 49 50- Support for Arm CCA based on FEAT_RME which supports authenticated boot and 51 execution of RMM with the necessary routing of RMI commands as specified in 52 RMM Beta 0 Specification. 53 54- A Test SP and SPD to demonstrate AArch64 Secure Monitor functionality and SP 55 interaction with PSCI. 56 57- SPDs for the `OP-TEE Secure OS`_, `NVIDIA Trusted Little Kernel`_, 58 `Trusty Secure OS`_ and `ProvenCore Secure OS`_. 59 60- A Trusted Board Boot implementation, conforming to all mandatory TBBR 61 requirements. This includes image authentication, Firmware recovery, 62 Firmware encryption and packaging of the various firmware images into a 63 Firmware Image Package (FIP). 64 65- Measured boot support with PoC to showcase its interaction with firmware TPM 66 (fTPM) service implemneted on top of OP-TEE. 67 68- Support for Dynamic Root of Trust for Measurement (DRTM). 69 70- Following firmware update mechanisms available: 71 72 - PSA Firmware Update (PSA FWU) 73 74 - TBBR Firmware Update (TBBR FWU) 75 76- Reliability, Availability, and Serviceability (RAS) functionality, including 77 78 - A Secure Partition Manager (SPM) to manage Secure Partitions in 79 Secure-EL0, which can be used to implement simple management and 80 security services. 81 82 - An |SDEI| dispatcher to route interrupt-based |SDEI| events. 83 84 - An Exception Handling Framework (EHF) that allows dispatching of EL3 85 interrupts to their registered handlers, to facilitate firmware-first 86 error handling. 87 88- A dynamic configuration framework that enables each of the firmware images 89 to be configured at runtime if required by the platform. It also enables 90 loading of a hardware configuration (for example, a kernel device tree) 91 as part of the FIP, to be passed through the firmware stages. 92 This feature is now incorporated inside the firmware configuration framework 93 (fconf). 94 95- Support for alternative boot flows, for example to support platforms where 96 the EL3 Runtime Software is loaded using other firmware or a separate 97 secure system processor, or where a non-TF-A ROM expects BL2 to be loaded 98 at EL3. 99 100- Support for Errata management firmware interface. 101 102- Support for the GCC, LLVM and Arm Compiler 6 toolchains. 103 104- Support for combining several libraries into a "romlib" image that may be 105 shared across images to reduce memory footprint. The romlib image is stored 106 in ROM but is accessed through a jump-table that may be stored 107 in read-write memory, allowing for the library code to be patched. 108 109- Position-Independent Executable (PIE) support. 110 111Still to come 112------------- 113 114- Support for additional platforms. 115 116- Documentation enhancements. 117 118- Ongoing support for new architectural features, CPUs and System IP. 119 120- Ongoing support for new Arm system architecture specifications. 121 122- Ongoing security hardening, optimization and quality improvements. 123 124.. _SMC Calling Convention: https://developer.arm.com/docs/den0028/latest 125.. _OP-TEE Secure OS: https://github.com/OP-TEE/optee_os 126.. _NVIDIA Trusted Little Kernel: http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/ote_partner/tlk.git;a=summary 127.. _Trusty Secure OS: https://source.android.com/security/trusty 128.. _ProvenCore Secure OS: https://provenrun.com/products/provencore/ 129 130-------------- 131 132*Copyright (c) 2019-2023, Arm Limited. All rights reserved.* 133