1/* 2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <asm_macros.S> 32#include <bl_common.h> 33 34/* ----------------------------------------------------------------------------- 35 * Very simple stackless exception handlers used by BL2 and BL31 stages. 36 * BL31 uses them before stacks are setup. BL2 uses them throughout. 37 * ----------------------------------------------------------------------------- 38 */ 39 .globl early_exceptions 40 41vector_base early_exceptions 42 43 /* ----------------------------------------------------- 44 * Current EL with SP0 : 0x0 - 0x200 45 * ----------------------------------------------------- 46 */ 47vector_entry SynchronousExceptionSP0 48 mov x0, #SYNC_EXCEPTION_SP_EL0 49 bl plat_report_exception 50 no_ret plat_panic_handler 51 check_vector_size SynchronousExceptionSP0 52 53vector_entry IrqSP0 54 mov x0, #IRQ_SP_EL0 55 bl plat_report_exception 56 no_ret plat_panic_handler 57 check_vector_size IrqSP0 58 59vector_entry FiqSP0 60 mov x0, #FIQ_SP_EL0 61 bl plat_report_exception 62 no_ret plat_panic_handler 63 check_vector_size FiqSP0 64 65vector_entry SErrorSP0 66 mov x0, #SERROR_SP_EL0 67 bl plat_report_exception 68 no_ret plat_panic_handler 69 check_vector_size SErrorSP0 70 71 /* ----------------------------------------------------- 72 * Current EL with SPx: 0x200 - 0x400 73 * ----------------------------------------------------- 74 */ 75vector_entry SynchronousExceptionSPx 76 mov x0, #SYNC_EXCEPTION_SP_ELX 77 bl plat_report_exception 78 no_ret plat_panic_handler 79 check_vector_size SynchronousExceptionSPx 80 81vector_entry IrqSPx 82 mov x0, #IRQ_SP_ELX 83 bl plat_report_exception 84 no_ret plat_panic_handler 85 check_vector_size IrqSPx 86 87vector_entry FiqSPx 88 mov x0, #FIQ_SP_ELX 89 bl plat_report_exception 90 no_ret plat_panic_handler 91 check_vector_size FiqSPx 92 93vector_entry SErrorSPx 94 mov x0, #SERROR_SP_ELX 95 bl plat_report_exception 96 no_ret plat_panic_handler 97 check_vector_size SErrorSPx 98 99 /* ----------------------------------------------------- 100 * Lower EL using AArch64 : 0x400 - 0x600 101 * ----------------------------------------------------- 102 */ 103vector_entry SynchronousExceptionA64 104 mov x0, #SYNC_EXCEPTION_AARCH64 105 bl plat_report_exception 106 no_ret plat_panic_handler 107 check_vector_size SynchronousExceptionA64 108 109vector_entry IrqA64 110 mov x0, #IRQ_AARCH64 111 bl plat_report_exception 112 no_ret plat_panic_handler 113 check_vector_size IrqA64 114 115vector_entry FiqA64 116 mov x0, #FIQ_AARCH64 117 bl plat_report_exception 118 no_ret plat_panic_handler 119 check_vector_size FiqA64 120 121vector_entry SErrorA64 122 mov x0, #SERROR_AARCH64 123 bl plat_report_exception 124 no_ret plat_panic_handler 125 check_vector_size SErrorA64 126 127 /* ----------------------------------------------------- 128 * Lower EL using AArch32 : 0x600 - 0x800 129 * ----------------------------------------------------- 130 */ 131vector_entry SynchronousExceptionA32 132 mov x0, #SYNC_EXCEPTION_AARCH32 133 bl plat_report_exception 134 no_ret plat_panic_handler 135 check_vector_size SynchronousExceptionA32 136 137vector_entry IrqA32 138 mov x0, #IRQ_AARCH32 139 bl plat_report_exception 140 no_ret plat_panic_handler 141 check_vector_size IrqA32 142 143vector_entry FiqA32 144 mov x0, #FIQ_AARCH32 145 bl plat_report_exception 146 no_ret plat_panic_handler 147 check_vector_size FiqA32 148 149vector_entry SErrorA32 150 mov x0, #SERROR_AARCH32 151 bl plat_report_exception 152 no_ret plat_panic_handler 153 check_vector_size SErrorA32 154