1 /* 2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #include <arch_helpers.h> 31 #include <assert.h> 32 #include <platform.h> 33 #include <tsp.h> 34 35 /******************************************************************************* 36 * Data structure to keep track of per-cpu secure generic timer context across 37 * power management operations. 38 ******************************************************************************/ 39 typedef struct timer_context { 40 uint64_t cval; 41 uint32_t ctl; 42 } timer_context_t; 43 44 static timer_context_t pcpu_timer_context[PLATFORM_CORE_COUNT]; 45 46 /******************************************************************************* 47 * This function initializes the generic timer to fire every 0.5 second 48 ******************************************************************************/ 49 void tsp_generic_timer_start(void) 50 { 51 uint64_t cval; 52 uint32_t ctl = 0; 53 54 /* The timer will fire every 0.5 second */ 55 cval = read_cntpct_el0() + (read_cntfrq_el0() >> 1); 56 write_cntps_cval_el1(cval); 57 58 /* Enable the secure physical timer */ 59 set_cntp_ctl_enable(ctl); 60 write_cntps_ctl_el1(ctl); 61 } 62 63 /******************************************************************************* 64 * This function deasserts the timer interrupt and sets it up again 65 ******************************************************************************/ 66 void tsp_generic_timer_handler(void) 67 { 68 /* Ensure that the timer did assert the interrupt */ 69 assert(get_cntp_ctl_istatus(read_cntps_ctl_el1())); 70 71 /* Disable the timer and reprogram it */ 72 write_cntps_ctl_el1(0); 73 tsp_generic_timer_start(); 74 } 75 76 /******************************************************************************* 77 * This function deasserts the timer interrupt prior to cpu power down 78 ******************************************************************************/ 79 void tsp_generic_timer_stop(void) 80 { 81 /* Disable the timer */ 82 write_cntps_ctl_el1(0); 83 } 84 85 /******************************************************************************* 86 * This function saves the timer context prior to cpu suspension 87 ******************************************************************************/ 88 void tsp_generic_timer_save(void) 89 { 90 uint32_t linear_id = platform_get_core_pos(read_mpidr()); 91 92 pcpu_timer_context[linear_id].cval = read_cntps_cval_el1(); 93 pcpu_timer_context[linear_id].ctl = read_cntps_ctl_el1(); 94 flush_dcache_range((uint64_t) &pcpu_timer_context[linear_id], 95 sizeof(pcpu_timer_context[linear_id])); 96 } 97 98 /******************************************************************************* 99 * This function restores the timer context post cpu resummption 100 ******************************************************************************/ 101 void tsp_generic_timer_restore(void) 102 { 103 uint32_t linear_id = platform_get_core_pos(read_mpidr()); 104 105 write_cntps_cval_el1(pcpu_timer_context[linear_id].cval); 106 write_cntps_ctl_el1(pcpu_timer_context[linear_id].ctl); 107 } 108