xref: /rk3399_ARM-atf/bl32/tsp/tsp_private.h (revision 404dba53ef9be643f80babdd4ab81501bdbaba16)
1 /*
2  * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef __TSP_PRIVATE_H__
32 #define __TSP_PRIVATE_H__
33 
34 /* Definitions to help the assembler access the SMC/ERET args structure */
35 #define TSP_ARGS_SIZE		0x40
36 #define TSP_ARG0		0x0
37 #define TSP_ARG1		0x8
38 #define TSP_ARG2		0x10
39 #define TSP_ARG3		0x18
40 #define TSP_ARG4		0x20
41 #define TSP_ARG5		0x28
42 #define TSP_ARG6		0x30
43 #define TSP_ARG7		0x38
44 #define TSP_ARGS_END		0x40
45 
46 
47 #ifndef __ASSEMBLY__
48 
49 #include <cassert.h>
50 #include <platform_def.h> /* For CACHE_WRITEBACK_GRANULE */
51 #include <spinlock.h>
52 #include <stdint.h>
53 #include <tsp.h>
54 
55 
56 typedef struct work_statistics {
57 	uint32_t fiq_count;		/* Number of FIQs on this cpu */
58 	uint32_t sync_fiq_count;	/* Number of sync. fiqs on this cpu */
59 	uint32_t sync_fiq_ret_count;	/* Number of fiq returns on this cpu */
60 	/* Number of non s-el1 interrupts on this cpu which preempted TSP */
61 	uint32_t preempt_intr_count;
62 	uint32_t smc_count;		/* Number of returns on this cpu */
63 	uint32_t eret_count;		/* Number of entries on this cpu */
64 	uint32_t cpu_on_count;		/* Number of cpu on requests */
65 	uint32_t cpu_off_count;		/* Number of cpu off requests */
66 	uint32_t cpu_suspend_count;	/* Number of cpu suspend requests */
67 	uint32_t cpu_resume_count;	/* Number of cpu resume requests */
68 } __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t;
69 
70 typedef struct tsp_args {
71 	uint64_t _regs[TSP_ARGS_END >> 3];
72 } __aligned(CACHE_WRITEBACK_GRANULE) tsp_args_t;
73 
74 /* Macros to access members of the above structure using their offsets */
75 #define read_sp_arg(args, offset)	((args)->_regs[offset >> 3])
76 #define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3])	\
77 					 = val)
78 /*
79  * Ensure that the assembler's view of the size of the tsp_args is the
80  * same as the compilers
81  */
82 CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch);
83 
84 void tsp_get_magic(uint64_t args[4]);
85 
86 tsp_args_t *tsp_cpu_resume_main(uint64_t arg0,
87 				uint64_t arg1,
88 				uint64_t arg2,
89 				uint64_t arg3,
90 				uint64_t arg4,
91 				uint64_t arg5,
92 				uint64_t arg6,
93 				uint64_t arg7);
94 tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
95 				 uint64_t arg1,
96 				 uint64_t arg2,
97 				 uint64_t arg3,
98 				 uint64_t arg4,
99 				 uint64_t arg5,
100 				 uint64_t arg6,
101 				 uint64_t arg7);
102 tsp_args_t *tsp_cpu_on_main(void);
103 tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
104 			     uint64_t arg1,
105 			     uint64_t arg2,
106 			     uint64_t arg3,
107 			     uint64_t arg4,
108 			     uint64_t arg5,
109 			     uint64_t arg6,
110 			     uint64_t arg7);
111 
112 /* Generic Timer functions */
113 void tsp_generic_timer_start(void);
114 void tsp_generic_timer_handler(void);
115 void tsp_generic_timer_stop(void);
116 void tsp_generic_timer_save(void);
117 void tsp_generic_timer_restore(void);
118 
119 /* FIQ management functions */
120 void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3);
121 
122 
123 /* Data structure to keep track of TSP statistics */
124 extern spinlock_t console_lock;
125 extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
126 
127 /* Vector table of jumps */
128 extern tsp_vectors_t tsp_vector_table;
129 
130 
131 #endif /* __ASSEMBLY__ */
132 
133 #endif /* __TSP_PRIVATE_H__ */
134 
135