xref: /rk3399_ARM-atf/bl32/tsp/tsp_private.h (revision 0c0bab0cb4cdfb48f1085c8d946ddbc12f7bf328)
1da0af78aSDan Handley /*
2*4a8bfdb9SAchin Gupta  * Copyright (c) 2014-2022, ARM Limited and Contributors. All rights reserved.
3da0af78aSDan Handley  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
5da0af78aSDan Handley  */
6da0af78aSDan Handley 
7c3cf06f1SAntonio Nino Diaz #ifndef TSP_PRIVATE_H
8c3cf06f1SAntonio Nino Diaz #define TSP_PRIVATE_H
9da0af78aSDan Handley 
10*4a8bfdb9SAchin Gupta /*******************************************************************************
11*4a8bfdb9SAchin Gupta  * The TSP memory footprint starts at address BL32_BASE and ends with the
12*4a8bfdb9SAchin Gupta  * linker symbol __BL32_END__. Use these addresses to compute the TSP image
13*4a8bfdb9SAchin Gupta  * size.
14*4a8bfdb9SAchin Gupta  ******************************************************************************/
15*4a8bfdb9SAchin Gupta #define BL32_TOTAL_LIMIT BL32_END
16*4a8bfdb9SAchin Gupta #define BL32_TOTAL_SIZE (BL32_TOTAL_LIMIT - (unsigned long) BL32_BASE)
17da0af78aSDan Handley 
18d5dfdeb6SJulius Werner #ifndef __ASSEMBLER__
19da0af78aSDan Handley 
20da0af78aSDan Handley #include <stdint.h>
21da0af78aSDan Handley 
2209d40e0eSAntonio Nino Diaz #include <bl32/tsp/tsp.h>
2309d40e0eSAntonio Nino Diaz #include <lib/cassert.h>
2409d40e0eSAntonio Nino Diaz #include <lib/spinlock.h>
25*4a8bfdb9SAchin Gupta #include <smccc_helpers.h>
26da0af78aSDan Handley 
27da0af78aSDan Handley typedef struct work_statistics {
2802446137SSoby Mathew 	/* Number of s-el1 interrupts on this cpu */
2902446137SSoby Mathew 	uint32_t sel1_intr_count;
30404dba53SSoby Mathew 	/* Number of non s-el1 interrupts on this cpu which preempted TSP */
31404dba53SSoby Mathew 	uint32_t preempt_intr_count;
3202446137SSoby Mathew 	/* Number of sync s-el1 interrupts on this cpu */
3302446137SSoby Mathew 	uint32_t sync_sel1_intr_count;
3402446137SSoby Mathew 	/* Number of s-el1 interrupts returns on this cpu */
3502446137SSoby Mathew 	uint32_t sync_sel1_intr_ret_count;
36da0af78aSDan Handley 	uint32_t smc_count;		/* Number of returns on this cpu */
37da0af78aSDan Handley 	uint32_t eret_count;		/* Number of entries on this cpu */
38da0af78aSDan Handley 	uint32_t cpu_on_count;		/* Number of cpu on requests */
39da0af78aSDan Handley 	uint32_t cpu_off_count;		/* Number of cpu off requests */
40da0af78aSDan Handley 	uint32_t cpu_suspend_count;	/* Number of cpu suspend requests */
41da0af78aSDan Handley 	uint32_t cpu_resume_count;	/* Number of cpu resume requests */
42da0af78aSDan Handley } __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t;
43da0af78aSDan Handley 
44da0af78aSDan Handley /* Macros to access members of the above structure using their offsets */
45da0af78aSDan Handley #define read_sp_arg(args, offset)	((args)->_regs[offset >> 3])
46da0af78aSDan Handley #define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3])	\
47da0af78aSDan Handley 					 = val)
48da0af78aSDan Handley 
49caff3c87SAlexei Fedorov uint128_t tsp_get_magic(void);
50da0af78aSDan Handley 
51*4a8bfdb9SAchin Gupta smc_args_t *set_smc_args(uint64_t arg0,
52da0af78aSDan Handley 			 uint64_t arg1,
53da0af78aSDan Handley 			 uint64_t arg2,
54da0af78aSDan Handley 			 uint64_t arg3,
55da0af78aSDan Handley 			 uint64_t arg4,
56da0af78aSDan Handley 			 uint64_t arg5,
57da0af78aSDan Handley 			 uint64_t arg6,
58da0af78aSDan Handley 			 uint64_t arg7);
59*4a8bfdb9SAchin Gupta smc_args_t *tsp_cpu_resume_main(uint64_t max_off_pwrlvl,
60da0af78aSDan Handley 				uint64_t arg1,
61da0af78aSDan Handley 				uint64_t arg2,
62da0af78aSDan Handley 				uint64_t arg3,
63da0af78aSDan Handley 				uint64_t arg4,
64da0af78aSDan Handley 				uint64_t arg5,
65da0af78aSDan Handley 				uint64_t arg6,
66da0af78aSDan Handley 				uint64_t arg7);
67*4a8bfdb9SAchin Gupta smc_args_t *tsp_cpu_suspend_main(uint64_t arg0,
68*4a8bfdb9SAchin Gupta 				 uint64_t arg1,
69*4a8bfdb9SAchin Gupta 				 uint64_t arg2,
70*4a8bfdb9SAchin Gupta 				 uint64_t arg3,
71*4a8bfdb9SAchin Gupta 				 uint64_t arg4,
72*4a8bfdb9SAchin Gupta 				 uint64_t arg5,
73*4a8bfdb9SAchin Gupta 				 uint64_t arg6,
74*4a8bfdb9SAchin Gupta 				 uint64_t arg7);
75*4a8bfdb9SAchin Gupta smc_args_t *tsp_cpu_on_main(void);
76*4a8bfdb9SAchin Gupta smc_args_t *tsp_cpu_off_main(uint64_t arg0,
77da0af78aSDan Handley 			     uint64_t arg1,
78da0af78aSDan Handley 			     uint64_t arg2,
79da0af78aSDan Handley 			     uint64_t arg3,
80da0af78aSDan Handley 			     uint64_t arg4,
81da0af78aSDan Handley 			     uint64_t arg5,
82da0af78aSDan Handley 			     uint64_t arg6,
83da0af78aSDan Handley 			     uint64_t arg7);
84da0af78aSDan Handley 
85da0af78aSDan Handley /* Generic Timer functions */
86da0af78aSDan Handley void tsp_generic_timer_start(void);
87da0af78aSDan Handley void tsp_generic_timer_handler(void);
88da0af78aSDan Handley void tsp_generic_timer_stop(void);
89da0af78aSDan Handley void tsp_generic_timer_save(void);
90da0af78aSDan Handley void tsp_generic_timer_restore(void);
91da0af78aSDan Handley 
9202446137SSoby Mathew /* S-EL1 interrupt management functions */
9302446137SSoby Mathew void tsp_update_sync_sel1_intr_stats(uint32_t type, uint64_t elr_el3);
94da0af78aSDan Handley 
95da0af78aSDan Handley 
96da0af78aSDan Handley /* Data structure to keep track of TSP statistics */
97da0af78aSDan Handley extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
98da0af78aSDan Handley 
99da0af78aSDan Handley /* Vector table of jumps */
100da0af78aSDan Handley extern tsp_vectors_t tsp_vector_table;
101da0af78aSDan Handley 
1021a29f938SRoberto Vargas /* functions */
1031a29f938SRoberto Vargas int32_t tsp_common_int_handler(void);
1041a29f938SRoberto Vargas int32_t tsp_handle_preemption(void);
105da0af78aSDan Handley 
106*4a8bfdb9SAchin Gupta smc_args_t *tsp_abort_smc_handler(uint64_t func,
1071a29f938SRoberto Vargas 				  uint64_t arg1,
1081a29f938SRoberto Vargas 				  uint64_t arg2,
1091a29f938SRoberto Vargas 				  uint64_t arg3,
1101a29f938SRoberto Vargas 				  uint64_t arg4,
1111a29f938SRoberto Vargas 				  uint64_t arg5,
1121a29f938SRoberto Vargas 				  uint64_t arg6,
1131a29f938SRoberto Vargas 				  uint64_t arg7);
1141a29f938SRoberto Vargas 
115*4a8bfdb9SAchin Gupta smc_args_t *tsp_smc_handler(uint64_t func,
1161a29f938SRoberto Vargas 			    uint64_t arg1,
1171a29f938SRoberto Vargas 			    uint64_t arg2,
1181a29f938SRoberto Vargas 			    uint64_t arg3,
1191a29f938SRoberto Vargas 			    uint64_t arg4,
1201a29f938SRoberto Vargas 			    uint64_t arg5,
1211a29f938SRoberto Vargas 			    uint64_t arg6,
1221a29f938SRoberto Vargas 			    uint64_t arg7);
1231a29f938SRoberto Vargas 
124*4a8bfdb9SAchin Gupta smc_args_t *tsp_system_reset_main(uint64_t arg0,
1251a29f938SRoberto Vargas 				  uint64_t arg1,
1261a29f938SRoberto Vargas 				  uint64_t arg2,
1271a29f938SRoberto Vargas 				  uint64_t arg3,
1281a29f938SRoberto Vargas 				  uint64_t arg4,
1291a29f938SRoberto Vargas 				  uint64_t arg5,
1301a29f938SRoberto Vargas 				  uint64_t arg6,
1311a29f938SRoberto Vargas 				  uint64_t arg7);
1321a29f938SRoberto Vargas 
133*4a8bfdb9SAchin Gupta smc_args_t *tsp_system_off_main(uint64_t arg0,
1341a29f938SRoberto Vargas 				uint64_t arg1,
1351a29f938SRoberto Vargas 				uint64_t arg2,
1361a29f938SRoberto Vargas 				uint64_t arg3,
1371a29f938SRoberto Vargas 				uint64_t arg4,
1381a29f938SRoberto Vargas 				uint64_t arg5,
1391a29f938SRoberto Vargas 				uint64_t arg6,
1401a29f938SRoberto Vargas 				uint64_t arg7);
1411a29f938SRoberto Vargas 
1421a29f938SRoberto Vargas uint64_t tsp_main(void);
143d5dfdeb6SJulius Werner #endif /* __ASSEMBLER__ */
144da0af78aSDan Handley 
145c3cf06f1SAntonio Nino Diaz #endif /* TSP_PRIVATE_H */
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