xref: /rk3399_ARM-atf/bl32/tsp/tsp_private.h (revision 02446137a4e2a504706fb1f4059467643e2930a5)
1da0af78aSDan Handley /*
2da0af78aSDan Handley  * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3da0af78aSDan Handley  *
4da0af78aSDan Handley  * Redistribution and use in source and binary forms, with or without
5da0af78aSDan Handley  * modification, are permitted provided that the following conditions are met:
6da0af78aSDan Handley  *
7da0af78aSDan Handley  * Redistributions of source code must retain the above copyright notice, this
8da0af78aSDan Handley  * list of conditions and the following disclaimer.
9da0af78aSDan Handley  *
10da0af78aSDan Handley  * Redistributions in binary form must reproduce the above copyright notice,
11da0af78aSDan Handley  * this list of conditions and the following disclaimer in the documentation
12da0af78aSDan Handley  * and/or other materials provided with the distribution.
13da0af78aSDan Handley  *
14da0af78aSDan Handley  * Neither the name of ARM nor the names of its contributors may be used
15da0af78aSDan Handley  * to endorse or promote products derived from this software without specific
16da0af78aSDan Handley  * prior written permission.
17da0af78aSDan Handley  *
18da0af78aSDan Handley  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19da0af78aSDan Handley  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20da0af78aSDan Handley  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21da0af78aSDan Handley  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22da0af78aSDan Handley  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23da0af78aSDan Handley  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24da0af78aSDan Handley  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25da0af78aSDan Handley  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26da0af78aSDan Handley  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27da0af78aSDan Handley  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28da0af78aSDan Handley  * POSSIBILITY OF SUCH DAMAGE.
29da0af78aSDan Handley  */
30da0af78aSDan Handley 
31da0af78aSDan Handley #ifndef __TSP_PRIVATE_H__
32da0af78aSDan Handley #define __TSP_PRIVATE_H__
33da0af78aSDan Handley 
34da0af78aSDan Handley /* Definitions to help the assembler access the SMC/ERET args structure */
35da0af78aSDan Handley #define TSP_ARGS_SIZE		0x40
36da0af78aSDan Handley #define TSP_ARG0		0x0
37da0af78aSDan Handley #define TSP_ARG1		0x8
38da0af78aSDan Handley #define TSP_ARG2		0x10
39da0af78aSDan Handley #define TSP_ARG3		0x18
40da0af78aSDan Handley #define TSP_ARG4		0x20
41da0af78aSDan Handley #define TSP_ARG5		0x28
42da0af78aSDan Handley #define TSP_ARG6		0x30
43da0af78aSDan Handley #define TSP_ARG7		0x38
44da0af78aSDan Handley #define TSP_ARGS_END		0x40
45da0af78aSDan Handley 
46da0af78aSDan Handley 
47da0af78aSDan Handley #ifndef __ASSEMBLY__
48da0af78aSDan Handley 
49da0af78aSDan Handley #include <cassert.h>
50da0af78aSDan Handley #include <platform_def.h> /* For CACHE_WRITEBACK_GRANULE */
51da0af78aSDan Handley #include <spinlock.h>
52da0af78aSDan Handley #include <stdint.h>
53da0af78aSDan Handley #include <tsp.h>
54da0af78aSDan Handley 
55da0af78aSDan Handley 
56da0af78aSDan Handley typedef struct work_statistics {
57*02446137SSoby Mathew 	/* Number of s-el1 interrupts on this cpu */
58*02446137SSoby Mathew 	uint32_t sel1_intr_count;
59404dba53SSoby Mathew 	/* Number of non s-el1 interrupts on this cpu which preempted TSP */
60404dba53SSoby Mathew 	uint32_t preempt_intr_count;
61*02446137SSoby Mathew 	/* Number of sync s-el1 interrupts on this cpu */
62*02446137SSoby Mathew 	uint32_t sync_sel1_intr_count;
63*02446137SSoby Mathew 	/* Number of s-el1 interrupts returns on this cpu */
64*02446137SSoby Mathew 	uint32_t sync_sel1_intr_ret_count;
65da0af78aSDan Handley 	uint32_t smc_count;		/* Number of returns on this cpu */
66da0af78aSDan Handley 	uint32_t eret_count;		/* Number of entries on this cpu */
67da0af78aSDan Handley 	uint32_t cpu_on_count;		/* Number of cpu on requests */
68da0af78aSDan Handley 	uint32_t cpu_off_count;		/* Number of cpu off requests */
69da0af78aSDan Handley 	uint32_t cpu_suspend_count;	/* Number of cpu suspend requests */
70da0af78aSDan Handley 	uint32_t cpu_resume_count;	/* Number of cpu resume requests */
71da0af78aSDan Handley } __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t;
72da0af78aSDan Handley 
73da0af78aSDan Handley typedef struct tsp_args {
74da0af78aSDan Handley 	uint64_t _regs[TSP_ARGS_END >> 3];
75da0af78aSDan Handley } __aligned(CACHE_WRITEBACK_GRANULE) tsp_args_t;
76da0af78aSDan Handley 
77da0af78aSDan Handley /* Macros to access members of the above structure using their offsets */
78da0af78aSDan Handley #define read_sp_arg(args, offset)	((args)->_regs[offset >> 3])
79da0af78aSDan Handley #define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3])	\
80da0af78aSDan Handley 					 = val)
81da0af78aSDan Handley /*
82da0af78aSDan Handley  * Ensure that the assembler's view of the size of the tsp_args is the
83da0af78aSDan Handley  * same as the compilers
84da0af78aSDan Handley  */
85da0af78aSDan Handley CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch);
86da0af78aSDan Handley 
87da0af78aSDan Handley void tsp_get_magic(uint64_t args[4]);
88da0af78aSDan Handley 
89da0af78aSDan Handley tsp_args_t *tsp_cpu_resume_main(uint64_t arg0,
90da0af78aSDan Handley 				uint64_t arg1,
91da0af78aSDan Handley 				uint64_t arg2,
92da0af78aSDan Handley 				uint64_t arg3,
93da0af78aSDan Handley 				uint64_t arg4,
94da0af78aSDan Handley 				uint64_t arg5,
95da0af78aSDan Handley 				uint64_t arg6,
96da0af78aSDan Handley 				uint64_t arg7);
97da0af78aSDan Handley tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
98da0af78aSDan Handley 				 uint64_t arg1,
99da0af78aSDan Handley 				 uint64_t arg2,
100da0af78aSDan Handley 				 uint64_t arg3,
101da0af78aSDan Handley 				 uint64_t arg4,
102da0af78aSDan Handley 				 uint64_t arg5,
103da0af78aSDan Handley 				 uint64_t arg6,
104da0af78aSDan Handley 				 uint64_t arg7);
105da0af78aSDan Handley tsp_args_t *tsp_cpu_on_main(void);
106da0af78aSDan Handley tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
107da0af78aSDan Handley 			     uint64_t arg1,
108da0af78aSDan Handley 			     uint64_t arg2,
109da0af78aSDan Handley 			     uint64_t arg3,
110da0af78aSDan Handley 			     uint64_t arg4,
111da0af78aSDan Handley 			     uint64_t arg5,
112da0af78aSDan Handley 			     uint64_t arg6,
113da0af78aSDan Handley 			     uint64_t arg7);
114da0af78aSDan Handley 
115da0af78aSDan Handley /* Generic Timer functions */
116da0af78aSDan Handley void tsp_generic_timer_start(void);
117da0af78aSDan Handley void tsp_generic_timer_handler(void);
118da0af78aSDan Handley void tsp_generic_timer_stop(void);
119da0af78aSDan Handley void tsp_generic_timer_save(void);
120da0af78aSDan Handley void tsp_generic_timer_restore(void);
121da0af78aSDan Handley 
122*02446137SSoby Mathew /* S-EL1 interrupt management functions */
123*02446137SSoby Mathew void tsp_update_sync_sel1_intr_stats(uint32_t type, uint64_t elr_el3);
124da0af78aSDan Handley 
125da0af78aSDan Handley 
126da0af78aSDan Handley /* Data structure to keep track of TSP statistics */
127da0af78aSDan Handley extern spinlock_t console_lock;
128da0af78aSDan Handley extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
129da0af78aSDan Handley 
130da0af78aSDan Handley /* Vector table of jumps */
131da0af78aSDan Handley extern tsp_vectors_t tsp_vector_table;
132da0af78aSDan Handley 
133da0af78aSDan Handley 
134da0af78aSDan Handley #endif /* __ASSEMBLY__ */
135da0af78aSDan Handley 
136da0af78aSDan Handley #endif /* __TSP_PRIVATE_H__ */
137da0af78aSDan Handley 
138