xref: /rk3399_ARM-atf/bl31/interrupt_mgmt.c (revision f4f1ae777b321e5e16ee1ba4591ea9d45845edef)
1e1333f75SAchin Gupta /*
2e1333f75SAchin Gupta  * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3e1333f75SAchin Gupta  *
4e1333f75SAchin Gupta  * Redistribution and use in source and binary forms, with or without
5e1333f75SAchin Gupta  * modification, are permitted provided that the following conditions are met:
6e1333f75SAchin Gupta  *
7e1333f75SAchin Gupta  * Redistributions of source code must retain the above copyright notice, this
8e1333f75SAchin Gupta  * list of conditions and the following disclaimer.
9e1333f75SAchin Gupta  *
10e1333f75SAchin Gupta  * Redistributions in binary form must reproduce the above copyright notice,
11e1333f75SAchin Gupta  * this list of conditions and the following disclaimer in the documentation
12e1333f75SAchin Gupta  * and/or other materials provided with the distribution.
13e1333f75SAchin Gupta  *
14e1333f75SAchin Gupta  * Neither the name of ARM nor the names of its contributors may be used
15e1333f75SAchin Gupta  * to endorse or promote products derived from this software without specific
16e1333f75SAchin Gupta  * prior written permission.
17e1333f75SAchin Gupta  *
18e1333f75SAchin Gupta  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19e1333f75SAchin Gupta  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20e1333f75SAchin Gupta  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21e1333f75SAchin Gupta  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22e1333f75SAchin Gupta  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23e1333f75SAchin Gupta  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24e1333f75SAchin Gupta  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25e1333f75SAchin Gupta  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26e1333f75SAchin Gupta  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27e1333f75SAchin Gupta  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28e1333f75SAchin Gupta  * POSSIBILITY OF SUCH DAMAGE.
29e1333f75SAchin Gupta  */
30e1333f75SAchin Gupta 
31e1333f75SAchin Gupta #include <assert.h>
32e1333f75SAchin Gupta #include <bl_common.h>
33e1333f75SAchin Gupta #include <context_mgmt.h>
34e1333f75SAchin Gupta #include <errno.h>
35e1333f75SAchin Gupta #include <interrupt_mgmt.h>
36e1333f75SAchin Gupta #include <platform.h>
37e1333f75SAchin Gupta #include <stdio.h>
38e1333f75SAchin Gupta 
39e1333f75SAchin Gupta /*******************************************************************************
40e1333f75SAchin Gupta  * Local structure and corresponding array to keep track of the state of the
41e1333f75SAchin Gupta  * registered interrupt handlers for each interrupt type.
42e1333f75SAchin Gupta  * The field descriptions are:
43e1333f75SAchin Gupta  *
44e1333f75SAchin Gupta  * 'flags' : Bit[0], Routing model for this interrupt type when execution is
45e1333f75SAchin Gupta  *                   not in EL3 in the secure state. '1' implies that this
46e1333f75SAchin Gupta  *                   interrupt will be routed to EL3. '0' implies that this
47e1333f75SAchin Gupta  *                   interrupt will be routed to the current exception level.
48e1333f75SAchin Gupta  *
49e1333f75SAchin Gupta  *           Bit[1], Routing model for this interrupt type when execution is
50e1333f75SAchin Gupta  *                   not in EL3 in the non-secure state. '1' implies that this
51e1333f75SAchin Gupta  *                   interrupt will be routed to EL3. '0' implies that this
52e1333f75SAchin Gupta  *                   interrupt will be routed to the current exception level.
53e1333f75SAchin Gupta  *
54e1333f75SAchin Gupta  *           All other bits are reserved and SBZ.
55e1333f75SAchin Gupta  *
56e1333f75SAchin Gupta  * 'scr_el3[2]'  : Mapping of the routing model in the 'flags' field to the
57e1333f75SAchin Gupta  *                 value of the SCR_EL3.IRQ or FIQ bit for each security state.
58e1333f75SAchin Gupta  *                 There are two instances of this field corresponding to the
59e1333f75SAchin Gupta  *                 two security states.
60e1333f75SAchin Gupta  ******************************************************************************/
61e1333f75SAchin Gupta typedef struct intr_type_desc {
62e1333f75SAchin Gupta 	interrupt_type_handler_t handler;
63e1333f75SAchin Gupta 	uint32_t flags;
64e1333f75SAchin Gupta 	uint32_t scr_el3[2];
65e1333f75SAchin Gupta } intr_type_desc_t;
66e1333f75SAchin Gupta 
67e1333f75SAchin Gupta static intr_type_desc_t intr_type_descs[MAX_INTR_TYPES];
68e1333f75SAchin Gupta 
69e1333f75SAchin Gupta /*******************************************************************************
70e1333f75SAchin Gupta  * This function validates the interrupt type. EL3 interrupts are currently not
71e1333f75SAchin Gupta  * supported.
72e1333f75SAchin Gupta  ******************************************************************************/
73e1333f75SAchin Gupta static int32_t validate_interrupt_type(uint32_t type)
74e1333f75SAchin Gupta {
75e1333f75SAchin Gupta 	if (type == INTR_TYPE_EL3)
76e1333f75SAchin Gupta 		return -ENOTSUP;
77e1333f75SAchin Gupta 
78e1333f75SAchin Gupta 	if (type != INTR_TYPE_S_EL1 && type != INTR_TYPE_NS)
79e1333f75SAchin Gupta 		return -EINVAL;
80e1333f75SAchin Gupta 
81e1333f75SAchin Gupta 	return 0;
82e1333f75SAchin Gupta }
83e1333f75SAchin Gupta 
84e1333f75SAchin Gupta /*******************************************************************************
85e1333f75SAchin Gupta * This function validates the routing model for this type of interrupt
86e1333f75SAchin Gupta  ******************************************************************************/
87e1333f75SAchin Gupta static int32_t validate_routing_model(uint32_t type, uint32_t flags)
88e1333f75SAchin Gupta {
89e1333f75SAchin Gupta 	flags >>= INTR_RM_FLAGS_SHIFT;
90e1333f75SAchin Gupta 	flags &= INTR_RM_FLAGS_MASK;
91e1333f75SAchin Gupta 
92e1333f75SAchin Gupta 	if (type == INTR_TYPE_S_EL1)
93e1333f75SAchin Gupta 		return validate_sel1_interrupt_rm(flags);
94e1333f75SAchin Gupta 
95e1333f75SAchin Gupta 	if (type == INTR_TYPE_NS)
96e1333f75SAchin Gupta 		return validate_ns_interrupt_rm(flags);
97e1333f75SAchin Gupta 
98e1333f75SAchin Gupta 	return -EINVAL;
99e1333f75SAchin Gupta }
100e1333f75SAchin Gupta 
101e1333f75SAchin Gupta /*******************************************************************************
102e1333f75SAchin Gupta  * This function returns the cached copy of the SCR_EL3 which contains the
103e1333f75SAchin Gupta  * routing model (expressed through the IRQ and FIQ bits) for a security state
104e1333f75SAchin Gupta  * which was stored through a call to 'set_routing_model()' earlier.
105e1333f75SAchin Gupta  ******************************************************************************/
106e1333f75SAchin Gupta uint32_t get_scr_el3_from_routing_model(uint32_t security_state)
107e1333f75SAchin Gupta {
108e1333f75SAchin Gupta 	uint32_t scr_el3;
109e1333f75SAchin Gupta 
110d3280bebSJuan Castillo 	assert(sec_state_is_valid(security_state));
111e1333f75SAchin Gupta 	scr_el3 = intr_type_descs[INTR_TYPE_NS].scr_el3[security_state];
112e1333f75SAchin Gupta 	scr_el3 |= intr_type_descs[INTR_TYPE_S_EL1].scr_el3[security_state];
113e1333f75SAchin Gupta 	scr_el3 |= intr_type_descs[INTR_TYPE_EL3].scr_el3[security_state];
114e1333f75SAchin Gupta 	return scr_el3;
115e1333f75SAchin Gupta }
116e1333f75SAchin Gupta 
117e1333f75SAchin Gupta /*******************************************************************************
118e1333f75SAchin Gupta  * This function uses the 'interrupt_type_flags' parameter to obtain the value
119e1333f75SAchin Gupta  * of the trap bit (IRQ/FIQ) in the SCR_EL3 for a security state for this
120e1333f75SAchin Gupta  * interrupt type. It uses it to update the SCR_EL3 in the cpu context and the
121e1333f75SAchin Gupta  * 'intr_type_desc' for that security state.
122e1333f75SAchin Gupta  ******************************************************************************/
123e1333f75SAchin Gupta static void set_scr_el3_from_rm(uint32_t type,
124e1333f75SAchin Gupta 				uint32_t interrupt_type_flags,
125e1333f75SAchin Gupta 				uint32_t security_state)
126e1333f75SAchin Gupta {
127e1333f75SAchin Gupta 	uint32_t flag, bit_pos;
128e1333f75SAchin Gupta 
129e1333f75SAchin Gupta 	flag = get_interrupt_rm_flag(interrupt_type_flags, security_state);
130e1333f75SAchin Gupta 	bit_pos = plat_interrupt_type_to_line(type, security_state);
131e1333f75SAchin Gupta 	intr_type_descs[type].scr_el3[security_state] = flag << bit_pos;
132e1333f75SAchin Gupta 	cm_write_scr_el3_bit(security_state, bit_pos, flag);
133e1333f75SAchin Gupta }
134e1333f75SAchin Gupta 
135e1333f75SAchin Gupta /*******************************************************************************
136e1333f75SAchin Gupta  * This function validates the routing model specified in the 'flags' and
137e1333f75SAchin Gupta  * updates internal data structures to reflect the new routing model. It also
138e1333f75SAchin Gupta  * updates the copy of SCR_EL3 for each security state with the new routing
139e1333f75SAchin Gupta  * model in the 'cpu_context' structure for this cpu.
140e1333f75SAchin Gupta  ******************************************************************************/
141e1333f75SAchin Gupta int32_t set_routing_model(uint32_t type, uint32_t flags)
142e1333f75SAchin Gupta {
143e1333f75SAchin Gupta 	int32_t rc;
144e1333f75SAchin Gupta 
145e1333f75SAchin Gupta 	rc = validate_interrupt_type(type);
146e1333f75SAchin Gupta 	if (rc)
147e1333f75SAchin Gupta 		return rc;
148e1333f75SAchin Gupta 
149e1333f75SAchin Gupta 	rc = validate_routing_model(type, flags);
150e1333f75SAchin Gupta 	if (rc)
151e1333f75SAchin Gupta 		return rc;
152e1333f75SAchin Gupta 
153e1333f75SAchin Gupta 	/* Update the routing model in internal data structures */
154e1333f75SAchin Gupta 	intr_type_descs[type].flags = flags;
155e1333f75SAchin Gupta 	set_scr_el3_from_rm(type, flags, SECURE);
156e1333f75SAchin Gupta 	set_scr_el3_from_rm(type, flags, NON_SECURE);
157e1333f75SAchin Gupta 
158e1333f75SAchin Gupta 	return 0;
159e1333f75SAchin Gupta }
160e1333f75SAchin Gupta 
161*f4f1ae77SSoby Mathew /******************************************************************************
162*f4f1ae77SSoby Mathew  * This function disables the routing model of interrupt 'type' from the
163*f4f1ae77SSoby Mathew  * specified 'security_state' on the local core. The disable is in effect
164*f4f1ae77SSoby Mathew  * till the core powers down or till the next enable for that interrupt
165*f4f1ae77SSoby Mathew  * type.
166*f4f1ae77SSoby Mathew  *****************************************************************************/
167*f4f1ae77SSoby Mathew int disable_intr_rm_local(uint32_t type, uint32_t security_state)
168*f4f1ae77SSoby Mathew {
169*f4f1ae77SSoby Mathew 	uint32_t bit_pos, flag;
170*f4f1ae77SSoby Mathew 
171*f4f1ae77SSoby Mathew 	assert(intr_type_descs[type].handler);
172*f4f1ae77SSoby Mathew 
173*f4f1ae77SSoby Mathew 	flag = get_interrupt_rm_flag(INTR_DEFAULT_RM, security_state);
174*f4f1ae77SSoby Mathew 
175*f4f1ae77SSoby Mathew 	bit_pos = plat_interrupt_type_to_line(type, security_state);
176*f4f1ae77SSoby Mathew 	cm_write_scr_el3_bit(security_state, bit_pos, flag);
177*f4f1ae77SSoby Mathew 
178*f4f1ae77SSoby Mathew 	return 0;
179*f4f1ae77SSoby Mathew }
180*f4f1ae77SSoby Mathew 
181*f4f1ae77SSoby Mathew /******************************************************************************
182*f4f1ae77SSoby Mathew  * This function enables the routing model of interrupt 'type' from the
183*f4f1ae77SSoby Mathew  * specified 'security_state' on the local core.
184*f4f1ae77SSoby Mathew  *****************************************************************************/
185*f4f1ae77SSoby Mathew int enable_intr_rm_local(uint32_t type, uint32_t security_state)
186*f4f1ae77SSoby Mathew {
187*f4f1ae77SSoby Mathew 	uint32_t bit_pos, flag;
188*f4f1ae77SSoby Mathew 
189*f4f1ae77SSoby Mathew 	assert(intr_type_descs[type].handler);
190*f4f1ae77SSoby Mathew 
191*f4f1ae77SSoby Mathew 	flag = get_interrupt_rm_flag(intr_type_descs[type].flags,
192*f4f1ae77SSoby Mathew 				security_state);
193*f4f1ae77SSoby Mathew 
194*f4f1ae77SSoby Mathew 	bit_pos = plat_interrupt_type_to_line(type, security_state);
195*f4f1ae77SSoby Mathew 	cm_write_scr_el3_bit(security_state, bit_pos, flag);
196*f4f1ae77SSoby Mathew 
197*f4f1ae77SSoby Mathew 	return 0;
198*f4f1ae77SSoby Mathew }
199*f4f1ae77SSoby Mathew 
200e1333f75SAchin Gupta /*******************************************************************************
201e1333f75SAchin Gupta  * This function registers a handler for the 'type' of interrupt specified. It
202e1333f75SAchin Gupta  * also validates the routing model specified in the 'flags' for this type of
203e1333f75SAchin Gupta  * interrupt.
204e1333f75SAchin Gupta  ******************************************************************************/
205e1333f75SAchin Gupta int32_t register_interrupt_type_handler(uint32_t type,
206e1333f75SAchin Gupta 					interrupt_type_handler_t handler,
207e1333f75SAchin Gupta 					uint32_t flags)
208e1333f75SAchin Gupta {
209e1333f75SAchin Gupta 	int32_t rc;
210e1333f75SAchin Gupta 
211e1333f75SAchin Gupta 	/* Validate the 'handler' parameter */
212e1333f75SAchin Gupta 	if (!handler)
213e1333f75SAchin Gupta 		return -EINVAL;
214e1333f75SAchin Gupta 
215e1333f75SAchin Gupta 	/* Validate the 'flags' parameter */
216e1333f75SAchin Gupta 	if (flags & INTR_TYPE_FLAGS_MASK)
217e1333f75SAchin Gupta 		return -EINVAL;
218e1333f75SAchin Gupta 
219e1333f75SAchin Gupta 	/* Check if a handler has already been registered */
220e1333f75SAchin Gupta 	if (intr_type_descs[type].handler)
221e1333f75SAchin Gupta 		return -EALREADY;
222e1333f75SAchin Gupta 
223e1333f75SAchin Gupta 	rc = set_routing_model(type, flags);
224e1333f75SAchin Gupta 	if (rc)
225e1333f75SAchin Gupta 		return rc;
226e1333f75SAchin Gupta 
227e1333f75SAchin Gupta 	/* Save the handler */
228e1333f75SAchin Gupta 	intr_type_descs[type].handler = handler;
229e1333f75SAchin Gupta 
230e1333f75SAchin Gupta 	return 0;
231e1333f75SAchin Gupta }
232e1333f75SAchin Gupta 
233e1333f75SAchin Gupta /*******************************************************************************
234e1333f75SAchin Gupta  * This function is called when an interrupt is generated and returns the
235e1333f75SAchin Gupta  * handler for the interrupt type (if registered). It returns NULL if the
236e1333f75SAchin Gupta  * interrupt type is not supported or its handler has not been registered.
237e1333f75SAchin Gupta  ******************************************************************************/
238e1333f75SAchin Gupta interrupt_type_handler_t get_interrupt_type_handler(uint32_t type)
239e1333f75SAchin Gupta {
240e1333f75SAchin Gupta 	if (validate_interrupt_type(type))
241e1333f75SAchin Gupta 		return NULL;
242e1333f75SAchin Gupta 
243e1333f75SAchin Gupta 	return intr_type_descs[type].handler;
244e1333f75SAchin Gupta }
245e1333f75SAchin Gupta 
246