1/* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <arch.h> 32#include <runtime_svc.h> 33 34 .globl runtime_exceptions 35 36 37#include <asm_macros.S> 38 39 40 .section .text, "ax"; .align 11 41 42 .align 7 43runtime_exceptions: 44 /* ----------------------------------------------------- 45 * Current EL with _sp_el0 : 0x0 - 0x180 46 * ----------------------------------------------------- 47 */ 48sync_exception_sp_el0: 49 exception_entry save_regs 50 mov x0, #SYNC_EXCEPTION_SP_EL0 51 mov x1, sp 52 bl sync_exception_handler 53 exception_exit restore_regs 54 eret 55 56 .align 7 57irq_sp_el0: 58 exception_entry save_regs 59 mov x0, #IRQ_SP_EL0 60 mov x1, sp 61 bl async_exception_handler 62 exception_exit restore_regs 63 eret 64 65 .align 7 66fiq_sp_el0: 67 exception_entry save_regs 68 mov x0, #FIQ_SP_EL0 69 mov x1, sp 70 bl async_exception_handler 71 exception_exit restore_regs 72 eret 73 74 .align 7 75serror_sp_el0: 76 exception_entry save_regs 77 mov x0, #SERROR_SP_EL0 78 mov x1, sp 79 bl async_exception_handler 80 exception_exit restore_regs 81 eret 82 83 /* ----------------------------------------------------- 84 * Current EL with SPx: 0x200 - 0x380 85 * ----------------------------------------------------- 86 */ 87 .align 7 88sync_exception_sp_elx: 89 exception_entry save_regs 90 mov x0, #SYNC_EXCEPTION_SP_ELX 91 mov x1, sp 92 bl sync_exception_handler 93 exception_exit restore_regs 94 eret 95 96 .align 7 97irq_sp_elx: 98 exception_entry save_regs 99 mov x0, #IRQ_SP_ELX 100 mov x1, sp 101 bl async_exception_handler 102 exception_exit restore_regs 103 eret 104 105 .align 7 106fiq_sp_elx: 107 exception_entry save_regs 108 mov x0, #FIQ_SP_ELX 109 mov x1, sp 110 bl async_exception_handler 111 exception_exit restore_regs 112 eret 113 114 .align 7 115serror_sp_elx: 116 exception_entry save_regs 117 mov x0, #SERROR_SP_ELX 118 mov x1, sp 119 bl async_exception_handler 120 exception_exit restore_regs 121 eret 122 123 /* ----------------------------------------------------- 124 * Lower EL using AArch64 : 0x400 - 0x580 125 * ----------------------------------------------------- 126 */ 127 .align 7 128sync_exception_aarch64: 129 exception_entry save_regs 130 mov x0, #SYNC_EXCEPTION_AARCH64 131 mov x1, sp 132 bl sync_exception_handler 133 exception_exit restore_regs 134 eret 135 136 .align 7 137irq_aarch64: 138 exception_entry save_regs 139 mov x0, #IRQ_AARCH64 140 mov x1, sp 141 bl async_exception_handler 142 exception_exit restore_regs 143 eret 144 145 .align 7 146fiq_aarch64: 147 exception_entry save_regs 148 mov x0, #FIQ_AARCH64 149 mov x1, sp 150 bl async_exception_handler 151 exception_exit restore_regs 152 eret 153 154 .align 7 155serror_aarch64: 156 exception_entry save_regs 157 mov x0, #IRQ_AARCH32 158 mov x1, sp 159 bl async_exception_handler 160 exception_exit restore_regs 161 eret 162 163 /* ----------------------------------------------------- 164 * Lower EL using AArch32 : 0x600 - 0x780 165 * ----------------------------------------------------- 166 */ 167 .align 7 168sync_exception_aarch32: 169 exception_entry save_regs 170 mov x0, #SYNC_EXCEPTION_AARCH32 171 mov x1, sp 172 bl sync_exception_handler 173 exception_exit restore_regs 174 eret 175 176 .align 7 177irq_aarch32: 178 exception_entry save_regs 179 mov x0, #IRQ_AARCH32 180 mov x1, sp 181 bl async_exception_handler 182 exception_exit restore_regs 183 eret 184 185 .align 7 186fiq_aarch32: 187 exception_entry save_regs 188 mov x0, #FIQ_AARCH32 189 mov x1, sp 190 bl async_exception_handler 191 exception_exit restore_regs 192 eret 193 194 .align 7 195serror_aarch32: 196 exception_entry save_regs 197 mov x0, #SERROR_AARCH32 198 mov x1, sp 199 bl async_exception_handler 200 exception_exit restore_regs 201 eret 202 203 .align 7 204 205