1/* 2 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 8#include <assert_macros.S> 9#include <asm_macros.S> 10#include <assert_macros.S> 11#include <bl31/ea_handle.h> 12#include <context.h> 13#include <lib/extensions/ras_arch.h> 14 15 16 .globl handle_lower_el_ea_esb 17 .globl enter_lower_el_sync_ea 18 .globl enter_lower_el_async_ea 19 20 21/* 22 * Function to delegate External Aborts synchronized by ESB instruction at EL3 23 * vector entry. This function assumes GP registers x0-x29 have been saved, and 24 * are available for use. It delegates the handling of the EA to platform 25 * handler, and returns only upon successfully handling the EA; otherwise 26 * panics. On return from this function, the original exception handler is 27 * expected to resume. 28 */ 29func handle_lower_el_ea_esb 30 mov x0, #ERROR_EA_ESB 31 mrs x1, DISR_EL1 32 b ea_proceed 33endfunc handle_lower_el_ea_esb 34 35 36/* 37 * This function forms the tail end of Synchronous Exception entry from lower 38 * EL, and expects to handle only Synchronous External Aborts from lower EL. If 39 * any other kind of exception is detected, then this function reports unhandled 40 * exception. 41 * 42 * Since it's part of exception vector, this function doesn't expect any GP 43 * registers to have been saved. It delegates the handling of the EA to platform 44 * handler, and upon successfully handling the EA, exits EL3; otherwise panics. 45 */ 46func enter_lower_el_sync_ea 47 /* 48 * Explicitly save x30 so as to free up a register and to enable 49 * branching. 50 */ 51 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] 52 53 mrs x30, esr_el3 54 ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH 55 56 /* Check for I/D aborts from lower EL */ 57 cmp x30, #EC_IABORT_LOWER_EL 58 b.eq 1f 59 60 cmp x30, #EC_DABORT_LOWER_EL 61 b.ne 2f 62 631: 64 /* Test for EA bit in the instruction syndrome */ 65 mrs x30, esr_el3 66 tbz x30, #ESR_ISS_EABORT_EA_BIT, 2f 67 68 /* Save GP registers */ 69 bl save_gp_registers 70 71 /* Save ARMv8.3-PAuth registers and load firmware key */ 72#if CTX_INCLUDE_PAUTH_REGS 73 bl pauth_context_save 74#endif 75#if ENABLE_PAUTH 76 bl pauth_load_bl_apiakey 77#endif 78 79 /* Setup exception class and syndrome arguments for platform handler */ 80 mov x0, #ERROR_EA_SYNC 81 mrs x1, esr_el3 82 adr x30, el3_exit 83 b delegate_sync_ea 84 852: 86 /* Synchronous exceptions other than the above are assumed to be EA */ 87 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] 88 no_ret report_unhandled_exception 89endfunc enter_lower_el_sync_ea 90 91 92/* 93 * This function handles SErrors from lower ELs. 94 * 95 * Since it's part of exception vector, this function doesn't expect any GP 96 * registers to have been saved. It delegates the handling of the EA to platform 97 * handler, and upon successfully handling the EA, exits EL3; otherwise panics. 98 */ 99func enter_lower_el_async_ea 100 /* 101 * Explicitly save x30 so as to free up a register and to enable 102 * branching 103 */ 104 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] 105 106 /* Save GP registers */ 107 bl save_gp_registers 108 109 /* Save ARMv8.3-PAuth registers and load firmware key */ 110#if CTX_INCLUDE_PAUTH_REGS 111 bl pauth_context_save 112#endif 113#if ENABLE_PAUTH 114 bl pauth_load_bl_apiakey 115#endif 116 117 /* Setup exception class and syndrome arguments for platform handler */ 118 mov x0, #ERROR_EA_ASYNC 119 mrs x1, esr_el3 120 adr x30, el3_exit 121 b delegate_async_ea 122endfunc enter_lower_el_async_ea 123 124 125/* 126 * Prelude for Synchronous External Abort handling. This function assumes that 127 * all GP registers have been saved by the caller. 128 * 129 * x0: EA reason 130 * x1: EA syndrome 131 */ 132func delegate_sync_ea 133#if RAS_EXTENSION 134 /* 135 * Check for Uncontainable error type. If so, route to the platform 136 * fatal error handler rather than the generic EA one. 137 */ 138 ubfx x2, x1, #EABORT_SET_SHIFT, #EABORT_SET_WIDTH 139 cmp x2, #ERROR_STATUS_SET_UC 140 b.ne 1f 141 142 /* Check fault status code */ 143 ubfx x3, x1, #EABORT_DFSC_SHIFT, #EABORT_DFSC_WIDTH 144 cmp x3, #SYNC_EA_FSC 145 b.ne 1f 146 147 no_ret plat_handle_uncontainable_ea 1481: 149#endif 150 151 b ea_proceed 152endfunc delegate_sync_ea 153 154 155/* 156 * Prelude for Asynchronous External Abort handling. This function assumes that 157 * all GP registers have been saved by the caller. 158 * 159 * x0: EA reason 160 * x1: EA syndrome 161 */ 162func delegate_async_ea 163#if RAS_EXTENSION 164 /* 165 * Check for Implementation Defined Syndrome. If so, skip checking 166 * Uncontainable error type from the syndrome as the format is unknown. 167 */ 168 tbnz x1, #SERROR_IDS_BIT, 1f 169 170 /* 171 * Check for Uncontainable error type. If so, route to the platform 172 * fatal error handler rather than the generic EA one. 173 */ 174 ubfx x2, x1, #EABORT_AET_SHIFT, #EABORT_AET_WIDTH 175 cmp x2, #ERROR_STATUS_UET_UC 176 b.ne 1f 177 178 /* Check DFSC for SError type */ 179 ubfx x3, x1, #EABORT_DFSC_SHIFT, #EABORT_DFSC_WIDTH 180 cmp x3, #DFSC_SERROR 181 b.ne 1f 182 183 no_ret plat_handle_uncontainable_ea 1841: 185#endif 186 187 b ea_proceed 188endfunc delegate_async_ea 189 190 191/* 192 * Delegate External Abort handling to platform's EA handler. This function 193 * assumes that all GP registers have been saved by the caller. 194 * 195 * x0: EA reason 196 * x1: EA syndrome 197 */ 198func ea_proceed 199 /* 200 * If the ESR loaded earlier is not zero, we were processing an EA 201 * already, and this is a double fault. 202 */ 203 ldr x5, [sp, #CTX_EL3STATE_OFFSET + CTX_ESR_EL3] 204 cbz x5, 1f 205 no_ret plat_handle_double_fault 206 2071: 208 /* Save EL3 state */ 209 mrs x2, spsr_el3 210 mrs x3, elr_el3 211 stp x2, x3, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3] 212 213 /* 214 * Save ESR as handling might involve lower ELs, and returning back to 215 * EL3 from there would trample the original ESR. 216 */ 217 mrs x4, scr_el3 218 mrs x5, esr_el3 219 stp x4, x5, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3] 220 221 /* 222 * Setup rest of arguments, and call platform External Abort handler. 223 * 224 * x0: EA reason (already in place) 225 * x1: Exception syndrome (already in place). 226 * x2: Cookie (unused for now). 227 * x3: Context pointer. 228 * x4: Flags (security state from SCR for now). 229 */ 230 mov x2, xzr 231 mov x3, sp 232 ubfx x4, x4, #0, #1 233 234 /* Switch to runtime stack */ 235 ldr x5, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP] 236 msr spsel, #0 237 mov sp, x5 238 239 mov x29, x30 240#if ENABLE_ASSERTIONS 241 /* Stash the stack pointer */ 242 mov x28, sp 243#endif 244 bl plat_ea_handler 245 246#if ENABLE_ASSERTIONS 247 /* 248 * Error handling flows might involve long jumps; so upon returning from 249 * the platform error handler, validate that the we've completely 250 * unwound the stack. 251 */ 252 mov x27, sp 253 cmp x28, x27 254 ASM_ASSERT(eq) 255#endif 256 257 /* Make SP point to context */ 258 msr spsel, #1 259 260 /* Restore EL3 state and ESR */ 261 ldp x1, x2, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3] 262 msr spsr_el3, x1 263 msr elr_el3, x2 264 265 /* Restore ESR_EL3 and SCR_EL3 */ 266 ldp x3, x4, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3] 267 msr scr_el3, x3 268 msr esr_el3, x4 269 270#if ENABLE_ASSERTIONS 271 cmp x4, xzr 272 ASM_ASSERT(ne) 273#endif 274 275 /* Clear ESR storage */ 276 str xzr, [sp, #CTX_EL3STATE_OFFSET + CTX_ESR_EL3] 277 278 ret x29 279endfunc ea_proceed 280