xref: /rk3399_ARM-atf/bl31/aarch64/ea_delegate.S (revision df8f3188d7b318b3b486f0ec4016b2ad271c85a7)
1*df8f3188SJeenu Viswambharan/*
2*df8f3188SJeenu Viswambharan * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3*df8f3188SJeenu Viswambharan *
4*df8f3188SJeenu Viswambharan * SPDX-License-Identifier: BSD-3-Clause
5*df8f3188SJeenu Viswambharan */
6*df8f3188SJeenu Viswambharan
7*df8f3188SJeenu Viswambharan
8*df8f3188SJeenu Viswambharan#include <asm_macros.S>
9*df8f3188SJeenu Viswambharan#include <context.h>
10*df8f3188SJeenu Viswambharan#include <ea_handle.h>
11*df8f3188SJeenu Viswambharan
12*df8f3188SJeenu Viswambharan
13*df8f3188SJeenu Viswambharan	.globl	handle_lower_el_ea_esb
14*df8f3188SJeenu Viswambharan	.globl	enter_lower_el_sync_ea
15*df8f3188SJeenu Viswambharan	.globl	enter_lower_el_async_ea
16*df8f3188SJeenu Viswambharan
17*df8f3188SJeenu Viswambharan
18*df8f3188SJeenu Viswambharan/*
19*df8f3188SJeenu Viswambharan * Function to delegate External Aborts synchronized by ESB instruction at EL3
20*df8f3188SJeenu Viswambharan * vector entry. This function assumes GP registers x0-x29 have been saved, and
21*df8f3188SJeenu Viswambharan * are available for use. It delegates the handling of the EA to platform
22*df8f3188SJeenu Viswambharan * handler, and returns only upon successfully handling the EA; otherwise
23*df8f3188SJeenu Viswambharan * panics. On return from this function, the original exception handler is
24*df8f3188SJeenu Viswambharan * expected to resume.
25*df8f3188SJeenu Viswambharan */
26*df8f3188SJeenu Viswambharanfunc handle_lower_el_ea_esb
27*df8f3188SJeenu Viswambharan	mov	x0, #ERROR_EA_ESB
28*df8f3188SJeenu Viswambharan	mrs	x1, DISR_EL1
29*df8f3188SJeenu Viswambharan	b	ea_proceed
30*df8f3188SJeenu Viswambharanendfunc handle_lower_el_ea_esb
31*df8f3188SJeenu Viswambharan
32*df8f3188SJeenu Viswambharan
33*df8f3188SJeenu Viswambharan/*
34*df8f3188SJeenu Viswambharan * This function forms the tail end of Synchronous Exception entry from lower
35*df8f3188SJeenu Viswambharan * EL, and expects to handle only Synchronous External Aborts from lower EL. If
36*df8f3188SJeenu Viswambharan * any other kind of exception is detected, then this function reports unhandled
37*df8f3188SJeenu Viswambharan * exception.
38*df8f3188SJeenu Viswambharan *
39*df8f3188SJeenu Viswambharan * Since it's part of exception vector, this function doesn't expect any GP
40*df8f3188SJeenu Viswambharan * registers to have been saved. It delegates the handling of the EA to platform
41*df8f3188SJeenu Viswambharan * handler, and upon successfully handling the EA, exits EL3; otherwise panics.
42*df8f3188SJeenu Viswambharan */
43*df8f3188SJeenu Viswambharanfunc enter_lower_el_sync_ea
44*df8f3188SJeenu Viswambharan	/*
45*df8f3188SJeenu Viswambharan	 * Explicitly save x30 so as to free up a register and to enable
46*df8f3188SJeenu Viswambharan	 * branching.
47*df8f3188SJeenu Viswambharan	 */
48*df8f3188SJeenu Viswambharan	str	x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
49*df8f3188SJeenu Viswambharan
50*df8f3188SJeenu Viswambharan	mrs	x30, esr_el3
51*df8f3188SJeenu Viswambharan	ubfx	x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH
52*df8f3188SJeenu Viswambharan
53*df8f3188SJeenu Viswambharan	/* Check for I/D aborts from lower EL */
54*df8f3188SJeenu Viswambharan	cmp	x30, #EC_IABORT_LOWER_EL
55*df8f3188SJeenu Viswambharan	b.eq	1f
56*df8f3188SJeenu Viswambharan
57*df8f3188SJeenu Viswambharan	cmp	x30, #EC_DABORT_LOWER_EL
58*df8f3188SJeenu Viswambharan	b.ne	2f
59*df8f3188SJeenu Viswambharan
60*df8f3188SJeenu Viswambharan1:
61*df8f3188SJeenu Viswambharan	/* Test for EA bit in the instruction syndrome */
62*df8f3188SJeenu Viswambharan	mrs	x30, esr_el3
63*df8f3188SJeenu Viswambharan	tbz	x30, #ESR_ISS_EABORT_EA_BIT, 2f
64*df8f3188SJeenu Viswambharan
65*df8f3188SJeenu Viswambharan	/* Save GP registers */
66*df8f3188SJeenu Viswambharan	bl	save_gp_registers
67*df8f3188SJeenu Viswambharan
68*df8f3188SJeenu Viswambharan	/* Setup exception class and syndrome arguments for platform handler */
69*df8f3188SJeenu Viswambharan	mov	x0, #ERROR_EA_SYNC
70*df8f3188SJeenu Viswambharan	mrs	x1, esr_el3
71*df8f3188SJeenu Viswambharan	adr	x30, el3_exit
72*df8f3188SJeenu Viswambharan	b	ea_proceed
73*df8f3188SJeenu Viswambharan
74*df8f3188SJeenu Viswambharan2:
75*df8f3188SJeenu Viswambharan	/* Synchronous exceptions other than the above are assumed to be EA */
76*df8f3188SJeenu Viswambharan	ldr	x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
77*df8f3188SJeenu Viswambharan	no_ret	report_unhandled_exception
78*df8f3188SJeenu Viswambharanendfunc enter_lower_el_sync_ea
79*df8f3188SJeenu Viswambharan
80*df8f3188SJeenu Viswambharan
81*df8f3188SJeenu Viswambharan/*
82*df8f3188SJeenu Viswambharan * This function handles SErrors from lower ELs.
83*df8f3188SJeenu Viswambharan *
84*df8f3188SJeenu Viswambharan * Since it's part of exception vector, this function doesn't expect any GP
85*df8f3188SJeenu Viswambharan * registers to have been saved. It delegates the handling of the EA to platform
86*df8f3188SJeenu Viswambharan * handler, and upon successfully handling the EA, exits EL3; otherwise panics.
87*df8f3188SJeenu Viswambharan */
88*df8f3188SJeenu Viswambharanfunc enter_lower_el_async_ea
89*df8f3188SJeenu Viswambharan	/*
90*df8f3188SJeenu Viswambharan	 * Explicitly save x30 so as to free up a register and to enable
91*df8f3188SJeenu Viswambharan	 * branching
92*df8f3188SJeenu Viswambharan	 */
93*df8f3188SJeenu Viswambharan	str	x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
94*df8f3188SJeenu Viswambharan
95*df8f3188SJeenu Viswambharan	/* Save GP registers */
96*df8f3188SJeenu Viswambharan	bl	save_gp_registers
97*df8f3188SJeenu Viswambharan
98*df8f3188SJeenu Viswambharan	/* Setup exception class and syndrome arguments for platform handler */
99*df8f3188SJeenu Viswambharan	mov	x0, #ERROR_EA_ASYNC
100*df8f3188SJeenu Viswambharan	mrs	x1, esr_el3
101*df8f3188SJeenu Viswambharan	adr	x30, el3_exit
102*df8f3188SJeenu Viswambharan	b	ea_proceed
103*df8f3188SJeenu Viswambharanendfunc enter_lower_el_async_ea
104*df8f3188SJeenu Viswambharan
105*df8f3188SJeenu Viswambharan
106*df8f3188SJeenu Viswambharan/*
107*df8f3188SJeenu Viswambharan * Delegate External Abort handling to platform's EA handler. This function
108*df8f3188SJeenu Viswambharan * assumes that all GP registers have been saved by the caller.
109*df8f3188SJeenu Viswambharan *
110*df8f3188SJeenu Viswambharan * x0: EA reason
111*df8f3188SJeenu Viswambharan * x1: EA syndrome
112*df8f3188SJeenu Viswambharan */
113*df8f3188SJeenu Viswambharanfunc ea_proceed
114*df8f3188SJeenu Viswambharan	/* Save EL3 state */
115*df8f3188SJeenu Viswambharan	mrs	x2, spsr_el3
116*df8f3188SJeenu Viswambharan	mrs	x3, elr_el3
117*df8f3188SJeenu Viswambharan	stp	x2, x3, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
118*df8f3188SJeenu Viswambharan
119*df8f3188SJeenu Viswambharan	/*
120*df8f3188SJeenu Viswambharan	 * Save ESR as handling might involve lower ELs, and returning back to
121*df8f3188SJeenu Viswambharan	 * EL3 from there would trample the original ESR.
122*df8f3188SJeenu Viswambharan	 */
123*df8f3188SJeenu Viswambharan	mrs	x4, scr_el3
124*df8f3188SJeenu Viswambharan	mrs	x5, esr_el3
125*df8f3188SJeenu Viswambharan	stp	x4, x5, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
126*df8f3188SJeenu Viswambharan
127*df8f3188SJeenu Viswambharan	/*
128*df8f3188SJeenu Viswambharan	 * Setup rest of arguments, and call platform External Abort handler.
129*df8f3188SJeenu Viswambharan	 *
130*df8f3188SJeenu Viswambharan	 * x0: EA reason (already in place)
131*df8f3188SJeenu Viswambharan	 * x1: Exception syndrome (already in place).
132*df8f3188SJeenu Viswambharan	 * x2: Cookie (unused for now).
133*df8f3188SJeenu Viswambharan	 * x3: Context pointer.
134*df8f3188SJeenu Viswambharan	 * x4: Flags (security state from SCR for now).
135*df8f3188SJeenu Viswambharan	 */
136*df8f3188SJeenu Viswambharan	mov	x2, xzr
137*df8f3188SJeenu Viswambharan	mov	x3, sp
138*df8f3188SJeenu Viswambharan	ubfx	x4, x4, #0, #1
139*df8f3188SJeenu Viswambharan
140*df8f3188SJeenu Viswambharan	/* Switch to runtime stack */
141*df8f3188SJeenu Viswambharan	ldr	x5, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP]
142*df8f3188SJeenu Viswambharan	msr	spsel, #0
143*df8f3188SJeenu Viswambharan	mov	sp, x5
144*df8f3188SJeenu Viswambharan
145*df8f3188SJeenu Viswambharan	mov	x29, x30
146*df8f3188SJeenu Viswambharan	bl	plat_ea_handler
147*df8f3188SJeenu Viswambharan	mov	x30, x29
148*df8f3188SJeenu Viswambharan
149*df8f3188SJeenu Viswambharan	/* Make SP point to context */
150*df8f3188SJeenu Viswambharan	msr	spsel, #1
151*df8f3188SJeenu Viswambharan
152*df8f3188SJeenu Viswambharan	/* Restore EL3 state */
153*df8f3188SJeenu Viswambharan	ldp	x1, x2, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
154*df8f3188SJeenu Viswambharan	msr	spsr_el3, x1
155*df8f3188SJeenu Viswambharan	msr	elr_el3, x2
156*df8f3188SJeenu Viswambharan
157*df8f3188SJeenu Viswambharan	/* Restore ESR_EL3 and SCR_EL3 */
158*df8f3188SJeenu Viswambharan	ldp	x3, x4, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
159*df8f3188SJeenu Viswambharan	msr	scr_el3, x3
160*df8f3188SJeenu Viswambharan	msr	esr_el3, x4
161*df8f3188SJeenu Viswambharan
162*df8f3188SJeenu Viswambharan	ret
163*df8f3188SJeenu Viswambharanendfunc ea_proceed
164