xref: /rk3399_ARM-atf/bl31/aarch64/ea_delegate.S (revision b86048c40cb7d9ccd7aeac1681945676a6dc36ff)
1df8f3188SJeenu Viswambharan/*
25283962eSAntonio Nino Diaz * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
3df8f3188SJeenu Viswambharan *
4df8f3188SJeenu Viswambharan * SPDX-License-Identifier: BSD-3-Clause
5df8f3188SJeenu Viswambharan */
6df8f3188SJeenu Viswambharan
7df8f3188SJeenu Viswambharan
8d5a23af5SJeenu Viswambharan#include <assert_macros.S>
9df8f3188SJeenu Viswambharan#include <asm_macros.S>
10ee6ff1bbSJeenu Viswambharan#include <assert_macros.S>
1109d40e0eSAntonio Nino Diaz#include <bl31/ea_handle.h>
12df8f3188SJeenu Viswambharan#include <context.h>
1309d40e0eSAntonio Nino Diaz#include <lib/extensions/ras_arch.h>
14df8f3188SJeenu Viswambharan
15df8f3188SJeenu Viswambharan
16df8f3188SJeenu Viswambharan	.globl	handle_lower_el_ea_esb
17df8f3188SJeenu Viswambharan	.globl	enter_lower_el_sync_ea
18df8f3188SJeenu Viswambharan	.globl	enter_lower_el_async_ea
19df8f3188SJeenu Viswambharan
20df8f3188SJeenu Viswambharan
21df8f3188SJeenu Viswambharan/*
22df8f3188SJeenu Viswambharan * Function to delegate External Aborts synchronized by ESB instruction at EL3
23df8f3188SJeenu Viswambharan * vector entry. This function assumes GP registers x0-x29 have been saved, and
24df8f3188SJeenu Viswambharan * are available for use. It delegates the handling of the EA to platform
25df8f3188SJeenu Viswambharan * handler, and returns only upon successfully handling the EA; otherwise
26df8f3188SJeenu Viswambharan * panics. On return from this function, the original exception handler is
27df8f3188SJeenu Viswambharan * expected to resume.
28df8f3188SJeenu Viswambharan */
29df8f3188SJeenu Viswambharanfunc handle_lower_el_ea_esb
30df8f3188SJeenu Viswambharan	mov	x0, #ERROR_EA_ESB
31df8f3188SJeenu Viswambharan	mrs	x1, DISR_EL1
32df8f3188SJeenu Viswambharan	b	ea_proceed
33df8f3188SJeenu Viswambharanendfunc handle_lower_el_ea_esb
34df8f3188SJeenu Viswambharan
35df8f3188SJeenu Viswambharan
36df8f3188SJeenu Viswambharan/*
37df8f3188SJeenu Viswambharan * This function forms the tail end of Synchronous Exception entry from lower
38df8f3188SJeenu Viswambharan * EL, and expects to handle only Synchronous External Aborts from lower EL. If
39df8f3188SJeenu Viswambharan * any other kind of exception is detected, then this function reports unhandled
40df8f3188SJeenu Viswambharan * exception.
41df8f3188SJeenu Viswambharan *
42df8f3188SJeenu Viswambharan * Since it's part of exception vector, this function doesn't expect any GP
43df8f3188SJeenu Viswambharan * registers to have been saved. It delegates the handling of the EA to platform
44df8f3188SJeenu Viswambharan * handler, and upon successfully handling the EA, exits EL3; otherwise panics.
45df8f3188SJeenu Viswambharan */
46df8f3188SJeenu Viswambharanfunc enter_lower_el_sync_ea
47df8f3188SJeenu Viswambharan	/*
48df8f3188SJeenu Viswambharan	 * Explicitly save x30 so as to free up a register and to enable
49df8f3188SJeenu Viswambharan	 * branching.
50df8f3188SJeenu Viswambharan	 */
51df8f3188SJeenu Viswambharan	str	x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
52df8f3188SJeenu Viswambharan
53df8f3188SJeenu Viswambharan	mrs	x30, esr_el3
54df8f3188SJeenu Viswambharan	ubfx	x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH
55df8f3188SJeenu Viswambharan
56df8f3188SJeenu Viswambharan	/* Check for I/D aborts from lower EL */
57df8f3188SJeenu Viswambharan	cmp	x30, #EC_IABORT_LOWER_EL
58df8f3188SJeenu Viswambharan	b.eq	1f
59df8f3188SJeenu Viswambharan
60df8f3188SJeenu Viswambharan	cmp	x30, #EC_DABORT_LOWER_EL
61df8f3188SJeenu Viswambharan	b.ne	2f
62df8f3188SJeenu Viswambharan
63df8f3188SJeenu Viswambharan1:
64df8f3188SJeenu Viswambharan	/* Test for EA bit in the instruction syndrome */
65df8f3188SJeenu Viswambharan	mrs	x30, esr_el3
66df8f3188SJeenu Viswambharan	tbz	x30, #ESR_ISS_EABORT_EA_BIT, 2f
67df8f3188SJeenu Viswambharan
68df8f3188SJeenu Viswambharan	/* Save GP registers */
69df8f3188SJeenu Viswambharan	bl	save_gp_registers
70df8f3188SJeenu Viswambharan
71*b86048c4SAntonio Nino Diaz	/* Save ARMv8.3-PAuth registers and load firmware key */
725283962eSAntonio Nino Diaz#if CTX_INCLUDE_PAUTH_REGS
735283962eSAntonio Nino Diaz	bl	pauth_context_save
745283962eSAntonio Nino Diaz#endif
75*b86048c4SAntonio Nino Diaz#if ENABLE_PAUTH
76*b86048c4SAntonio Nino Diaz	bl	pauth_load_bl_apiakey
77*b86048c4SAntonio Nino Diaz#endif
785283962eSAntonio Nino Diaz
79df8f3188SJeenu Viswambharan	/* Setup exception class and syndrome arguments for platform handler */
80df8f3188SJeenu Viswambharan	mov	x0, #ERROR_EA_SYNC
81df8f3188SJeenu Viswambharan	mrs	x1, esr_el3
82df8f3188SJeenu Viswambharan	adr	x30, el3_exit
83b56dc2a9SJeenu Viswambharan	b	delegate_sync_ea
84df8f3188SJeenu Viswambharan
85df8f3188SJeenu Viswambharan2:
86df8f3188SJeenu Viswambharan	/* Synchronous exceptions other than the above are assumed to be EA */
87df8f3188SJeenu Viswambharan	ldr	x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
88df8f3188SJeenu Viswambharan	no_ret	report_unhandled_exception
89df8f3188SJeenu Viswambharanendfunc enter_lower_el_sync_ea
90df8f3188SJeenu Viswambharan
91df8f3188SJeenu Viswambharan
92df8f3188SJeenu Viswambharan/*
93df8f3188SJeenu Viswambharan * This function handles SErrors from lower ELs.
94df8f3188SJeenu Viswambharan *
95df8f3188SJeenu Viswambharan * Since it's part of exception vector, this function doesn't expect any GP
96df8f3188SJeenu Viswambharan * registers to have been saved. It delegates the handling of the EA to platform
97df8f3188SJeenu Viswambharan * handler, and upon successfully handling the EA, exits EL3; otherwise panics.
98df8f3188SJeenu Viswambharan */
99df8f3188SJeenu Viswambharanfunc enter_lower_el_async_ea
100df8f3188SJeenu Viswambharan	/*
101df8f3188SJeenu Viswambharan	 * Explicitly save x30 so as to free up a register and to enable
102df8f3188SJeenu Viswambharan	 * branching
103df8f3188SJeenu Viswambharan	 */
104df8f3188SJeenu Viswambharan	str	x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
105df8f3188SJeenu Viswambharan
106df8f3188SJeenu Viswambharan	/* Save GP registers */
107df8f3188SJeenu Viswambharan	bl	save_gp_registers
108df8f3188SJeenu Viswambharan
109*b86048c4SAntonio Nino Diaz	/* Save ARMv8.3-PAuth registers and load firmware key */
1105283962eSAntonio Nino Diaz#if CTX_INCLUDE_PAUTH_REGS
1115283962eSAntonio Nino Diaz	bl	pauth_context_save
1125283962eSAntonio Nino Diaz#endif
113*b86048c4SAntonio Nino Diaz#if ENABLE_PAUTH
114*b86048c4SAntonio Nino Diaz	bl	pauth_load_bl_apiakey
115*b86048c4SAntonio Nino Diaz#endif
1165283962eSAntonio Nino Diaz
117df8f3188SJeenu Viswambharan	/* Setup exception class and syndrome arguments for platform handler */
118df8f3188SJeenu Viswambharan	mov	x0, #ERROR_EA_ASYNC
119df8f3188SJeenu Viswambharan	mrs	x1, esr_el3
120df8f3188SJeenu Viswambharan	adr	x30, el3_exit
121b56dc2a9SJeenu Viswambharan	b	delegate_async_ea
122df8f3188SJeenu Viswambharanendfunc enter_lower_el_async_ea
123df8f3188SJeenu Viswambharan
124df8f3188SJeenu Viswambharan
125df8f3188SJeenu Viswambharan/*
126b56dc2a9SJeenu Viswambharan * Prelude for Synchronous External Abort handling. This function assumes that
127b56dc2a9SJeenu Viswambharan * all GP registers have been saved by the caller.
128b56dc2a9SJeenu Viswambharan *
129b56dc2a9SJeenu Viswambharan * x0: EA reason
130b56dc2a9SJeenu Viswambharan * x1: EA syndrome
131b56dc2a9SJeenu Viswambharan */
132b56dc2a9SJeenu Viswambharanfunc delegate_sync_ea
133b56dc2a9SJeenu Viswambharan#if RAS_EXTENSION
134b56dc2a9SJeenu Viswambharan	/*
135b56dc2a9SJeenu Viswambharan	 * Check for Uncontainable error type. If so, route to the platform
136b56dc2a9SJeenu Viswambharan	 * fatal error handler rather than the generic EA one.
137b56dc2a9SJeenu Viswambharan	 */
138b56dc2a9SJeenu Viswambharan	ubfx    x2, x1, #EABORT_SET_SHIFT, #EABORT_SET_WIDTH
139b56dc2a9SJeenu Viswambharan	cmp     x2, #ERROR_STATUS_SET_UC
140b56dc2a9SJeenu Viswambharan	b.ne    1f
141b56dc2a9SJeenu Viswambharan
142b56dc2a9SJeenu Viswambharan	/* Check fault status code */
143b56dc2a9SJeenu Viswambharan	ubfx    x3, x1, #EABORT_DFSC_SHIFT, #EABORT_DFSC_WIDTH
144b56dc2a9SJeenu Viswambharan	cmp     x3, #SYNC_EA_FSC
145b56dc2a9SJeenu Viswambharan	b.ne    1f
146b56dc2a9SJeenu Viswambharan
147b56dc2a9SJeenu Viswambharan	no_ret  plat_handle_uncontainable_ea
148b56dc2a9SJeenu Viswambharan1:
149b56dc2a9SJeenu Viswambharan#endif
150b56dc2a9SJeenu Viswambharan
151b56dc2a9SJeenu Viswambharan	b       ea_proceed
152b56dc2a9SJeenu Viswambharanendfunc delegate_sync_ea
153b56dc2a9SJeenu Viswambharan
154b56dc2a9SJeenu Viswambharan
155b56dc2a9SJeenu Viswambharan/*
156b56dc2a9SJeenu Viswambharan * Prelude for Asynchronous External Abort handling. This function assumes that
157b56dc2a9SJeenu Viswambharan * all GP registers have been saved by the caller.
158b56dc2a9SJeenu Viswambharan *
159b56dc2a9SJeenu Viswambharan * x0: EA reason
160b56dc2a9SJeenu Viswambharan * x1: EA syndrome
161b56dc2a9SJeenu Viswambharan */
162b56dc2a9SJeenu Viswambharanfunc delegate_async_ea
163b56dc2a9SJeenu Viswambharan#if RAS_EXTENSION
164b56dc2a9SJeenu Viswambharan	/*
165b56dc2a9SJeenu Viswambharan	 * Check for Implementation Defined Syndrome. If so, skip checking
166b56dc2a9SJeenu Viswambharan	 * Uncontainable error type from the syndrome as the format is unknown.
167b56dc2a9SJeenu Viswambharan	 */
168b56dc2a9SJeenu Viswambharan	tbnz	x1, #SERROR_IDS_BIT, 1f
169b56dc2a9SJeenu Viswambharan
170b56dc2a9SJeenu Viswambharan	/*
171b56dc2a9SJeenu Viswambharan	 * Check for Uncontainable error type. If so, route to the platform
172b56dc2a9SJeenu Viswambharan	 * fatal error handler rather than the generic EA one.
173b56dc2a9SJeenu Viswambharan	 */
174b56dc2a9SJeenu Viswambharan	ubfx	x2, x1, #EABORT_AET_SHIFT, #EABORT_AET_WIDTH
175b56dc2a9SJeenu Viswambharan	cmp	x2, #ERROR_STATUS_UET_UC
176b56dc2a9SJeenu Viswambharan	b.ne	1f
177b56dc2a9SJeenu Viswambharan
178b56dc2a9SJeenu Viswambharan	/* Check DFSC for SError type */
179b56dc2a9SJeenu Viswambharan	ubfx	x3, x1, #EABORT_DFSC_SHIFT, #EABORT_DFSC_WIDTH
180b56dc2a9SJeenu Viswambharan	cmp	x3, #DFSC_SERROR
181b56dc2a9SJeenu Viswambharan	b.ne	1f
182b56dc2a9SJeenu Viswambharan
183b56dc2a9SJeenu Viswambharan	no_ret	plat_handle_uncontainable_ea
184b56dc2a9SJeenu Viswambharan1:
185b56dc2a9SJeenu Viswambharan#endif
186b56dc2a9SJeenu Viswambharan
187b56dc2a9SJeenu Viswambharan	b	ea_proceed
188b56dc2a9SJeenu Viswambharanendfunc delegate_async_ea
189b56dc2a9SJeenu Viswambharan
190b56dc2a9SJeenu Viswambharan
191b56dc2a9SJeenu Viswambharan/*
192df8f3188SJeenu Viswambharan * Delegate External Abort handling to platform's EA handler. This function
193df8f3188SJeenu Viswambharan * assumes that all GP registers have been saved by the caller.
194df8f3188SJeenu Viswambharan *
195df8f3188SJeenu Viswambharan * x0: EA reason
196df8f3188SJeenu Viswambharan * x1: EA syndrome
197df8f3188SJeenu Viswambharan */
198df8f3188SJeenu Viswambharanfunc ea_proceed
199d5a23af5SJeenu Viswambharan	/*
200d5a23af5SJeenu Viswambharan	 * If the ESR loaded earlier is not zero, we were processing an EA
201d5a23af5SJeenu Viswambharan	 * already, and this is a double fault.
202d5a23af5SJeenu Viswambharan	 */
203d5a23af5SJeenu Viswambharan	ldr	x5, [sp, #CTX_EL3STATE_OFFSET + CTX_ESR_EL3]
204d5a23af5SJeenu Viswambharan	cbz	x5, 1f
205d5a23af5SJeenu Viswambharan	no_ret	plat_handle_double_fault
206d5a23af5SJeenu Viswambharan
207d5a23af5SJeenu Viswambharan1:
208df8f3188SJeenu Viswambharan	/* Save EL3 state */
209df8f3188SJeenu Viswambharan	mrs	x2, spsr_el3
210df8f3188SJeenu Viswambharan	mrs	x3, elr_el3
211df8f3188SJeenu Viswambharan	stp	x2, x3, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
212df8f3188SJeenu Viswambharan
213df8f3188SJeenu Viswambharan	/*
214df8f3188SJeenu Viswambharan	 * Save ESR as handling might involve lower ELs, and returning back to
215df8f3188SJeenu Viswambharan	 * EL3 from there would trample the original ESR.
216df8f3188SJeenu Viswambharan	 */
217df8f3188SJeenu Viswambharan	mrs	x4, scr_el3
218df8f3188SJeenu Viswambharan	mrs	x5, esr_el3
219df8f3188SJeenu Viswambharan	stp	x4, x5, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
220df8f3188SJeenu Viswambharan
221df8f3188SJeenu Viswambharan	/*
222df8f3188SJeenu Viswambharan	 * Setup rest of arguments, and call platform External Abort handler.
223df8f3188SJeenu Viswambharan	 *
224df8f3188SJeenu Viswambharan	 * x0: EA reason (already in place)
225df8f3188SJeenu Viswambharan	 * x1: Exception syndrome (already in place).
226df8f3188SJeenu Viswambharan	 * x2: Cookie (unused for now).
227df8f3188SJeenu Viswambharan	 * x3: Context pointer.
228df8f3188SJeenu Viswambharan	 * x4: Flags (security state from SCR for now).
229df8f3188SJeenu Viswambharan	 */
230df8f3188SJeenu Viswambharan	mov	x2, xzr
231df8f3188SJeenu Viswambharan	mov	x3, sp
232df8f3188SJeenu Viswambharan	ubfx	x4, x4, #0, #1
233df8f3188SJeenu Viswambharan
234df8f3188SJeenu Viswambharan	/* Switch to runtime stack */
235df8f3188SJeenu Viswambharan	ldr	x5, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP]
236df8f3188SJeenu Viswambharan	msr	spsel, #0
237df8f3188SJeenu Viswambharan	mov	sp, x5
238df8f3188SJeenu Viswambharan
239df8f3188SJeenu Viswambharan	mov	x29, x30
240ee6ff1bbSJeenu Viswambharan#if ENABLE_ASSERTIONS
241ee6ff1bbSJeenu Viswambharan	/* Stash the stack pointer */
242ee6ff1bbSJeenu Viswambharan	mov	x28, sp
243ee6ff1bbSJeenu Viswambharan#endif
244df8f3188SJeenu Viswambharan	bl	plat_ea_handler
245df8f3188SJeenu Viswambharan
246ee6ff1bbSJeenu Viswambharan#if ENABLE_ASSERTIONS
247ee6ff1bbSJeenu Viswambharan	/*
248ee6ff1bbSJeenu Viswambharan	 * Error handling flows might involve long jumps; so upon returning from
249ee6ff1bbSJeenu Viswambharan	 * the platform error handler, validate that the we've completely
250ee6ff1bbSJeenu Viswambharan	 * unwound the stack.
251ee6ff1bbSJeenu Viswambharan	 */
252ee6ff1bbSJeenu Viswambharan	mov	x27, sp
253ee6ff1bbSJeenu Viswambharan	cmp	x28, x27
254ee6ff1bbSJeenu Viswambharan	ASM_ASSERT(eq)
255ee6ff1bbSJeenu Viswambharan#endif
256ee6ff1bbSJeenu Viswambharan
257df8f3188SJeenu Viswambharan	/* Make SP point to context */
258df8f3188SJeenu Viswambharan	msr	spsel, #1
259df8f3188SJeenu Viswambharan
260d5a23af5SJeenu Viswambharan	/* Restore EL3 state and ESR */
261df8f3188SJeenu Viswambharan	ldp	x1, x2, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
262df8f3188SJeenu Viswambharan	msr	spsr_el3, x1
263df8f3188SJeenu Viswambharan	msr	elr_el3, x2
264df8f3188SJeenu Viswambharan
265df8f3188SJeenu Viswambharan	/* Restore ESR_EL3 and SCR_EL3 */
266df8f3188SJeenu Viswambharan	ldp	x3, x4, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
267df8f3188SJeenu Viswambharan	msr	scr_el3, x3
268df8f3188SJeenu Viswambharan	msr	esr_el3, x4
269df8f3188SJeenu Viswambharan
270d5a23af5SJeenu Viswambharan#if ENABLE_ASSERTIONS
271d5a23af5SJeenu Viswambharan	cmp	x4, xzr
272d5a23af5SJeenu Viswambharan	ASM_ASSERT(ne)
273d5a23af5SJeenu Viswambharan#endif
274d5a23af5SJeenu Viswambharan
275d5a23af5SJeenu Viswambharan	/* Clear ESR storage */
276d5a23af5SJeenu Viswambharan	str	xzr, [sp, #CTX_EL3STATE_OFFSET + CTX_ESR_EL3]
277d5a23af5SJeenu Viswambharan
278d5a23af5SJeenu Viswambharan	ret	x29
279df8f3188SJeenu Viswambharanendfunc ea_proceed
280