1/* 2 * Copyright (c) 2013, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <bl1.h> 32#include <bl_common.h> 33#include <platform.h> 34#include <arch.h> 35 36 37 .globl bl31_entrypoint 38 39 40 .section .text, "ax"; .align 3 41 42 /* ----------------------------------------------------- 43 * bl31_entrypoint() is the cold boot entrypoint, 44 * executed only by the primary cpu. 45 * ----------------------------------------------------- 46 */ 47 48bl31_entrypoint:; .type bl31_entrypoint, %function 49 /* --------------------------------------------- 50 * BL2 has populated x0,x3,x4 with the opcode 51 * indicating BL31 should be run, memory layout 52 * of the trusted SRAM available to BL31 and 53 * information about running the non-trusted 54 * software already loaded by BL2. 55 * --------------------------------------------- 56 */ 57 58 /* --------------------------------------------- 59 * Set the exception vector to something sane. 60 * --------------------------------------------- 61 */ 62 adr x1, runtime_exceptions 63 msr vbar_el3, x1 64 65 /* --------------------------------------------- 66 * Enable the instruction cache. 67 * --------------------------------------------- 68 */ 69 mrs x1, sctlr_el3 70 orr x1, x1, #SCTLR_I_BIT 71 msr sctlr_el3, x1 72 73 isb 74 75 /* --------------------------------------------- 76 * Check the opcodes out of paranoia. 77 * --------------------------------------------- 78 */ 79 mov x19, #RUN_IMAGE 80 cmp x0, x19 81 b.ne _panic 82 mov x20, x3 83 mov x21, x4 84 85 /* --------------------------------------------- 86 * This is BL31 which is expected to be executed 87 * only by the primary cpu (at least for now). 88 * So, make sure no secondary has lost its way. 89 * --------------------------------------------- 90 */ 91 bl read_mpidr 92 mov x19, x0 93 bl platform_is_primary_cpu 94 cbz x0, _panic 95 96 /* --------------------------------------------- 97 * Zero out NOBITS sections. There are 2 of them: 98 * - the .bss section; 99 * - the coherent memory section. 100 * --------------------------------------------- 101 */ 102 ldr x0, =__BSS_START__ 103 ldr x1, =__BSS_SIZE__ 104 bl zeromem16 105 106 ldr x0, =__COHERENT_RAM_START__ 107 ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__ 108 bl zeromem16 109 110 /* -------------------------------------------- 111 * Give ourselves a small coherent stack to 112 * ease the pain of initializing the MMU 113 * -------------------------------------------- 114 */ 115 mov x0, x19 116 bl platform_set_coherent_stack 117 118 /* --------------------------------------------- 119 * Perform platform specific early arch. setup 120 * --------------------------------------------- 121 */ 122 mov x0, x20 123 mov x1, x21 124 mov x2, x19 125 bl bl31_early_platform_setup 126 bl bl31_plat_arch_setup 127 128 /* --------------------------------------------- 129 * Give ourselves a stack allocated in Normal 130 * -IS-WBWA memory 131 * --------------------------------------------- 132 */ 133 mov x0, x19 134 bl platform_set_stack 135 136 /* --------------------------------------------- 137 * Use SP_EL0 to initialize BL31. It allows us 138 * to jump to the next image without having to 139 * come back here to ensure all of the stack's 140 * been popped out. run_image() is not nice 141 * enough to reset the stack pointer before 142 * handing control to the next stage. 143 * --------------------------------------------- 144 */ 145 mov x0, sp 146 msr sp_el0, x0 147 msr spsel, #0 148 isb 149 150 /* --------------------------------------------- 151 * Jump to main function. 152 * --------------------------------------------- 153 */ 154 bl bl31_main 155 156_panic: 157 b _panic 158