xref: /rk3399_ARM-atf/bl2/bl2_main.c (revision 35e98e5588d09145f7d0d4d98624f6b75321a187)
1 /*
2  * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <stdio.h>
32 #include <string.h>
33 #include <assert.h>
34 #include <arch_helpers.h>
35 #include <console.h>
36 #include <platform.h>
37 #include <semihosting.h>
38 #include <bl_common.h>
39 #include <bl2.h>
40 #include <debug.h>
41 
42 /*******************************************************************************
43  * The only thing to do in BL2 is to load further images and pass control to
44  * BL31. The memory occupied by BL2 will be reclaimed by BL3_x stages. BL2 runs
45  * entirely in S-EL1. Since arm standard c libraries are not PIC, printf et al
46  * are not available. We rely on assertions to signal error conditions
47  ******************************************************************************/
48 void bl2_main(void)
49 {
50 	meminfo *bl2_tzram_layout;
51 	bl31_args *bl2_to_bl31_args;
52 	unsigned long bl31_base, bl32_base = 0, bl33_base, el_status;
53 	unsigned int bl2_load, bl31_load, mode;
54 
55 	/* Perform remaining generic architectural setup in S-El1 */
56 	bl2_arch_setup();
57 
58 	/* Perform platform setup in BL1 */
59 	bl2_platform_setup();
60 
61 	printf("BL2 %s\n\r", build_message);
62 
63 	/* Find out how much free trusted ram remains after BL2 load */
64 	bl2_tzram_layout = bl2_plat_sec_mem_layout();
65 
66 	/*
67 	 * Load BL31. BL1 tells BL2 whether it has been TOP or BOTTOM loaded.
68 	 * To avoid fragmentation of trusted SRAM memory, BL31 is always
69 	 * loaded opposite to BL2. This allows BL31 to reclaim BL2 memory
70 	 * while maintaining its free space in one contiguous chunk.
71 	 */
72 	bl2_load = bl2_tzram_layout->attr & LOAD_MASK;
73 	assert((bl2_load == TOP_LOAD) || (bl2_load == BOT_LOAD));
74 	bl31_load = (bl2_load == TOP_LOAD) ? BOT_LOAD : TOP_LOAD;
75 	bl31_base = load_image(bl2_tzram_layout, BL31_IMAGE_NAME,
76 	                       bl31_load, BL31_BASE);
77 
78 	/* Assert if it has not been possible to load BL31 */
79 	if (bl31_base == 0) {
80 		ERROR("Failed to load BL3-1.\n");
81 		panic();
82 	}
83 
84 	/*
85 	 * Get a pointer to the memory the platform has set aside to pass
86 	 * information to BL31.
87 	 */
88 	bl2_to_bl31_args = bl2_get_bl31_args_ptr();
89 
90 	/*
91 	 * Load the BL32 image if there's one. It is upto to platform
92 	 * to specify where BL32 should be loaded if it exists. It
93 	 * could create space in the secure sram or point to a
94 	 * completely different memory. A zero size indicates that the
95 	 * platform does not want to load a BL32 image.
96 	 */
97 	if (bl2_to_bl31_args->bl32_meminfo.total_size)
98 		bl32_base = load_image(&bl2_to_bl31_args->bl32_meminfo,
99 				       BL32_IMAGE_NAME,
100 				       bl2_to_bl31_args->bl32_meminfo.attr &
101 				       LOAD_MASK,
102 				       BL32_BASE);
103 
104 	/*
105 	 * Create a new layout of memory for BL31 as seen by BL2. This
106 	 * will gobble up all the BL2 memory.
107 	 */
108 	init_bl31_mem_layout(bl2_tzram_layout,
109 			     &bl2_to_bl31_args->bl31_meminfo,
110 			     bl31_load);
111 
112 	/* Load the BL33 image in non-secure memory provided by the platform */
113 	bl33_base = load_image(&bl2_to_bl31_args->bl33_meminfo,
114 			       BL33_IMAGE_NAME,
115 			       BOT_LOAD,
116 			       plat_get_ns_image_entrypoint());
117 	/* Halt if failed to load normal world firmware. */
118 	if (bl33_base == 0) {
119 		ERROR("Failed to load BL3-3.\n");
120 		panic();
121 	}
122 
123 	/*
124 	 * BL2 also needs to tell BL31 where the non-trusted software image
125 	 * is located.
126 	 */
127 	bl2_to_bl31_args->bl33_image_info.entrypoint = bl33_base;
128 
129 	/* Figure out what mode we enter the non-secure world in */
130 	el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
131 	el_status &= ID_AA64PFR0_ELX_MASK;
132 
133 	if (el_status)
134 		mode = MODE_EL2;
135 	else
136 		mode = MODE_EL1;
137 
138 	/*
139 	 * TODO: Consider the possibility of specifying the SPSR in
140 	 * the FIP ToC and allowing the platform to have a say as
141 	 * well.
142 	 */
143 	bl2_to_bl31_args->bl33_image_info.spsr =
144 		make_spsr(mode, MODE_SP_ELX, MODE_RW_64);
145 	bl2_to_bl31_args->bl33_image_info.security_state = NON_SECURE;
146 
147 	if (bl32_base) {
148 		/* Fill BL32 image info */
149 		bl2_to_bl31_args->bl32_image_info.entrypoint = bl32_base;
150 		bl2_to_bl31_args->bl32_image_info.security_state = SECURE;
151 
152 		/*
153 		 * The Secure Payload Dispatcher service is responsible for
154 		 * setting the SPSR prior to entry into the BL32 image.
155 		 */
156 		bl2_to_bl31_args->bl32_image_info.spsr = 0;
157 	}
158 
159 	/* Flush the entire BL31 args buffer */
160 	flush_dcache_range((unsigned long) bl2_to_bl31_args,
161 			   sizeof(*bl2_to_bl31_args));
162 
163 	/*
164 	 * Run BL31 via an SMC to BL1. Information on how to pass control to
165 	 * the BL32 (if present) and BL33 software images will be passed to
166 	 * BL31 as an argument.
167 	 */
168 	run_image(bl31_base,
169 		  make_spsr(MODE_EL3, MODE_SP_ELX, MODE_RW_64),
170 		  SECURE,
171 		  (void *) bl2_to_bl31_args,
172 		  NULL);
173 }
174