14f6ad66aSAchin Gupta /* 242019bf4SYatharth Kochar * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 34f6ad66aSAchin Gupta * 44f6ad66aSAchin Gupta * Redistribution and use in source and binary forms, with or without 54f6ad66aSAchin Gupta * modification, are permitted provided that the following conditions are met: 64f6ad66aSAchin Gupta * 74f6ad66aSAchin Gupta * Redistributions of source code must retain the above copyright notice, this 84f6ad66aSAchin Gupta * list of conditions and the following disclaimer. 94f6ad66aSAchin Gupta * 104f6ad66aSAchin Gupta * Redistributions in binary form must reproduce the above copyright notice, 114f6ad66aSAchin Gupta * this list of conditions and the following disclaimer in the documentation 124f6ad66aSAchin Gupta * and/or other materials provided with the distribution. 134f6ad66aSAchin Gupta * 144f6ad66aSAchin Gupta * Neither the name of ARM nor the names of its contributors may be used 154f6ad66aSAchin Gupta * to endorse or promote products derived from this software without specific 164f6ad66aSAchin Gupta * prior written permission. 174f6ad66aSAchin Gupta * 184f6ad66aSAchin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 194f6ad66aSAchin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 204f6ad66aSAchin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 214f6ad66aSAchin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 224f6ad66aSAchin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 234f6ad66aSAchin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 244f6ad66aSAchin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 254f6ad66aSAchin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 264f6ad66aSAchin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 274f6ad66aSAchin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 284f6ad66aSAchin Gupta * POSSIBILITY OF SUCH DAMAGE. 294f6ad66aSAchin Gupta */ 304f6ad66aSAchin Gupta 314f6ad66aSAchin Gupta #include <arch_helpers.h> 321779ba6bSJuan Castillo #include <auth_mod.h> 3348bfb88eSYatharth Kochar #include <bl1.h> 344f6ad66aSAchin Gupta #include <bl_common.h> 3535e98e55SDan Handley #include <debug.h> 3697043ac9SDan Handley #include <platform.h> 375b827a8fSDan Handley #include "bl2_private.h" 384f6ad66aSAchin Gupta 3993d81d64SSandrine Bailleux 4093d81d64SSandrine Bailleux /******************************************************************************* 4193d81d64SSandrine Bailleux * The only thing to do in BL2 is to load further images and pass control to 4242019bf4SYatharth Kochar * next BL. The memory occupied by BL2 will be reclaimed by BL3x stages. BL2 4342019bf4SYatharth Kochar * runs entirely in S-EL1. 4493d81d64SSandrine Bailleux ******************************************************************************/ 4593d81d64SSandrine Bailleux void bl2_main(void) 4693d81d64SSandrine Bailleux { 4742019bf4SYatharth Kochar entry_point_info_t *next_bl_ep_info; 4893d81d64SSandrine Bailleux 496ad2e461SDan Handley NOTICE("BL2: %s\n", version_string); 506ad2e461SDan Handley NOTICE("BL2: %s\n", build_message); 516ad2e461SDan Handley 5293d81d64SSandrine Bailleux /* Perform remaining generic architectural setup in S-EL1 */ 5393d81d64SSandrine Bailleux bl2_arch_setup(); 5493d81d64SSandrine Bailleux 55dec840afSJuan Castillo #if TRUSTED_BOARD_BOOT 56dec840afSJuan Castillo /* Initialize authentication module */ 571779ba6bSJuan Castillo auth_mod_init(); 58dec840afSJuan Castillo #endif /* TRUSTED_BOARD_BOOT */ 59dec840afSJuan Castillo 6042019bf4SYatharth Kochar /* Load the subsequent bootloader images. */ 6142019bf4SYatharth Kochar next_bl_ep_info = bl2_load_images(); 62ef538c6fSJuan Castillo 63*d48c12e9SYatharth Kochar #ifdef AARCH32 64*d48c12e9SYatharth Kochar /* 65*d48c12e9SYatharth Kochar * For AArch32 state BL1 and BL2 share the MMU setup. 66*d48c12e9SYatharth Kochar * Given that BL2 does not map BL1 regions, MMU needs 67*d48c12e9SYatharth Kochar * to be disabled in order to go back to BL1. 68*d48c12e9SYatharth Kochar */ 69*d48c12e9SYatharth Kochar disable_mmu_icache_secure(); 70*d48c12e9SYatharth Kochar #endif /* AARCH32 */ 71*d48c12e9SYatharth Kochar 7293d81d64SSandrine Bailleux /* 7342019bf4SYatharth Kochar * Run next BL image via an SMC to BL1. Information on how to pass 7442019bf4SYatharth Kochar * control to the BL32 (if present) and BL33 software images will 7542019bf4SYatharth Kochar * be passed to next BL image as an argument. 7693d81d64SSandrine Bailleux */ 7742019bf4SYatharth Kochar smc(BL1_SMC_RUN_IMAGE, (unsigned long)next_bl_ep_info, 0, 0, 0, 0, 0, 0); 784f6ad66aSAchin Gupta } 79