xref: /rk3399_ARM-atf/bl2/bl2_main.c (revision a3050ed521ec1fd6d34d7d8ba5105ac8bc024992)
14f6ad66aSAchin Gupta /*
2e83b0cadSDan Handley  * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
34f6ad66aSAchin Gupta  *
44f6ad66aSAchin Gupta  * Redistribution and use in source and binary forms, with or without
54f6ad66aSAchin Gupta  * modification, are permitted provided that the following conditions are met:
64f6ad66aSAchin Gupta  *
74f6ad66aSAchin Gupta  * Redistributions of source code must retain the above copyright notice, this
84f6ad66aSAchin Gupta  * list of conditions and the following disclaimer.
94f6ad66aSAchin Gupta  *
104f6ad66aSAchin Gupta  * Redistributions in binary form must reproduce the above copyright notice,
114f6ad66aSAchin Gupta  * this list of conditions and the following disclaimer in the documentation
124f6ad66aSAchin Gupta  * and/or other materials provided with the distribution.
134f6ad66aSAchin Gupta  *
144f6ad66aSAchin Gupta  * Neither the name of ARM nor the names of its contributors may be used
154f6ad66aSAchin Gupta  * to endorse or promote products derived from this software without specific
164f6ad66aSAchin Gupta  * prior written permission.
174f6ad66aSAchin Gupta  *
184f6ad66aSAchin Gupta  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
194f6ad66aSAchin Gupta  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
204f6ad66aSAchin Gupta  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
214f6ad66aSAchin Gupta  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
224f6ad66aSAchin Gupta  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
234f6ad66aSAchin Gupta  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
244f6ad66aSAchin Gupta  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
254f6ad66aSAchin Gupta  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
264f6ad66aSAchin Gupta  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
274f6ad66aSAchin Gupta  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
284f6ad66aSAchin Gupta  * POSSIBILITY OF SUCH DAMAGE.
294f6ad66aSAchin Gupta  */
304f6ad66aSAchin Gupta 
314f6ad66aSAchin Gupta #include <stdio.h>
324f6ad66aSAchin Gupta #include <string.h>
334f6ad66aSAchin Gupta #include <assert.h>
344f6ad66aSAchin Gupta #include <arch_helpers.h>
354f6ad66aSAchin Gupta #include <console.h>
364f6ad66aSAchin Gupta #include <platform.h>
374f6ad66aSAchin Gupta #include <semihosting.h>
384f6ad66aSAchin Gupta #include <bl_common.h>
394f6ad66aSAchin Gupta #include <bl2.h>
40561cd33eSHarry Liebel #include "debug.h"
414f6ad66aSAchin Gupta 
424f6ad66aSAchin Gupta /*******************************************************************************
434f6ad66aSAchin Gupta  * The only thing to do in BL2 is to load further images and pass control to
444f6ad66aSAchin Gupta  * BL31. The memory occupied by BL2 will be reclaimed by BL3_x stages. BL2 runs
454f6ad66aSAchin Gupta  * entirely in S-EL1. Since arm standard c libraries are not PIC, printf et al
464f6ad66aSAchin Gupta  * are not available. We rely on assertions to signal error conditions
474f6ad66aSAchin Gupta  ******************************************************************************/
484f6ad66aSAchin Gupta void bl2_main(void)
494f6ad66aSAchin Gupta {
50ee12f6f7SSandrine Bailleux 	meminfo *bl2_tzram_layout;
51e4d084eaSAchin Gupta 	bl31_args *bl2_to_bl31_args;
52*a3050ed5SAchin Gupta 	unsigned long bl31_base, bl32_base = 0, bl33_base, el_status;
534f6ad66aSAchin Gupta 	unsigned int bl2_load, bl31_load, mode;
544f6ad66aSAchin Gupta 
554f6ad66aSAchin Gupta 	/* Perform remaining generic architectural setup in S-El1 */
564f6ad66aSAchin Gupta 	bl2_arch_setup();
574f6ad66aSAchin Gupta 
584f6ad66aSAchin Gupta 	/* Perform platform setup in BL1 */
594f6ad66aSAchin Gupta 	bl2_platform_setup();
604f6ad66aSAchin Gupta 
614f6ad66aSAchin Gupta #if defined(__GNUC__)
624f6ad66aSAchin Gupta 	printf("BL2 Built : %s, %s\n\r", __TIME__, __DATE__);
634f6ad66aSAchin Gupta #endif
644f6ad66aSAchin Gupta 
654f6ad66aSAchin Gupta 	/* Find out how much free trusted ram remains after BL2 load */
66ee12f6f7SSandrine Bailleux 	bl2_tzram_layout = bl2_plat_sec_mem_layout();
674f6ad66aSAchin Gupta 
684f6ad66aSAchin Gupta 	/*
694f6ad66aSAchin Gupta 	 * Load BL31. BL1 tells BL2 whether it has been TOP or BOTTOM loaded.
704f6ad66aSAchin Gupta 	 * To avoid fragmentation of trusted SRAM memory, BL31 is always
714f6ad66aSAchin Gupta 	 * loaded opposite to BL2. This allows BL31 to reclaim BL2 memory
724f6ad66aSAchin Gupta 	 * while maintaining its free space in one contiguous chunk.
734f6ad66aSAchin Gupta 	 */
74ee12f6f7SSandrine Bailleux 	bl2_load = bl2_tzram_layout->attr & LOAD_MASK;
754f6ad66aSAchin Gupta 	assert((bl2_load == TOP_LOAD) || (bl2_load == BOT_LOAD));
764f6ad66aSAchin Gupta 	bl31_load = (bl2_load == TOP_LOAD) ? BOT_LOAD : TOP_LOAD;
77ee12f6f7SSandrine Bailleux 	bl31_base = load_image(bl2_tzram_layout, BL31_IMAGE_NAME,
784f6ad66aSAchin Gupta 	                       bl31_load, BL31_BASE);
794f6ad66aSAchin Gupta 
804f6ad66aSAchin Gupta 	/* Assert if it has not been possible to load BL31 */
81e4d084eaSAchin Gupta 	if (bl31_base == 0) {
82e4d084eaSAchin Gupta 		ERROR("Failed to load BL3-1.\n");
83e4d084eaSAchin Gupta 		panic();
84e4d084eaSAchin Gupta 	}
85e4d084eaSAchin Gupta 
86e4d084eaSAchin Gupta 	/*
87e4d084eaSAchin Gupta 	 * Get a pointer to the memory the platform has set aside to pass
88e4d084eaSAchin Gupta 	 * information to BL31.
89e4d084eaSAchin Gupta 	 */
90e4d084eaSAchin Gupta 	bl2_to_bl31_args = bl2_get_bl31_args_ptr();
914f6ad66aSAchin Gupta 
924f6ad66aSAchin Gupta 	/*
93*a3050ed5SAchin Gupta 	 * Load the BL32 image if there's one. It is upto to platform
94*a3050ed5SAchin Gupta 	 * to specify where BL32 should be loaded if it exists. It
95*a3050ed5SAchin Gupta 	 * could create space in the secure sram or point to a
96*a3050ed5SAchin Gupta 	 * completely different memory. A zero size indicates that the
97*a3050ed5SAchin Gupta 	 * platform does not want to load a BL32 image.
98*a3050ed5SAchin Gupta 	 */
99*a3050ed5SAchin Gupta 	if (bl2_to_bl31_args->bl32_meminfo.total_size)
100*a3050ed5SAchin Gupta 		bl32_base = load_image(&bl2_to_bl31_args->bl32_meminfo,
101*a3050ed5SAchin Gupta 				       BL32_IMAGE_NAME,
102*a3050ed5SAchin Gupta 				       bl2_to_bl31_args->bl32_meminfo.attr &
103*a3050ed5SAchin Gupta 				       LOAD_MASK,
104*a3050ed5SAchin Gupta 				       BL32_BASE);
105*a3050ed5SAchin Gupta 
106*a3050ed5SAchin Gupta 	/*
1074f6ad66aSAchin Gupta 	 * Create a new layout of memory for BL31 as seen by BL2. This
1084f6ad66aSAchin Gupta 	 * will gobble up all the BL2 memory.
1094f6ad66aSAchin Gupta 	 */
110e4d084eaSAchin Gupta 	init_bl31_mem_layout(bl2_tzram_layout,
111e4d084eaSAchin Gupta 			     &bl2_to_bl31_args->bl31_meminfo,
112e4d084eaSAchin Gupta 			     bl31_load);
1134f6ad66aSAchin Gupta 
114e4d084eaSAchin Gupta 	/* Load the BL33 image in non-secure memory provided by the platform */
115e4d084eaSAchin Gupta 	bl33_base = load_image(&bl2_to_bl31_args->bl33_meminfo,
116e4d084eaSAchin Gupta 			       BL33_IMAGE_NAME,
117e4d084eaSAchin Gupta 			       BOT_LOAD,
118e4d084eaSAchin Gupta 			       plat_get_ns_image_entrypoint());
119561cd33eSHarry Liebel 	/* Halt if failed to load normal world firmware. */
120561cd33eSHarry Liebel 	if (bl33_base == 0) {
121561cd33eSHarry Liebel 		ERROR("Failed to load BL3-3.\n");
122561cd33eSHarry Liebel 		panic();
123561cd33eSHarry Liebel 	}
124561cd33eSHarry Liebel 
1254f6ad66aSAchin Gupta 	/*
1264f6ad66aSAchin Gupta 	 * BL2 also needs to tell BL31 where the non-trusted software image
127e4d084eaSAchin Gupta 	 * is located.
1284f6ad66aSAchin Gupta 	 */
129e4d084eaSAchin Gupta 	bl2_to_bl31_args->bl33_image_info.entrypoint = bl33_base;
1304f6ad66aSAchin Gupta 
1314f6ad66aSAchin Gupta 	/* Figure out what mode we enter the non-secure world in */
1324f6ad66aSAchin Gupta 	el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
1334f6ad66aSAchin Gupta 	el_status &= ID_AA64PFR0_ELX_MASK;
1344f6ad66aSAchin Gupta 
1354f6ad66aSAchin Gupta 	if (el_status)
1364f6ad66aSAchin Gupta 		mode = MODE_EL2;
1374f6ad66aSAchin Gupta 	else
1384f6ad66aSAchin Gupta 		mode = MODE_EL1;
1394f6ad66aSAchin Gupta 
140e4d084eaSAchin Gupta 	/*
141e4d084eaSAchin Gupta 	 * TODO: Consider the possibility of specifying the SPSR in
142e4d084eaSAchin Gupta 	 * the FIP ToC and allowing the platform to have a say as
143e4d084eaSAchin Gupta 	 * well.
144e4d084eaSAchin Gupta 	 */
145e4d084eaSAchin Gupta 	bl2_to_bl31_args->bl33_image_info.spsr =
146e4d084eaSAchin Gupta 		make_spsr(mode, MODE_SP_ELX, MODE_RW_64);
147e4d084eaSAchin Gupta 	bl2_to_bl31_args->bl33_image_info.security_state = NON_SECURE;
148e4d084eaSAchin Gupta 
149*a3050ed5SAchin Gupta 	if (bl32_base) {
150*a3050ed5SAchin Gupta 		/* Fill BL32 image info */
151*a3050ed5SAchin Gupta 		bl2_to_bl31_args->bl32_image_info.entrypoint = bl32_base;
152*a3050ed5SAchin Gupta 		bl2_to_bl31_args->bl32_image_info.security_state = SECURE;
153*a3050ed5SAchin Gupta 
154*a3050ed5SAchin Gupta 		/*
155*a3050ed5SAchin Gupta 		 * The Secure Payload Dispatcher service is responsible for
156*a3050ed5SAchin Gupta 		 * setting the SPSR prior to entry into the BL32 image.
157*a3050ed5SAchin Gupta 		 */
158*a3050ed5SAchin Gupta 		bl2_to_bl31_args->bl32_image_info.spsr = 0;
159*a3050ed5SAchin Gupta 	}
160*a3050ed5SAchin Gupta 
161e4d084eaSAchin Gupta 	/* Flush the entire BL31 args buffer */
162e4d084eaSAchin Gupta 	flush_dcache_range((unsigned long) bl2_to_bl31_args,
163e4d084eaSAchin Gupta 			   sizeof(*bl2_to_bl31_args));
1644f6ad66aSAchin Gupta 
1654f6ad66aSAchin Gupta 	/*
1664f6ad66aSAchin Gupta 	 * Run BL31 via an SMC to BL1. Information on how to pass control to
167e4d084eaSAchin Gupta 	 * the BL32 (if present) and BL33 software images will be passed to
168e4d084eaSAchin Gupta 	 * BL31 as an argument.
1694f6ad66aSAchin Gupta 	 */
1704f6ad66aSAchin Gupta 	run_image(bl31_base,
1714f6ad66aSAchin Gupta 		  make_spsr(MODE_EL3, MODE_SP_ELX, MODE_RW_64),
1724f6ad66aSAchin Gupta 		  SECURE,
173e4d084eaSAchin Gupta 		  (void *) bl2_to_bl31_args,
174e4d084eaSAchin Gupta 		  NULL);
1754f6ad66aSAchin Gupta }
176