1*4f6ad66aSAchin Gupta /* 2*4f6ad66aSAchin Gupta * Copyright (c) 2013, ARM Limited. All rights reserved. 3*4f6ad66aSAchin Gupta * 4*4f6ad66aSAchin Gupta * Redistribution and use in source and binary forms, with or without 5*4f6ad66aSAchin Gupta * modification, are permitted provided that the following conditions are met: 6*4f6ad66aSAchin Gupta * 7*4f6ad66aSAchin Gupta * Redistributions of source code must retain the above copyright notice, this 8*4f6ad66aSAchin Gupta * list of conditions and the following disclaimer. 9*4f6ad66aSAchin Gupta * 10*4f6ad66aSAchin Gupta * Redistributions in binary form must reproduce the above copyright notice, 11*4f6ad66aSAchin Gupta * this list of conditions and the following disclaimer in the documentation 12*4f6ad66aSAchin Gupta * and/or other materials provided with the distribution. 13*4f6ad66aSAchin Gupta * 14*4f6ad66aSAchin Gupta * Neither the name of ARM nor the names of its contributors may be used 15*4f6ad66aSAchin Gupta * to endorse or promote products derived from this software without specific 16*4f6ad66aSAchin Gupta * prior written permission. 17*4f6ad66aSAchin Gupta * 18*4f6ad66aSAchin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*4f6ad66aSAchin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*4f6ad66aSAchin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*4f6ad66aSAchin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*4f6ad66aSAchin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*4f6ad66aSAchin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*4f6ad66aSAchin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*4f6ad66aSAchin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*4f6ad66aSAchin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*4f6ad66aSAchin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*4f6ad66aSAchin Gupta * POSSIBILITY OF SUCH DAMAGE. 29*4f6ad66aSAchin Gupta */ 30*4f6ad66aSAchin Gupta 31*4f6ad66aSAchin Gupta #include <stdio.h> 32*4f6ad66aSAchin Gupta #include <string.h> 33*4f6ad66aSAchin Gupta #include <assert.h> 34*4f6ad66aSAchin Gupta #include <arch_helpers.h> 35*4f6ad66aSAchin Gupta #include <console.h> 36*4f6ad66aSAchin Gupta #include <platform.h> 37*4f6ad66aSAchin Gupta #include <semihosting.h> 38*4f6ad66aSAchin Gupta #include <bl_common.h> 39*4f6ad66aSAchin Gupta #include <bl2.h> 40*4f6ad66aSAchin Gupta 41*4f6ad66aSAchin Gupta /******************************************************************************* 42*4f6ad66aSAchin Gupta * The only thing to do in BL2 is to load further images and pass control to 43*4f6ad66aSAchin Gupta * BL31. The memory occupied by BL2 will be reclaimed by BL3_x stages. BL2 runs 44*4f6ad66aSAchin Gupta * entirely in S-EL1. Since arm standard c libraries are not PIC, printf et al 45*4f6ad66aSAchin Gupta * are not available. We rely on assertions to signal error conditions 46*4f6ad66aSAchin Gupta ******************************************************************************/ 47*4f6ad66aSAchin Gupta void bl2_main(void) 48*4f6ad66aSAchin Gupta { 49*4f6ad66aSAchin Gupta meminfo bl2_tzram_layout, *bl31_tzram_layout; 50*4f6ad66aSAchin Gupta el_change_info *ns_image_info; 51*4f6ad66aSAchin Gupta unsigned long bl31_base, el_status; 52*4f6ad66aSAchin Gupta unsigned int bl2_load, bl31_load, mode; 53*4f6ad66aSAchin Gupta 54*4f6ad66aSAchin Gupta /* Perform remaining generic architectural setup in S-El1 */ 55*4f6ad66aSAchin Gupta bl2_arch_setup(); 56*4f6ad66aSAchin Gupta 57*4f6ad66aSAchin Gupta /* Perform platform setup in BL1 */ 58*4f6ad66aSAchin Gupta bl2_platform_setup(); 59*4f6ad66aSAchin Gupta 60*4f6ad66aSAchin Gupta #if defined (__GNUC__) 61*4f6ad66aSAchin Gupta printf("BL2 Built : %s, %s\n\r", __TIME__, __DATE__); 62*4f6ad66aSAchin Gupta #endif 63*4f6ad66aSAchin Gupta 64*4f6ad66aSAchin Gupta /* Find out how much free trusted ram remains after BL2 load */ 65*4f6ad66aSAchin Gupta bl2_tzram_layout = bl2_get_sec_mem_layout(); 66*4f6ad66aSAchin Gupta 67*4f6ad66aSAchin Gupta /* 68*4f6ad66aSAchin Gupta * Load BL31. BL1 tells BL2 whether it has been TOP or BOTTOM loaded. 69*4f6ad66aSAchin Gupta * To avoid fragmentation of trusted SRAM memory, BL31 is always 70*4f6ad66aSAchin Gupta * loaded opposite to BL2. This allows BL31 to reclaim BL2 memory 71*4f6ad66aSAchin Gupta * while maintaining its free space in one contiguous chunk. 72*4f6ad66aSAchin Gupta */ 73*4f6ad66aSAchin Gupta bl2_load = bl2_tzram_layout.attr & LOAD_MASK; 74*4f6ad66aSAchin Gupta assert((bl2_load == TOP_LOAD) || (bl2_load == BOT_LOAD)); 75*4f6ad66aSAchin Gupta bl31_load = (bl2_load == TOP_LOAD) ? BOT_LOAD : TOP_LOAD; 76*4f6ad66aSAchin Gupta bl31_base = load_image(&bl2_tzram_layout, BL31_IMAGE_NAME, 77*4f6ad66aSAchin Gupta bl31_load, BL31_BASE); 78*4f6ad66aSAchin Gupta 79*4f6ad66aSAchin Gupta /* Assert if it has not been possible to load BL31 */ 80*4f6ad66aSAchin Gupta assert(bl31_base != 0); 81*4f6ad66aSAchin Gupta 82*4f6ad66aSAchin Gupta /* 83*4f6ad66aSAchin Gupta * Create a new layout of memory for BL31 as seen by BL2. This 84*4f6ad66aSAchin Gupta * will gobble up all the BL2 memory. 85*4f6ad66aSAchin Gupta */ 86*4f6ad66aSAchin Gupta bl31_tzram_layout = (meminfo *) get_el_change_mem_ptr(); 87*4f6ad66aSAchin Gupta init_bl31_mem_layout(&bl2_tzram_layout, bl31_tzram_layout, bl31_load); 88*4f6ad66aSAchin Gupta 89*4f6ad66aSAchin Gupta /* 90*4f6ad66aSAchin Gupta * BL2 also needs to tell BL31 where the non-trusted software image 91*4f6ad66aSAchin Gupta * has been loaded. Place this info right after the BL31 memory layout 92*4f6ad66aSAchin Gupta */ 93*4f6ad66aSAchin Gupta ns_image_info = (el_change_info *) ((unsigned char *) bl31_tzram_layout 94*4f6ad66aSAchin Gupta + sizeof(meminfo)); 95*4f6ad66aSAchin Gupta 96*4f6ad66aSAchin Gupta /* 97*4f6ad66aSAchin Gupta * Assume that the non-secure bootloader has already been 98*4f6ad66aSAchin Gupta * loaded to its platform-specific location. 99*4f6ad66aSAchin Gupta */ 100*4f6ad66aSAchin Gupta ns_image_info->entrypoint = plat_get_ns_image_entrypoint(); 101*4f6ad66aSAchin Gupta 102*4f6ad66aSAchin Gupta /* Figure out what mode we enter the non-secure world in */ 103*4f6ad66aSAchin Gupta el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; 104*4f6ad66aSAchin Gupta el_status &= ID_AA64PFR0_ELX_MASK; 105*4f6ad66aSAchin Gupta 106*4f6ad66aSAchin Gupta if (el_status) 107*4f6ad66aSAchin Gupta mode = MODE_EL2; 108*4f6ad66aSAchin Gupta else 109*4f6ad66aSAchin Gupta mode = MODE_EL1; 110*4f6ad66aSAchin Gupta 111*4f6ad66aSAchin Gupta ns_image_info->spsr = make_spsr(mode, MODE_SP_ELX, MODE_RW_64); 112*4f6ad66aSAchin Gupta ns_image_info->security_state = NON_SECURE; 113*4f6ad66aSAchin Gupta flush_dcache_range((unsigned long) ns_image_info, 114*4f6ad66aSAchin Gupta sizeof(el_change_info)); 115*4f6ad66aSAchin Gupta 116*4f6ad66aSAchin Gupta /* 117*4f6ad66aSAchin Gupta * Run BL31 via an SMC to BL1. Information on how to pass control to 118*4f6ad66aSAchin Gupta * the non-trusted software image will be passed to BL31 in x2. 119*4f6ad66aSAchin Gupta */ 120*4f6ad66aSAchin Gupta if (bl31_base) 121*4f6ad66aSAchin Gupta run_image(bl31_base, 122*4f6ad66aSAchin Gupta make_spsr(MODE_EL3, MODE_SP_ELX, MODE_RW_64), 123*4f6ad66aSAchin Gupta SECURE, 124*4f6ad66aSAchin Gupta bl31_tzram_layout, 125*4f6ad66aSAchin Gupta (void *) ns_image_info); 126*4f6ad66aSAchin Gupta 127*4f6ad66aSAchin Gupta /* There is no valid reason for run_image() to return */ 128*4f6ad66aSAchin Gupta assert(0); 129*4f6ad66aSAchin Gupta } 130*4f6ad66aSAchin Gupta 131*4f6ad66aSAchin Gupta /******************************************************************************* 132*4f6ad66aSAchin Gupta * BL1 has this function to print the fact that BL2 has done its job and BL31 is 133*4f6ad66aSAchin Gupta * about to be loaded. Since BL2 re-uses BL1's exception table, it needs to 134*4f6ad66aSAchin Gupta * define this function as well. 135*4f6ad66aSAchin Gupta * TODO: Remove this function from BL2. 136*4f6ad66aSAchin Gupta ******************************************************************************/ 137*4f6ad66aSAchin Gupta void display_boot_progress(unsigned long entrypoint, 138*4f6ad66aSAchin Gupta unsigned long spsr, 139*4f6ad66aSAchin Gupta unsigned long mem_layout, 140*4f6ad66aSAchin Gupta unsigned long ns_image_info) 141*4f6ad66aSAchin Gupta { 142*4f6ad66aSAchin Gupta return; 143*4f6ad66aSAchin Gupta } 144