xref: /rk3399_ARM-atf/bl2/bl2_main.c (revision 034626719418e0cb7baed8d7c8eea6de2500efe8)
14f6ad66aSAchin Gupta /*
2e83b0cadSDan Handley  * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
34f6ad66aSAchin Gupta  *
44f6ad66aSAchin Gupta  * Redistribution and use in source and binary forms, with or without
54f6ad66aSAchin Gupta  * modification, are permitted provided that the following conditions are met:
64f6ad66aSAchin Gupta  *
74f6ad66aSAchin Gupta  * Redistributions of source code must retain the above copyright notice, this
84f6ad66aSAchin Gupta  * list of conditions and the following disclaimer.
94f6ad66aSAchin Gupta  *
104f6ad66aSAchin Gupta  * Redistributions in binary form must reproduce the above copyright notice,
114f6ad66aSAchin Gupta  * this list of conditions and the following disclaimer in the documentation
124f6ad66aSAchin Gupta  * and/or other materials provided with the distribution.
134f6ad66aSAchin Gupta  *
144f6ad66aSAchin Gupta  * Neither the name of ARM nor the names of its contributors may be used
154f6ad66aSAchin Gupta  * to endorse or promote products derived from this software without specific
164f6ad66aSAchin Gupta  * prior written permission.
174f6ad66aSAchin Gupta  *
184f6ad66aSAchin Gupta  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
194f6ad66aSAchin Gupta  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
204f6ad66aSAchin Gupta  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
214f6ad66aSAchin Gupta  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
224f6ad66aSAchin Gupta  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
234f6ad66aSAchin Gupta  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
244f6ad66aSAchin Gupta  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
254f6ad66aSAchin Gupta  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
264f6ad66aSAchin Gupta  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
274f6ad66aSAchin Gupta  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
284f6ad66aSAchin Gupta  * POSSIBILITY OF SUCH DAMAGE.
294f6ad66aSAchin Gupta  */
304f6ad66aSAchin Gupta 
3197043ac9SDan Handley #include <arch.h>
324f6ad66aSAchin Gupta #include <arch_helpers.h>
3397043ac9SDan Handley #include <assert.h>
344f6ad66aSAchin Gupta #include <bl_common.h>
3535e98e55SDan Handley #include <debug.h>
3697043ac9SDan Handley #include <platform.h>
375f0cdb05SDan Handley #include <platform_def.h>
3897043ac9SDan Handley #include <stdio.h>
395b827a8fSDan Handley #include "bl2_private.h"
404f6ad66aSAchin Gupta 
4129fb905dSVikram Kanigiri 
4229fb905dSVikram Kanigiri /*******************************************************************************
434f6ad66aSAchin Gupta  * The only thing to do in BL2 is to load further images and pass control to
444f6ad66aSAchin Gupta  * BL31. The memory occupied by BL2 will be reclaimed by BL3_x stages. BL2 runs
454f6ad66aSAchin Gupta  * entirely in S-EL1. Since arm standard c libraries are not PIC, printf et al
464f6ad66aSAchin Gupta  * are not available. We rely on assertions to signal error conditions
474f6ad66aSAchin Gupta  ******************************************************************************/
484f6ad66aSAchin Gupta void bl2_main(void)
494f6ad66aSAchin Gupta {
50fb037bfbSDan Handley 	meminfo_t *bl2_tzram_layout;
514112bfa0SVikram Kanigiri 	bl31_params_t *bl2_to_bl31_params;
524112bfa0SVikram Kanigiri 	unsigned int bl2_load, bl31_load;
534112bfa0SVikram Kanigiri 	entry_point_info_t *bl31_ep_info;
546871c5d3SVikram Kanigiri 	meminfo_t bl32_mem_info;
556871c5d3SVikram Kanigiri 	meminfo_t bl33_mem_info;
564112bfa0SVikram Kanigiri 	int e;
574f6ad66aSAchin Gupta 
584f6ad66aSAchin Gupta 	/* Perform remaining generic architectural setup in S-El1 */
594f6ad66aSAchin Gupta 	bl2_arch_setup();
604f6ad66aSAchin Gupta 
614f6ad66aSAchin Gupta 	/* Perform platform setup in BL1 */
624f6ad66aSAchin Gupta 	bl2_platform_setup();
634f6ad66aSAchin Gupta 
64fb052462SJon Medhurst 	printf("BL2 %s\n\r", build_message);
654f6ad66aSAchin Gupta 
664f6ad66aSAchin Gupta 	/* Find out how much free trusted ram remains after BL2 load */
67ee12f6f7SSandrine Bailleux 	bl2_tzram_layout = bl2_plat_sec_mem_layout();
684f6ad66aSAchin Gupta 
694f6ad66aSAchin Gupta 	/*
704112bfa0SVikram Kanigiri 	 * Get a pointer to the memory the platform has set aside to pass
714112bfa0SVikram Kanigiri 	 * information to BL31.
724112bfa0SVikram Kanigiri 	 */
734112bfa0SVikram Kanigiri 	bl2_to_bl31_params = bl2_plat_get_bl31_params();
744112bfa0SVikram Kanigiri 	bl31_ep_info = bl2_plat_get_bl31_ep_info();
754112bfa0SVikram Kanigiri 
76*03462671SAndrew Thoelke 	/* Set the X0 parameter to bl31 */
77*03462671SAndrew Thoelke 	bl31_ep_info->args.arg0 = (unsigned long)bl2_to_bl31_params;
78*03462671SAndrew Thoelke 
794112bfa0SVikram Kanigiri 	/*
804f6ad66aSAchin Gupta 	 * Load BL31. BL1 tells BL2 whether it has been TOP or BOTTOM loaded.
814f6ad66aSAchin Gupta 	 * To avoid fragmentation of trusted SRAM memory, BL31 is always
824f6ad66aSAchin Gupta 	 * loaded opposite to BL2. This allows BL31 to reclaim BL2 memory
834f6ad66aSAchin Gupta 	 * while maintaining its free space in one contiguous chunk.
844f6ad66aSAchin Gupta 	 */
85ee12f6f7SSandrine Bailleux 	bl2_load = bl2_tzram_layout->attr & LOAD_MASK;
864f6ad66aSAchin Gupta 	assert((bl2_load == TOP_LOAD) || (bl2_load == BOT_LOAD));
874f6ad66aSAchin Gupta 	bl31_load = (bl2_load == TOP_LOAD) ? BOT_LOAD : TOP_LOAD;
884112bfa0SVikram Kanigiri 	e = load_image(bl2_tzram_layout,
894112bfa0SVikram Kanigiri 			BL31_IMAGE_NAME,
904112bfa0SVikram Kanigiri 			bl31_load,
914112bfa0SVikram Kanigiri 			BL31_BASE,
924112bfa0SVikram Kanigiri 			bl2_to_bl31_params->bl31_image_info,
934112bfa0SVikram Kanigiri 			bl31_ep_info);
944f6ad66aSAchin Gupta 
954f6ad66aSAchin Gupta 	/* Assert if it has not been possible to load BL31 */
964112bfa0SVikram Kanigiri 	if (e) {
97e4d084eaSAchin Gupta 		ERROR("Failed to load BL3-1.\n");
98e4d084eaSAchin Gupta 		panic();
99e4d084eaSAchin Gupta 	}
100e4d084eaSAchin Gupta 
1014112bfa0SVikram Kanigiri 	bl2_plat_set_bl31_ep_info(bl2_to_bl31_params->bl31_image_info,
1024112bfa0SVikram Kanigiri 				bl31_ep_info);
103a3050ed5SAchin Gupta 
1046871c5d3SVikram Kanigiri 	bl2_plat_get_bl33_meminfo(&bl33_mem_info);
1054f6ad66aSAchin Gupta 
106e4d084eaSAchin Gupta 	/* Load the BL33 image in non-secure memory provided by the platform */
1076871c5d3SVikram Kanigiri 	e = load_image(&bl33_mem_info,
108e4d084eaSAchin Gupta 			BL33_IMAGE_NAME,
109e4d084eaSAchin Gupta 			BOT_LOAD,
1104112bfa0SVikram Kanigiri 			plat_get_ns_image_entrypoint(),
1114112bfa0SVikram Kanigiri 			bl2_to_bl31_params->bl33_image_info,
1124112bfa0SVikram Kanigiri 			bl2_to_bl31_params->bl33_ep_info);
1134112bfa0SVikram Kanigiri 
114561cd33eSHarry Liebel 	/* Halt if failed to load normal world firmware. */
1154112bfa0SVikram Kanigiri 	if (e) {
116561cd33eSHarry Liebel 		ERROR("Failed to load BL3-3.\n");
117561cd33eSHarry Liebel 		panic();
118561cd33eSHarry Liebel 	}
1194112bfa0SVikram Kanigiri 	bl2_plat_set_bl33_ep_info(bl2_to_bl31_params->bl33_image_info,
1204112bfa0SVikram Kanigiri 				bl2_to_bl31_params->bl33_ep_info);
121e4d084eaSAchin Gupta 
1221151c821SDan Handley 
1231151c821SDan Handley #ifdef BL32_BASE
12429fb905dSVikram Kanigiri 	/*
12529fb905dSVikram Kanigiri 	 * Load the BL32 image if there's one. It is upto to platform
12629fb905dSVikram Kanigiri 	 * to specify where BL32 should be loaded if it exists. It
12729fb905dSVikram Kanigiri 	 * could create space in the secure sram or point to a
1281151c821SDan Handley 	 * completely different memory.
1291151c821SDan Handley 	 *
1301151c821SDan Handley 	 * If a platform does not want to attempt to load BL3-2 image
1311151c821SDan Handley 	 * it must leave BL32_BASE undefined
13229fb905dSVikram Kanigiri 	 */
1336871c5d3SVikram Kanigiri 	bl2_plat_get_bl32_meminfo(&bl32_mem_info);
1346871c5d3SVikram Kanigiri 	e = load_image(&bl32_mem_info,
13529fb905dSVikram Kanigiri 		       BL32_IMAGE_NAME,
1361151c821SDan Handley 		       bl32_mem_info.attr & LOAD_MASK,
1374112bfa0SVikram Kanigiri 		       BL32_BASE,
1384112bfa0SVikram Kanigiri 		       bl2_to_bl31_params->bl32_image_info,
1394112bfa0SVikram Kanigiri 		       bl2_to_bl31_params->bl32_ep_info);
14029fb905dSVikram Kanigiri 
1411151c821SDan Handley 	/* Issue a diagnostic if no Secure Payload could be loaded */
1424112bfa0SVikram Kanigiri 	if (e) {
1434112bfa0SVikram Kanigiri 		WARN("Failed to load BL3-2.\n");
1444112bfa0SVikram Kanigiri 	} else {
1454112bfa0SVikram Kanigiri 		bl2_plat_set_bl32_ep_info(
1464112bfa0SVikram Kanigiri 			bl2_to_bl31_params->bl32_image_info,
1474112bfa0SVikram Kanigiri 			bl2_to_bl31_params->bl32_ep_info);
148a3050ed5SAchin Gupta 	}
1491151c821SDan Handley #endif /* BL32_BASE */
1504112bfa0SVikram Kanigiri 
151*03462671SAndrew Thoelke 	/* Flush the params to be passed to memory */
152*03462671SAndrew Thoelke 	bl2_plat_flush_bl31_params();
153*03462671SAndrew Thoelke 
1544f6ad66aSAchin Gupta 	/*
1554f6ad66aSAchin Gupta 	 * Run BL31 via an SMC to BL1. Information on how to pass control to
156e4d084eaSAchin Gupta 	 * the BL32 (if present) and BL33 software images will be passed to
157e4d084eaSAchin Gupta 	 * BL31 as an argument.
1584f6ad66aSAchin Gupta 	 */
159*03462671SAndrew Thoelke 	smc(RUN_IMAGE, (unsigned long)bl31_ep_info, 0, 0, 0, 0, 0, 0);
1604f6ad66aSAchin Gupta }
161