1# 2# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7BL2_SOURCES += bl2/bl2_image_load_v2.c \ 8 bl2/bl2_main.c \ 9 bl2/${ARCH}/bl2_arch_setup.c \ 10 lib/locks/exclusive/${ARCH}/spinlock.S \ 11 plat/common/${ARCH}/platform_up_stack.S \ 12 ${MBEDTLS_SOURCES} 13 14ifeq (${ARCH},aarch64) 15BL2_SOURCES += common/aarch64/early_exceptions.S 16endif 17 18ifeq (${ENABLE_RME},1) 19# Using RME, run BL2 at EL3 20include lib/gpt_rme/gpt_rme.mk 21 22BL2_SOURCES += bl2/${ARCH}/bl2_rme_entrypoint.S \ 23 bl2/${ARCH}/bl2_el3_exceptions.S \ 24 bl2/${ARCH}/bl2_run_next_image.S \ 25 ${GPT_LIB_SRCS} 26BL2_DEFAULT_LINKER_SCRIPT_SOURCE := bl2/bl2.ld.S 27 28else ifeq (${BL2_AT_EL3},0) 29# Normal operation, no RME, no BL2 at EL3 30BL2_SOURCES += bl2/${ARCH}/bl2_entrypoint.S 31BL2_DEFAULT_LINKER_SCRIPT_SOURCE := bl2/bl2.ld.S 32 33else 34# BL2 at EL3, no RME 35BL2_SOURCES += bl2/${ARCH}/bl2_el3_entrypoint.S \ 36 bl2/${ARCH}/bl2_el3_exceptions.S \ 37 bl2/${ARCH}/bl2_run_next_image.S \ 38 lib/cpus/${ARCH}/cpu_helpers.S \ 39 lib/cpus/errata_report.c 40 41ifeq (${DISABLE_MTPMU},1) 42BL2_SOURCES += lib/extensions/mtpmu/${ARCH}/mtpmu.S 43endif 44 45ifeq (${ARCH},aarch64) 46BL2_SOURCES += lib/cpus/aarch64/dsu_helpers.S 47endif 48 49BL2_DEFAULT_LINKER_SCRIPT_SOURCE := bl2/bl2_el3.ld.S 50endif 51