xref: /rk3399_ARM-atf/bl2/aarch64/bl2_el3_exceptions.S (revision 9a207532f8216bf83fed0891fed9ed0bc72ca450)
1b1d27b48SRoberto Vargas/*
2b1d27b48SRoberto Vargas * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3b1d27b48SRoberto Vargas *
4b1d27b48SRoberto Vargas * SPDX-License-Identifier: BSD-3-Clause
5b1d27b48SRoberto Vargas */
6b1d27b48SRoberto Vargas
7b1d27b48SRoberto Vargas#include <arch.h>
8b1d27b48SRoberto Vargas#include <asm_macros.S>
9*09d40e0eSAntonio Nino Diaz#include <bl1/bl1.h>
10*09d40e0eSAntonio Nino Diaz#include <common/bl_common.h>
11b1d27b48SRoberto Vargas#include <context.h>
12b1d27b48SRoberto Vargas
13b1d27b48SRoberto Vargas/* -----------------------------------------------------------------------------
14b1d27b48SRoberto Vargas * Very simple stackless exception handlers used by BL2.
15b1d27b48SRoberto Vargas * -----------------------------------------------------------------------------
16b1d27b48SRoberto Vargas */
17b1d27b48SRoberto Vargas	.globl	bl2_el3_exceptions
18b1d27b48SRoberto Vargas
19b1d27b48SRoberto Vargasvector_base bl2_el3_exceptions
20b1d27b48SRoberto Vargas
21b1d27b48SRoberto Vargas	/* -----------------------------------------------------
22b1d27b48SRoberto Vargas	 * Current EL with SP0 : 0x0 - 0x200
23b1d27b48SRoberto Vargas	 * -----------------------------------------------------
24b1d27b48SRoberto Vargas	 */
25b1d27b48SRoberto Vargasvector_entry SynchronousExceptionSP0
26b1d27b48SRoberto Vargas	mov	x0, #SYNC_EXCEPTION_SP_EL0
27b1d27b48SRoberto Vargas	bl	plat_report_exception
28b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
29a9203edaSRoberto Vargasend_vector_entry SynchronousExceptionSP0
30b1d27b48SRoberto Vargas
31b1d27b48SRoberto Vargasvector_entry IrqSP0
32b1d27b48SRoberto Vargas	mov	x0, #IRQ_SP_EL0
33b1d27b48SRoberto Vargas	bl	plat_report_exception
34b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
35a9203edaSRoberto Vargasend_vector_entry IrqSP0
36b1d27b48SRoberto Vargas
37b1d27b48SRoberto Vargasvector_entry FiqSP0
38b1d27b48SRoberto Vargas	mov	x0, #FIQ_SP_EL0
39b1d27b48SRoberto Vargas	bl	plat_report_exception
40b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
41a9203edaSRoberto Vargasend_vector_entry FiqSP0
42b1d27b48SRoberto Vargas
43b1d27b48SRoberto Vargasvector_entry SErrorSP0
44b1d27b48SRoberto Vargas	mov	x0, #SERROR_SP_EL0
45b1d27b48SRoberto Vargas	bl	plat_report_exception
46b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
47a9203edaSRoberto Vargasend_vector_entry SErrorSP0
48b1d27b48SRoberto Vargas
49b1d27b48SRoberto Vargas	/* -----------------------------------------------------
50b1d27b48SRoberto Vargas	 * Current EL with SPx: 0x200 - 0x400
51b1d27b48SRoberto Vargas	 * -----------------------------------------------------
52b1d27b48SRoberto Vargas	 */
53b1d27b48SRoberto Vargasvector_entry SynchronousExceptionSPx
54b1d27b48SRoberto Vargas	mov	x0, #SYNC_EXCEPTION_SP_ELX
55b1d27b48SRoberto Vargas	bl	plat_report_exception
56b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
57a9203edaSRoberto Vargasend_vector_entry SynchronousExceptionSPx
58b1d27b48SRoberto Vargas
59b1d27b48SRoberto Vargasvector_entry IrqSPx
60b1d27b48SRoberto Vargas	mov	x0, #IRQ_SP_ELX
61b1d27b48SRoberto Vargas	bl	plat_report_exception
62b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
63a9203edaSRoberto Vargasend_vector_entry IrqSPx
64b1d27b48SRoberto Vargas
65b1d27b48SRoberto Vargasvector_entry FiqSPx
66b1d27b48SRoberto Vargas	mov	x0, #FIQ_SP_ELX
67b1d27b48SRoberto Vargas	bl	plat_report_exception
68b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
69a9203edaSRoberto Vargasend_vector_entry FiqSPx
70b1d27b48SRoberto Vargas
71b1d27b48SRoberto Vargasvector_entry SErrorSPx
72b1d27b48SRoberto Vargas	mov	x0, #SERROR_SP_ELX
73b1d27b48SRoberto Vargas	bl	plat_report_exception
74b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
75a9203edaSRoberto Vargasend_vector_entry SErrorSPx
76b1d27b48SRoberto Vargas
77b1d27b48SRoberto Vargas	/* -----------------------------------------------------
78b1d27b48SRoberto Vargas	 * Lower EL using AArch64 : 0x400 - 0x600
79b1d27b48SRoberto Vargas	 * -----------------------------------------------------
80b1d27b48SRoberto Vargas	 */
81b1d27b48SRoberto Vargasvector_entry SynchronousExceptionA64
82b1d27b48SRoberto Vargas	mov	x0, #SYNC_EXCEPTION_AARCH64
83b1d27b48SRoberto Vargas	bl	plat_report_exception
84b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
85a9203edaSRoberto Vargasend_vector_entry SynchronousExceptionA64
86b1d27b48SRoberto Vargas
87b1d27b48SRoberto Vargasvector_entry IrqA64
88b1d27b48SRoberto Vargas	mov	x0, #IRQ_AARCH64
89b1d27b48SRoberto Vargas	bl	plat_report_exception
90b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
91a9203edaSRoberto Vargasend_vector_entry IrqA64
92b1d27b48SRoberto Vargas
93b1d27b48SRoberto Vargasvector_entry FiqA64
94b1d27b48SRoberto Vargas	mov	x0, #FIQ_AARCH64
95b1d27b48SRoberto Vargas	bl	plat_report_exception
96b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
97a9203edaSRoberto Vargasend_vector_entry FiqA64
98b1d27b48SRoberto Vargas
99b1d27b48SRoberto Vargasvector_entry SErrorA64
100b1d27b48SRoberto Vargas	mov	x0, #SERROR_AARCH64
101b1d27b48SRoberto Vargas	bl	plat_report_exception
102b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
103a9203edaSRoberto Vargasend_vector_entry SErrorA64
104b1d27b48SRoberto Vargas
105b1d27b48SRoberto Vargas	/* -----------------------------------------------------
106b1d27b48SRoberto Vargas	 * Lower EL using AArch32 : 0x600 - 0x800
107b1d27b48SRoberto Vargas	 * -----------------------------------------------------
108b1d27b48SRoberto Vargas	 */
109b1d27b48SRoberto Vargasvector_entry SynchronousExceptionA32
110b1d27b48SRoberto Vargas	mov	x0, #SYNC_EXCEPTION_AARCH32
111b1d27b48SRoberto Vargas	bl	plat_report_exception
112b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
113a9203edaSRoberto Vargasend_vector_entry SynchronousExceptionA32
114b1d27b48SRoberto Vargas
115b1d27b48SRoberto Vargasvector_entry IrqA32
116b1d27b48SRoberto Vargas	mov	x0, #IRQ_AARCH32
117b1d27b48SRoberto Vargas	bl	plat_report_exception
118b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
119a9203edaSRoberto Vargasend_vector_entry IrqA32
120b1d27b48SRoberto Vargas
121b1d27b48SRoberto Vargasvector_entry FiqA32
122b1d27b48SRoberto Vargas	mov	x0, #FIQ_AARCH32
123b1d27b48SRoberto Vargas	bl	plat_report_exception
124b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
125a9203edaSRoberto Vargasend_vector_entry FiqA32
126b1d27b48SRoberto Vargas
127b1d27b48SRoberto Vargasvector_entry SErrorA32
128b1d27b48SRoberto Vargas	mov	x0, #SERROR_AARCH32
129b1d27b48SRoberto Vargas	bl	plat_report_exception
130b1d27b48SRoberto Vargas	no_ret	plat_panic_handler
131a9203edaSRoberto Vargasend_vector_entry SErrorA32
132