xref: /rk3399_ARM-atf/bl2/aarch64/bl2_el3_entrypoint.S (revision ebff1072681c5ed09bb70d9c4f617476822db757)
1/*
2 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <common/bl_common.h>
10#include <el3_common_macros.S>
11
12	.globl	bl2_entrypoint
13	.globl	bl2_el3_run_image
14	.globl	bl2_run_next_image
15
16func bl2_entrypoint
17	/* Save arguments x0-x3 from previous Boot loader */
18	mov	x20, x0
19	mov	x21, x1
20	mov	x22, x2
21	mov	x23, x3
22
23	el3_entrypoint_common                                   \
24		_init_sctlr=1                                   \
25		_warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS  \
26		_secondary_cold_boot=!COLD_BOOT_SINGLE_CPU      \
27		_init_memory=1                                  \
28		_init_c_runtime=1                               \
29		_exception_vectors=bl2_el3_exceptions
30
31	/* ---------------------------------------------
32	 * Restore parameters of boot rom
33	 * ---------------------------------------------
34	 */
35	mov	x0, x20
36	mov	x1, x21
37	mov	x2, x22
38	mov	x3, x23
39
40	/* ---------------------------------------------
41	 * Perform BL2 setup
42	 * ---------------------------------------------
43	 */
44	bl	bl2_el3_setup
45
46#if ENABLE_PAUTH
47	/* ---------------------------------------------
48	 * Program APIAKey_EL1 and enable pointer authentication.
49	 * ---------------------------------------------
50	 */
51	bl	pauth_init_enable_el3
52#endif /* ENABLE_PAUTH */
53
54	/* ---------------------------------------------
55	 * Jump to main function.
56	 * ---------------------------------------------
57	 */
58	bl	bl2_main
59
60	/* ---------------------------------------------
61	 * Should never reach this point.
62	 * ---------------------------------------------
63	 */
64	no_ret	plat_panic_handler
65endfunc bl2_entrypoint
66
67func bl2_run_next_image
68	mov	x20,x0
69	/* ---------------------------------------------
70	 * MMU needs to be disabled because both BL2 and BL31 execute
71	 * in EL3, and therefore share the same address space.
72	 * BL31 will initialize the address space according to its
73	 * own requirement.
74	 * ---------------------------------------------
75	 */
76	bl	disable_mmu_icache_el3
77	tlbi	alle3
78	bl	bl2_el3_plat_prepare_exit
79
80#if ENABLE_PAUTH
81	/* ---------------------------------------------
82	 * Disable pointer authentication before jumping
83	 * to next boot image.
84	 * ---------------------------------------------
85	 */
86	bl	pauth_disable_el3
87#endif /* ENABLE_PAUTH */
88
89	ldp	x0, x1, [x20, #ENTRY_POINT_INFO_PC_OFFSET]
90	msr	elr_el3, x0
91	msr	spsr_el3, x1
92
93	ldp	x6, x7, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x30)]
94	ldp	x4, x5, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x20)]
95	ldp	x2, x3, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x10)]
96	ldp	x0, x1, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x0)]
97	eret
98endfunc bl2_run_next_image
99