1*b1d27b48SRoberto Vargas/* 2*b1d27b48SRoberto Vargas * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*b1d27b48SRoberto Vargas * 4*b1d27b48SRoberto Vargas * SPDX-License-Identifier: BSD-3-Clause 5*b1d27b48SRoberto Vargas */ 6*b1d27b48SRoberto Vargas 7*b1d27b48SRoberto Vargas#include <arch.h> 8*b1d27b48SRoberto Vargas#include <asm_macros.S> 9*b1d27b48SRoberto Vargas#include <bl_common.h> 10*b1d27b48SRoberto Vargas 11*b1d27b48SRoberto Vargas .globl bl2_vector_table 12*b1d27b48SRoberto Vargas 13*b1d27b48SRoberto Vargasvector_base bl2_vector_table 14*b1d27b48SRoberto Vargas b bl2_entrypoint 15*b1d27b48SRoberto Vargas b report_exception /* Undef */ 16*b1d27b48SRoberto Vargas b report_exception /* SVC call */ 17*b1d27b48SRoberto Vargas b report_exception /* Prefetch abort */ 18*b1d27b48SRoberto Vargas b report_exception /* Data abort */ 19*b1d27b48SRoberto Vargas b report_exception /* Reserved */ 20*b1d27b48SRoberto Vargas b report_exception /* IRQ */ 21*b1d27b48SRoberto Vargas b report_exception /* FIQ */ 22