1 /* 2 * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <platform_def.h> 10 11 #include <arch.h> 12 #include <arch_helpers.h> 13 #include <bl1/bl1.h> 14 #include <common/bl_common.h> 15 #include <common/debug.h> 16 #include <drivers/auth/auth_mod.h> 17 #include <drivers/console.h> 18 #include <lib/cpus/errata_report.h> 19 #include <lib/utils.h> 20 #include <plat/common/platform.h> 21 #include <smccc_helpers.h> 22 #include <tools_share/uuid.h> 23 24 #include "bl1_private.h" 25 26 /* BL1 Service UUID */ 27 DEFINE_SVC_UUID2(bl1_svc_uid, 28 0xd46739fd, 0xcb72, 0x9a4d, 0xb5, 0x75, 29 0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a); 30 31 static void bl1_load_bl2(void); 32 33 /******************************************************************************* 34 * Helper utility to calculate the BL2 memory layout taking into consideration 35 * the BL1 RW data assuming that it is at the top of the memory layout. 36 ******************************************************************************/ 37 void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout, 38 meminfo_t *bl2_mem_layout) 39 { 40 assert(bl1_mem_layout != NULL); 41 assert(bl2_mem_layout != NULL); 42 43 /* 44 * Remove BL1 RW data from the scope of memory visible to BL2. 45 * This is assuming BL1 RW data is at the top of bl1_mem_layout. 46 */ 47 assert(BL1_RW_BASE > bl1_mem_layout->total_base); 48 bl2_mem_layout->total_base = bl1_mem_layout->total_base; 49 bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base; 50 51 flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t)); 52 } 53 54 /******************************************************************************* 55 * Setup function for BL1. 56 ******************************************************************************/ 57 void bl1_setup(void) 58 { 59 /* Perform early platform-specific setup */ 60 bl1_early_platform_setup(); 61 62 #ifdef AARCH64 63 /* 64 * Update pointer authentication key before the MMU is enabled. It is 65 * saved in the rodata section, that can be writen before enabling the 66 * MMU. This function must be called after the console is initialized 67 * in the early platform setup. 68 */ 69 bl_handle_pauth(); 70 #endif /* AARCH64 */ 71 72 /* Perform late platform-specific setup */ 73 bl1_plat_arch_setup(); 74 } 75 76 /******************************************************************************* 77 * Function to perform late architectural and platform specific initialization. 78 * It also queries the platform to load and run next BL image. Only called 79 * by the primary cpu after a cold boot. 80 ******************************************************************************/ 81 void bl1_main(void) 82 { 83 unsigned int image_id; 84 85 /* Announce our arrival */ 86 NOTICE(FIRMWARE_WELCOME_STR); 87 NOTICE("BL1: %s\n", version_string); 88 NOTICE("BL1: %s\n", build_message); 89 90 INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, 91 (void *)BL1_RAM_LIMIT); 92 93 print_errata_status(); 94 95 #if ENABLE_ASSERTIONS 96 u_register_t val; 97 /* 98 * Ensure that MMU/Caches and coherency are turned on 99 */ 100 #ifdef AARCH32 101 val = read_sctlr(); 102 #else 103 val = read_sctlr_el3(); 104 #endif 105 assert(val & SCTLR_M_BIT); 106 assert(val & SCTLR_C_BIT); 107 assert(val & SCTLR_I_BIT); 108 /* 109 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the 110 * provided platform value 111 */ 112 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; 113 /* 114 * If CWG is zero, then no CWG information is available but we can 115 * at least check the platform value is less than the architectural 116 * maximum. 117 */ 118 if (val != 0) 119 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); 120 else 121 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); 122 #endif /* ENABLE_ASSERTIONS */ 123 124 /* Perform remaining generic architectural setup from EL3 */ 125 bl1_arch_setup(); 126 127 #if TRUSTED_BOARD_BOOT 128 /* Initialize authentication module */ 129 auth_mod_init(); 130 #endif /* TRUSTED_BOARD_BOOT */ 131 132 /* Perform platform setup in BL1. */ 133 bl1_platform_setup(); 134 135 /* Get the image id of next image to load and run. */ 136 image_id = bl1_plat_get_next_image_id(); 137 138 /* 139 * We currently interpret any image id other than 140 * BL2_IMAGE_ID as the start of firmware update. 141 */ 142 if (image_id == BL2_IMAGE_ID) 143 bl1_load_bl2(); 144 else 145 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); 146 147 bl1_prepare_next_image(image_id); 148 149 console_flush(); 150 } 151 152 /******************************************************************************* 153 * This function locates and loads the BL2 raw binary image in the trusted SRAM. 154 * Called by the primary cpu after a cold boot. 155 * TODO: Add support for alternative image load mechanism e.g using virtio/elf 156 * loader etc. 157 ******************************************************************************/ 158 static void bl1_load_bl2(void) 159 { 160 image_desc_t *image_desc; 161 image_info_t *image_info; 162 int err; 163 164 /* Get the image descriptor */ 165 image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); 166 assert(image_desc); 167 168 /* Get the image info */ 169 image_info = &image_desc->image_info; 170 INFO("BL1: Loading BL2\n"); 171 172 err = bl1_plat_handle_pre_image_load(BL2_IMAGE_ID); 173 if (err) { 174 ERROR("Failure in pre image load handling of BL2 (%d)\n", err); 175 plat_error_handler(err); 176 } 177 178 err = load_auth_image(BL2_IMAGE_ID, image_info); 179 if (err) { 180 ERROR("Failed to load BL2 firmware.\n"); 181 plat_error_handler(err); 182 } 183 184 /* Allow platform to handle image information. */ 185 err = bl1_plat_handle_post_image_load(BL2_IMAGE_ID); 186 if (err) { 187 ERROR("Failure in post image load handling of BL2 (%d)\n", err); 188 plat_error_handler(err); 189 } 190 191 NOTICE("BL1: Booting BL2\n"); 192 } 193 194 /******************************************************************************* 195 * Function called just before handing over to the next BL to inform the user 196 * about the boot progress. In debug mode, also print details about the BL 197 * image's execution context. 198 ******************************************************************************/ 199 void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info) 200 { 201 #ifdef AARCH32 202 NOTICE("BL1: Booting BL32\n"); 203 #else 204 NOTICE("BL1: Booting BL31\n"); 205 #endif /* AARCH32 */ 206 print_entry_point_info(bl_ep_info); 207 } 208 209 #if SPIN_ON_BL1_EXIT 210 void print_debug_loop_message(void) 211 { 212 NOTICE("BL1: Debug loop, spinning forever\n"); 213 NOTICE("BL1: Please connect the debugger to continue\n"); 214 } 215 #endif 216 217 /******************************************************************************* 218 * Top level handler for servicing BL1 SMCs. 219 ******************************************************************************/ 220 register_t bl1_smc_handler(unsigned int smc_fid, 221 register_t x1, 222 register_t x2, 223 register_t x3, 224 register_t x4, 225 void *cookie, 226 void *handle, 227 unsigned int flags) 228 { 229 230 #if TRUSTED_BOARD_BOOT 231 /* 232 * Dispatch FWU calls to FWU SMC handler and return its return 233 * value 234 */ 235 if (is_fwu_fid(smc_fid)) { 236 return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 237 handle, flags); 238 } 239 #endif 240 241 switch (smc_fid) { 242 case BL1_SMC_CALL_COUNT: 243 SMC_RET1(handle, BL1_NUM_SMC_CALLS); 244 245 case BL1_SMC_UID: 246 SMC_UUID_RET(handle, bl1_svc_uid); 247 248 case BL1_SMC_VERSION: 249 SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER); 250 251 default: 252 break; 253 } 254 255 WARN("Unimplemented BL1 SMC Call: 0x%x \n", smc_fid); 256 SMC_RET1(handle, SMC_UNK); 257 } 258 259 /******************************************************************************* 260 * BL1 SMC wrapper. This function is only used in AArch32 mode to ensure ABI 261 * compliance when invoking bl1_smc_handler. 262 ******************************************************************************/ 263 register_t bl1_smc_wrapper(uint32_t smc_fid, 264 void *cookie, 265 void *handle, 266 unsigned int flags) 267 { 268 register_t x1, x2, x3, x4; 269 270 assert(handle); 271 272 get_smc_params_from_ctx(handle, x1, x2, x3, x4); 273 return bl1_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags); 274 } 275