1 /* 2 * Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <platform_def.h> 10 11 #include <arch.h> 12 #include <arch_features.h> 13 #include <arch_helpers.h> 14 #include <bl1/bl1.h> 15 #include <common/bl_common.h> 16 #include <common/build_message.h> 17 #include <common/debug.h> 18 #include <drivers/auth/auth_mod.h> 19 #include <drivers/auth/crypto_mod.h> 20 #include <drivers/console.h> 21 #include <lib/bootmarker_capture.h> 22 #include <lib/cpus/errata.h> 23 #include <lib/pmf/pmf.h> 24 #include <lib/utils.h> 25 #include <plat/common/platform.h> 26 #include <smccc_helpers.h> 27 #include <tools_share/uuid.h> 28 29 #include "bl1_private.h" 30 31 static void bl1_load_bl2(void); 32 33 #if ENABLE_PAUTH 34 uint64_t bl1_apiakey[2]; 35 #endif 36 37 #if ENABLE_RUNTIME_INSTRUMENTATION 38 PMF_REGISTER_SERVICE(bl_svc, PMF_RT_INSTR_SVC_ID, 39 BL_TOTAL_IDS, PMF_DUMP_ENABLE) 40 #endif 41 42 /******************************************************************************* 43 * Setup function for BL1. 44 ******************************************************************************/ 45 void bl1_setup(void) 46 { 47 /* Enable early console if EARLY_CONSOLE flag is enabled */ 48 plat_setup_early_console(); 49 50 /* Perform early platform-specific setup */ 51 bl1_early_platform_setup(); 52 53 /* Perform late platform-specific setup */ 54 bl1_plat_arch_setup(); 55 } 56 57 /******************************************************************************* 58 * Function to perform late architectural and platform specific initialization. 59 * It also queries the platform to load and run next BL image. Only called 60 * by the primary cpu after a cold boot. 61 ******************************************************************************/ 62 void bl1_main(void) 63 { 64 unsigned int image_id; 65 66 #if ENABLE_RUNTIME_INSTRUMENTATION 67 PMF_CAPTURE_TIMESTAMP(bl_svc, BL1_ENTRY, PMF_CACHE_MAINT); 68 #endif 69 70 /* Announce our arrival */ 71 NOTICE(FIRMWARE_WELCOME_STR); 72 NOTICE("BL1: %s\n", build_version_string); 73 NOTICE("BL1: %s\n", build_message); 74 75 INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, (void *)BL1_RAM_LIMIT); 76 77 print_errata_status(); 78 79 #if ENABLE_ASSERTIONS 80 u_register_t val; 81 /* 82 * Ensure that MMU/Caches and coherency are turned on 83 */ 84 #ifdef __aarch64__ 85 val = read_sctlr_el3(); 86 #else 87 val = read_sctlr(); 88 #endif 89 assert((val & SCTLR_M_BIT) != 0); 90 assert((val & SCTLR_C_BIT) != 0); 91 assert((val & SCTLR_I_BIT) != 0); 92 /* 93 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the 94 * provided platform value 95 */ 96 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; 97 /* 98 * If CWG is zero, then no CWG information is available but we can 99 * at least check the platform value is less than the architectural 100 * maximum. 101 */ 102 if (val != 0) 103 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); 104 else 105 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); 106 #endif /* ENABLE_ASSERTIONS */ 107 108 /* Perform remaining generic architectural setup from EL3 */ 109 bl1_arch_setup(); 110 111 crypto_mod_init(); 112 113 /* Initialize authentication module */ 114 auth_mod_init(); 115 116 /* Initialize the measured boot */ 117 bl1_plat_mboot_init(); 118 119 /* Perform platform setup in BL1. */ 120 bl1_platform_setup(); 121 122 #if ENABLE_PAUTH 123 /* Store APIAKey_EL1 key */ 124 bl1_apiakey[0] = read_apiakeylo_el1(); 125 bl1_apiakey[1] = read_apiakeyhi_el1(); 126 #endif /* ENABLE_PAUTH */ 127 128 /* Get the image id of next image to load and run. */ 129 image_id = bl1_plat_get_next_image_id(); 130 131 /* 132 * We currently interpret any image id other than 133 * BL2_IMAGE_ID as the start of firmware update. 134 */ 135 if (image_id == BL2_IMAGE_ID) 136 bl1_load_bl2(); 137 else 138 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); 139 140 /* Teardown the measured boot driver */ 141 bl1_plat_mboot_finish(); 142 143 bl1_prepare_next_image(image_id); 144 145 #if ENABLE_RUNTIME_INSTRUMENTATION 146 PMF_CAPTURE_TIMESTAMP(bl_svc, BL1_EXIT, PMF_CACHE_MAINT); 147 #endif 148 149 console_flush(); 150 } 151 152 /******************************************************************************* 153 * This function locates and loads the BL2 raw binary image in the trusted SRAM. 154 * Called by the primary cpu after a cold boot. 155 * TODO: Add support for alternative image load mechanism e.g using virtio/elf 156 * loader etc. 157 ******************************************************************************/ 158 static void bl1_load_bl2(void) 159 { 160 image_desc_t *desc; 161 image_info_t *info; 162 int err; 163 164 /* Get the image descriptor */ 165 desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); 166 assert(desc != NULL); 167 168 /* Get the image info */ 169 info = &desc->image_info; 170 INFO("BL1: Loading BL2\n"); 171 172 err = bl1_plat_handle_pre_image_load(BL2_IMAGE_ID); 173 if (err != 0) { 174 ERROR("Failure in pre image load handling of BL2 (%d)\n", err); 175 plat_error_handler(err); 176 } 177 178 err = load_auth_image(BL2_IMAGE_ID, info); 179 if (err != 0) { 180 ERROR("Failed to load BL2 firmware.\n"); 181 plat_error_handler(err); 182 } 183 184 /* Allow platform to handle image information. */ 185 err = bl1_plat_handle_post_image_load(BL2_IMAGE_ID); 186 if (err != 0) { 187 ERROR("Failure in post image load handling of BL2 (%d)\n", err); 188 plat_error_handler(err); 189 } 190 191 NOTICE("BL1: Booting BL2\n"); 192 } 193 194 /******************************************************************************* 195 * Function called just before handing over to the next BL to inform the user 196 * about the boot progress. In debug mode, also print details about the BL 197 * image's execution context. 198 ******************************************************************************/ 199 void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info) 200 { 201 #ifdef __aarch64__ 202 NOTICE("BL1: Booting BL31\n"); 203 #else 204 NOTICE("BL1: Booting BL32\n"); 205 #endif /* __aarch64__ */ 206 print_entry_point_info(bl_ep_info); 207 } 208 209 #if SPIN_ON_BL1_EXIT 210 void print_debug_loop_message(void) 211 { 212 NOTICE("BL1: Debug loop, spinning forever\n"); 213 NOTICE("BL1: Please connect the debugger to continue\n"); 214 } 215 #endif 216 217 /******************************************************************************* 218 * Top level handler for servicing BL1 SMCs. 219 ******************************************************************************/ 220 u_register_t bl1_smc_handler(unsigned int smc_fid, 221 u_register_t x1, 222 u_register_t x2, 223 u_register_t x3, 224 u_register_t x4, 225 void *cookie, 226 void *handle, 227 unsigned int flags) 228 { 229 /* BL1 Service UUID */ 230 DEFINE_SVC_UUID2(bl1_svc_uid, 231 U(0xd46739fd), 0xcb72, 0x9a4d, 0xb5, 0x75, 232 0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a); 233 234 235 #if TRUSTED_BOARD_BOOT 236 /* 237 * Dispatch FWU calls to FWU SMC handler and return its return 238 * value 239 */ 240 if (is_fwu_fid(smc_fid)) { 241 return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 242 handle, flags); 243 } 244 #endif 245 246 switch (smc_fid) { 247 case BL1_SMC_CALL_COUNT: 248 SMC_RET1(handle, BL1_NUM_SMC_CALLS); 249 250 case BL1_SMC_UID: 251 SMC_UUID_RET(handle, bl1_svc_uid); 252 253 case BL1_SMC_VERSION: 254 SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER); 255 256 default: 257 WARN("Unimplemented BL1 SMC Call: 0x%x\n", smc_fid); 258 SMC_RET1(handle, SMC_UNK); 259 } 260 } 261 262 /******************************************************************************* 263 * BL1 SMC wrapper. This function is only used in AArch32 mode to ensure ABI 264 * compliance when invoking bl1_smc_handler. 265 ******************************************************************************/ 266 u_register_t bl1_smc_wrapper(uint32_t smc_fid, 267 void *cookie, 268 void *handle, 269 unsigned int flags) 270 { 271 u_register_t x1, x2, x3, x4; 272 273 assert(handle != NULL); 274 275 get_smc_params_from_ctx(handle, x1, x2, x3, x4); 276 return bl1_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags); 277 } 278